arch/arm/include/asm/gic-v3.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2019 Broadcom.
   4  */
   5
   6 #ifndef __GIC_V3_H__
   7 #define __GIC_V3_H__
   8
   9 #ifndef __ASSEMBLY__
  10 #include <linux/bitops.h>
  11 #endif
  12
  13 #define GICR_CTLR_ENABLE_LPIS           BIT(0)
  14 #define GICR_CTLR_RWP                   BIT(3)
  15
  16 #define GICR_TYPER_CPU_NUMBER(r)        (((r) >> 8) & 0xffff)
  17
  18 #define GICR_WAKER_PROCESSORSLEEP       BIT(1)
  19 #define GICR_WAKER_CHILDRENASLEEP       BIT(2)
  20
  21 #define GIC_BASER_CACHE_NCNB            0ULL
  22 #define GIC_BASER_CACHE_SAMEASINNER     0ULL
  23 #define GIC_BASER_CACHE_NC              1ULL
  24 #define GIC_BASER_CACHE_RAWT            2ULL
  25 #define GIC_BASER_CACHE_RAWB            3ULL
  26 #define GIC_BASER_CACHE_WAWT            4ULL
  27 #define GIC_BASER_CACHE_WAWB            5ULL
  28 #define GIC_BASER_CACHE_RAWAWT          6ULL
  29 #define GIC_BASER_CACHE_RAWAWB          7ULL
  30 #define GIC_BASER_CACHE_MASK            7ULL
  31 #define GIC_BASER_NONSHAREABLE          0ULL
  32 #define GIC_BASER_INNERSHAREABLE        1ULL
  33 #define GIC_BASER_OUTERSHAREABLE        2ULL
  34 #define GIC_BASER_SHAREABILITY_MASK     3ULL
  35
  36 #define GIC_BASER_CACHEABILITY(reg, inner_outer, type)  \
  37         (GIC_BASER_CACHE_##type << reg##_##inner_outer##_CACHEABILITY_SHIFT)
  38
  39 #define GIC_BASER_SHAREABILITY(reg, type)       \
  40         (GIC_BASER_##type << reg##_SHAREABILITY_SHIFT)
  41
  42 /* encode a size field of width @w containing @n - 1 units */
  43 #define GIC_ENCODE_SZ(n, w) (((unsigned long)(n) - 1) &\
  44                              GENMASK_ULL(((w) - 1), 0))
  45
  46 #define GICR_PROPBASER_SHAREABILITY_SHIFT               (10)
  47 #define GICR_PROPBASER_INNER_CACHEABILITY_SHIFT         (7)
  48 #define GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT         (56)
  49 #define GICR_PROPBASER_SHAREABILITY_MASK        \
  50         GIC_BASER_SHAREABILITY(GICR_PROPBASER, SHAREABILITY_MASK)
  51 #define GICR_PROPBASER_INNER_CACHEABILITY_MASK  \
  52         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, MASK)
  53 #define GICR_PROPBASER_OUTER_CACHEABILITY_MASK  \
  54         GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, MASK)
  55 #define GICR_PROPBASER_CACHEABILITY_MASK GICR_PROPBASER_INNER_CACHEABILITY_MASK
  56
  57 #define GICR_PROPBASER_INNERSHAREABLE   \
  58         GIC_BASER_SHAREABILITY(GICR_PROPBASER, INNERSHAREABLE)
  59
  60 #define GICR_PROPBASER_NCNB     \
  61         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NCNB)
  62 #define GICR_PROPBASER_NC       \
  63         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, NC)
  64 #define GICR_PROPBASER_RAWT     \
  65         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWT)
  66 #define GICR_PROPBASER_RAWB     \
  67         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWB)
  68 #define GICR_PROPBASER_WAWT     \
  69         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWT)
  70 #define GICR_PROPBASER_WAWB     \
  71         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, WAWB)
  72 #define GICR_PROPBASER_RAWAWT   \
  73         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWT)
  74 #define GICR_PROPBASER_RAWAWB   \
  75         GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RAWAWB)
  76
  77 #define GICR_PROPBASER_IDBITS_MASK      (0x1f)
  78 #define GICR_PROPBASER_ADDRESS(x)       ((x) & GENMASK_ULL(51, 12))
  79 #define GICR_PENDBASER_ADDRESS(x)       ((x) & GENMASK_ULL(51, 16))
  80
  81 #define GICR_PENDBASER_SHAREABILITY_SHIFT               (10)
  82 #define GICR_PENDBASER_INNER_CACHEABILITY_SHIFT         (7)
  83 #define GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT         (56)
  84 #define GICR_PENDBASER_SHAREABILITY_MASK        \
  85         GIC_BASER_SHAREABILITY(GICR_PENDBASER, SHAREABILITY_MASK)
  86 #define GICR_PENDBASER_INNER_CACHEABILITY_MASK  \
  87         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, MASK)
  88 #define GICR_PENDBASER_OUTER_CACHEABILITY_MASK  \
  89         GIC_BASER_CACHEABILITY(GICR_PENDBASER, OUTER, MASK)
  90 #define GICR_PENDBASER_CACHEABILITY_MASK        \
  91         GICR_PENDBASER_INNER_CACHEABILITY_MASK
  92
  93 #define GICR_PENDBASER_INNERSHAREABLE   \
  94         GIC_BASER_SHAREABILITY(GICR_PENDBASER, INNERSHAREABLE)
  95
  96 #define GICR_PENDBASER_NCNB     \
  97         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NCNB)
  98 #define GICR_PENDBASER_NC       \
  99         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, NC)
 100 #define GICR_PENDBASER_RAWT     \
 101         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWT)
 102 #define GICR_PENDBASER_RAWB     \
 103         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWB)
 104 #define GICR_PENDBASER_WAWT     \
 105         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWT)
 106 #define GICR_PENDBASER_WAWB     \
 107         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, WAWB)
 108 #define GICR_PENDBASER_RAWAWT   \
 109         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWT)
 110 #define GICR_PENDBASER_RAWAWB   \
 111         GIC_BASER_CACHEABILITY(GICR_PENDBASER, INNER, RAWAWB)
 112
 113 #define GICR_PENDBASER_PTZ      BIT_ULL(62)
 114
 115 #define ITS_MAX_LPI_NRBITS      16 /* 64K LPIs */
 116
 117 #define GICD_TYPER_ID_BITS(typer)       ((((typer) >> 19) & 0x1f) + 1)
 118 #define GICD_TYPER_NUM_LPIS(typer)      ((((typer) >> 11) & 0x1f) + 1)
 119 #define GICD_TYPER_IRQS(typer)          ((((typer) & 0x1f) + 1) * 32)
 120
 121 /* Message based interrupts support */
 122 #define GICD_TYPER_MBIS         BIT(16)
 123 /* LPI support */
 124 #define GICD_TYPER_LPIS         BIT(17)
 125 #define GICD_TYPER_RSS          BIT(26)
 126
 127 #define GIC_REDISTRIBUTOR_OFFSET 0x20000
 128
 129 #ifdef CONFIG_GIC_V3_ITS
 130 int gic_lpi_tables_init(u64 base, u32 max_redist);
 131 #else
 132 int gic_lpi_tables_init(u64 base, u32 max_redist)
 133 {
 134         return 0;
 135 }
 136 #endif /* CONFIG_GIC_V3_ITS */
 137
 138 #endif /* __GIC_V3_H__ */