1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2016-2017 Rockchip Electronics Co., Ltd
6 #ifndef _ASM_ARCH_SDRAM_RK3399_H
7 #define _ASM_ARCH_SDRAM_RK3399_H
8 #include <asm/arch-rockchip/sdram_common.h>
9 #include <asm/arch-rockchip/sdram_msch.h>
11 #include <linux/bitops.h>
14 struct rk3399_ddr_pctl_regs {
18 struct rk3399_ddr_publ_regs {
22 struct rk3399_ddr_pi_regs {
26 struct rk3399_ddr_cic_regs {
42 #define PWRUP_SREFRESH_EXIT BIT(16)
45 #define MEM_RST_VALID 1
52 union noc_ddrtiminga0 ddrtiminga0;
53 union noc_ddrtimingb0 ddrtimingb0;
54 union noc_ddrtimingc0 ddrtimingc0;
55 union noc_devtodev0 devtodev0;
56 u32 reserved0[(0x110 - 0x20) / 4];
57 union noc_ddrmode ddrmode;
58 u32 reserved1[(0x1000 - 0x114) / 4];
62 struct sdram_msch_timings {
63 union noc_ddrtiminga0 ddrtiminga0;
64 union noc_ddrtimingb0 ddrtimingb0;
65 union noc_ddrtimingc0 ddrtimingc0;
66 union noc_devtodev0 devtodev0;
67 union noc_ddrmode ddrmode;
71 struct rk3399_sdram_channel {
72 struct sdram_cap_info cap_info;
73 struct sdram_msch_timings noc_timings;
76 struct rk3399_sdram_params {
77 struct rk3399_sdram_channel ch[2];
78 struct sdram_base_params base;
79 struct rk3399_ddr_pctl_regs pctl_regs;
80 struct rk3399_ddr_pi_regs pi_regs;
81 struct rk3399_ddr_publ_regs phy_regs;
84 #define PI_CA_TRAINING BIT(0)
85 #define PI_WRITE_LEVELING BIT(1)
86 #define PI_READ_GATE_TRAINING BIT(2)
87 #define PI_READ_LEVELING BIT(3)
88 #define PI_WDQ_LEVELING BIT(4)
89 #define PI_FULL_TRAINING 0xff