arch/arm/dts/sama5d2.dtsi

   1 #include "skeleton.dtsi"
   2
   3 / {
   4         model = "Atmel SAMA5D2 family SoC";
   5         compatible = "atmel,sama5d2";
   6
   7         aliases {
   8                 spi0 = &spi0;
   9                 spi1 = &qspi0;
  10                 i2c0 = &i2c0;
  11                 i2c1 = &i2c1;
  12         };
  13
  14         clocks {
  15                 slow_xtal: slow_xtal {
  16                         compatible = "fixed-clock";
  17                         #clock-cells = <0>;
  18                         clock-frequency = <0>;
  19                 };
  20
  21                 main_xtal: main_xtal {
  22                         compatible = "fixed-clock";
  23                         #clock-cells = <0>;
  24                         clock-frequency = <0>;
  25                 };
  26         };
  27
  28         ahb {
  29                 compatible = "simple-bus";
  30                 #address-cells = <1>;
  31                 #size-cells = <1>;
  32                 u-boot,dm-pre-reloc;
  33
  34                 usb1: ohci@00400000 {
  35                         compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  36                         reg = <0x00400000 0x100000>;
  37                         clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
  38                         clock-names = "ohci_clk", "hclk", "uhpck";
  39                         status = "disabled";
  40                 };
  41
  42                 usb2: ehci@00500000 {
  43                         compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  44                         reg = <0x00500000 0x100000>;
  45                         clocks = <&utmi>, <&uhphs_clk>;
  46                         clock-names = "usb_clk", "ehci_clk";
  47                         status = "disabled";
  48                 };
  49
  50                 sdmmc0: sdio-host@a0000000 {
  51                         compatible = "atmel,sama5d2-sdhci";
  52                         reg = <0xa0000000 0x300>;
  53                         clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
  54                         clock-names = "hclock", "multclk", "baseclk";
  55                         status = "disabled";
  56                 };
  57
  58                 sdmmc1: sdio-host@b0000000 {
  59                         compatible = "atmel,sama5d2-sdhci";
  60                         reg = <0xb0000000 0x300>;
  61                         clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
  62                         clock-names = "hclock", "multclk", "baseclk";
  63                         status = "disabled";
  64                 };
  65
  66                 apb {
  67                         compatible = "simple-bus";
  68                         #address-cells = <1>;
  69                         #size-cells = <1>;
  70                         u-boot,dm-pre-reloc;
  71
  72                         hlcdc: hlcdc@f0000000 {
  73                                 compatible = "atmel,at91sam9x5-hlcdc";
  74                                 reg = <0xf0000000 0x2000>;
  75                                 clocks = <&lcdc_clk>;
  76                                 status = "disabled";
  77                         };
  78
  79                         pmc: pmc@f0014000 {
  80                                 compatible = "atmel,sama5d2-pmc", "syscon";
  81                                 reg = <0xf0014000 0x160>;
  82                                 #address-cells = <1>;
  83                                 #size-cells = <0>;
  84                                 #interrupt-cells = <1>;
  85                                 u-boot,dm-pre-reloc;
  86
  87                                 main: mainck {
  88                                         compatible = "atmel,at91sam9x5-clk-main";
  89                                         #clock-cells = <0>;
  90                                         u-boot,dm-pre-reloc;
  91                                 };
  92
  93                                 plla: pllack@0 {
  94                                         compatible = "atmel,sama5d3-clk-pll";
  95                                         #clock-cells = <0>;
  96                                         clocks = <&main>;
  97                                         reg = <0>;
  98                                         atmel,clk-input-range = <12000000 12000000>;
  99                                         #atmel,pll-clk-output-range-cells = <4>;
 100                                         atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
 101                                         u-boot,dm-pre-reloc;
 102                                 };
 103
 104                                 plladiv: plladivck {
 105                                         compatible = "atmel,at91sam9x5-clk-plldiv";
 106                                         #clock-cells = <0>;
 107                                         clocks = <&plla>;
 108                                 };
 109
 110                                 audio_pll_frac: audiopll_fracck {
 111                                         compatible = "atmel,sama5d2-clk-audio-pll-frac";
 112                                         #clock-cells = <0>;
 113                                         clocks = <&main>;
 114                                 };
 115
 116                                 audio_pll_pad: audiopll_padck {
 117                                         compatible = "atmel,sama5d2-clk-audio-pll-pad";
 118                                         #clock-cells = <0>;
 119                                         clocks = <&audio_pll_frac>;
 120                                 };
 121
 122                                 audio_pll_pmc: audiopll_pmcck {
 123                                         compatible = "atmel,sama5d2-clk-audio-pll-pmc";
 124                                         #clock-cells = <0>;
 125                                         clocks = <&audio_pll_frac>;
 126                                 };
 127
 128                                 utmi: utmick {
 129                                         compatible = "atmel,at91sam9x5-clk-utmi";
 130                                         #clock-cells = <0>;
 131                                         clocks = <&main>;
 132                                         regmap-sfr = <&sfr>;
 133                                         u-boot,dm-pre-reloc;
 134                                 };
 135
 136                                 mck: masterck {
 137                                         compatible = "atmel,at91sam9x5-clk-master";
 138                                         #clock-cells = <0>;
 139                                         clocks = <&main>, <&plladiv>, <&utmi>;
 140                                         atmel,clk-output-range = <124000000 166000000>;
 141                                         atmel,clk-divisors = <1 2 4 3>;
 142                                         u-boot,dm-pre-reloc;
 143                                 };
 144
 145                                 h32ck: h32mxck {
 146                                         #clock-cells = <0>;
 147                                         compatible = "atmel,sama5d4-clk-h32mx";
 148                                         clocks = <&mck>;
 149                                         u-boot,dm-pre-reloc;
 150                                 };
 151
 152                                 usb: usbck {
 153                                         compatible = "atmel,at91sam9x5-clk-usb";
 154                                         #clock-cells = <0>;
 155                                         clocks = <&plladiv>, <&utmi>;
 156                                 };
 157
 158                                 prog: progck {
 159                                         compatible = "atmel,at91sam9x5-clk-programmable";
 160                                         #address-cells = <1>;
 161                                         #size-cells = <0>;
 162                                         interrupt-parent = <&pmc>;
 163                                         clocks = <&main>, <&plladiv>, <&utmi>, <&mck>;
 164
 165                                         prog0: prog@0 {
 166                                                 #clock-cells = <0>;
 167                                                 reg = <0>;
 168                                         };
 169
 170                                         prog1: prog@1 {
 171                                                 #clock-cells = <0>;
 172                                                 reg = <1>;
 173                                         };
 174
 175                                         prog2: prog@2 {
 176                                                 #clock-cells = <0>;
 177                                                 reg = <2>;
 178                                         };
 179                                 };
 180
 181                                 systemck {
 182                                         compatible = "atmel,at91rm9200-clk-system";
 183                                         #address-cells = <1>;
 184                                         #size-cells = <0>;
 185
 186                                         ddrck: ddrck@2 {
 187                                                 #clock-cells = <0>;
 188                                                 reg = <2>;
 189                                                 clocks = <&mck>;
 190                                         };
 191
 192                                         lcdck: lcdck@3 {
 193                                                 #clock-cells = <0>;
 194                                                 reg = <3>;
 195                                                 clocks = <&mck>;
 196                                         };
 197
 198                                         uhpck: uhpck@6 {
 199                                                 #clock-cells = <0>;
 200                                                 reg = <6>;
 201                                                 clocks = <&usb>;
 202                                         };
 203
 204                                         udpck: udpck@7 {
 205                                                 #clock-cells = <0>;
 206                                                 reg = <7>;
 207                                                 clocks = <&usb>;
 208                                         };
 209
 210                                         pck0: pck0@8 {
 211                                                 #clock-cells = <0>;
 212                                                 reg = <8>;
 213                                                 clocks = <&prog0>;
 214                                         };
 215
 216                                         pck1: pck1@9 {
 217                                                 #clock-cells = <0>;
 218                                                 reg = <9>;
 219                                                 clocks = <&prog1>;
 220                                         };
 221
 222                                         pck2: pck2@10 {
 223                                                 #clock-cells = <0>;
 224                                                 reg = <10>;
 225                                                 clocks = <&prog2>;
 226                                         };
 227
 228                                         iscck: iscck@18 {
 229                                                 #clock-cells = <0>;
 230                                                 reg = <18>;
 231                                                 clocks = <&mck>;
 232                                         };
 233                                 };
 234
 235                                 periph32ck {
 236                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 237                                         #address-cells = <1>;
 238                                         #size-cells = <0>;
 239                                         clocks = <&h32ck>;
 240                                         u-boot,dm-pre-reloc;
 241
 242                                         macb0_clk: macb0_clk@5 {
 243                                                 #clock-cells = <0>;
 244                                                 reg = <5>;
 245                                                 atmel,clk-output-range = <0 83000000>;
 246                                         };
 247
 248                                         tdes_clk: tdes_clk@11 {
 249                                                 #clock-cells = <0>;
 250                                                 reg = <11>;
 251                                                 atmel,clk-output-range = <0 83000000>;
 252                                         };
 253
 254                                         matrix1_clk: matrix1_clk@14 {
 255                                                 #clock-cells = <0>;
 256                                                 reg = <14>;
 257                                         };
 258
 259                                         hsmc_clk: hsmc_clk@17 {
 260                                                 #clock-cells = <0>;
 261                                                 reg = <17>;
 262                                         };
 263
 264                                         pioA_clk: pioA_clk@18 {
 265                                                 #clock-cells = <0>;
 266                                                 reg = <18>;
 267                                                 atmel,clk-output-range = <0 83000000>;
 268                                                 u-boot,dm-pre-reloc;
 269                                         };
 270
 271                                         flx0_clk: flx0_clk@19 {
 272                                                 #clock-cells = <0>;
 273                                                 reg = <19>;
 274                                                 atmel,clk-output-range = <0 83000000>;
 275                                         };
 276
 277                                         flx1_clk: flx1_clk@20 {
 278                                                 #clock-cells = <0>;
 279                                                 reg = <20>;
 280                                                 atmel,clk-output-range = <0 83000000>;
 281                                         };
 282
 283                                         flx2_clk: flx2_clk@21 {
 284                                                 #clock-cells = <0>;
 285                                                 reg = <21>;
 286                                                 atmel,clk-output-range = <0 83000000>;
 287                                         };
 288
 289                                         flx3_clk: flx3_clk@22 {
 290                                                 #clock-cells = <0>;
 291                                                 reg = <22>;
 292                                                 atmel,clk-output-range = <0 83000000>;
 293                                         };
 294
 295                                         flx4_clk: flx4_clk@23 {
 296                                                 #clock-cells = <0>;
 297                                                 reg = <23>;
 298                                                 atmel,clk-output-range = <0 83000000>;
 299                                         };
 300
 301                                         uart0_clk: uart0_clk@24 {
 302                                                 #clock-cells = <0>;
 303                                                 reg = <24>;
 304                                                 atmel,clk-output-range = <0 83000000>;
 305                                                 u-boot,dm-pre-reloc;
 306                                         };
 307
 308                                         uart1_clk: uart1_clk@25 {
 309                                                 #clock-cells = <0>;
 310                                                 reg = <25>;
 311                                                 atmel,clk-output-range = <0 83000000>;
 312                                                 u-boot,dm-pre-reloc;
 313                                         };
 314
 315                                         uart2_clk: uart2_clk@26 {
 316                                                 #clock-cells = <0>;
 317                                                 reg = <26>;
 318                                                 atmel,clk-output-range = <0 83000000>;
 319                                                 u-boot,dm-pre-reloc;
 320                                         };
 321
 322                                         uart3_clk: uart3_clk@27 {
 323                                                 #clock-cells = <0>;
 324                                                 reg = <27>;
 325                                                 atmel,clk-output-range = <0 83000000>;
 326                                         };
 327
 328                                         uart4_clk: uart4_clk@28 {
 329                                                 #clock-cells = <0>;
 330                                                 reg = <28>;
 331                                                 atmel,clk-output-range = <0 83000000>;
 332                                         };
 333
 334                                         twi0_clk: twi0_clk@29 {
 335                                                 reg = <29>;
 336                                                 #clock-cells = <0>;
 337                                                 atmel,clk-output-range = <0 83000000>;
 338                                         };
 339
 340                                         twi1_clk: twi1_clk@30 {
 341                                                 #clock-cells = <0>;
 342                                                 reg = <30>;
 343                                                 atmel,clk-output-range = <0 83000000>;
 344                                         };
 345
 346                                         spi0_clk: spi0_clk@33 {
 347                                                 #clock-cells = <0>;
 348                                                 reg = <33>;
 349                                                 atmel,clk-output-range = <0 83000000>;
 350                                                 u-boot,dm-pre-reloc;
 351                                         };
 352
 353                                         spi1_clk: spi1_clk@34 {
 354                                                 #clock-cells = <0>;
 355                                                 reg = <34>;
 356                                                 atmel,clk-output-range = <0 83000000>;
 357                                         };
 358
 359                                         tcb0_clk: tcb0_clk@35 {
 360                                                 #clock-cells = <0>;
 361                                                 reg = <35>;
 362                                                 atmel,clk-output-range = <0 83000000>;
 363                                         };
 364
 365                                         tcb1_clk: tcb1_clk@36 {
 366                                                 #clock-cells = <0>;
 367                                                 reg = <36>;
 368                                                 atmel,clk-output-range = <0 83000000>;
 369                                         };
 370
 371                                         pwm_clk: pwm_clk@38 {
 372                                                 #clock-cells = <0>;
 373                                                 reg = <38>;
 374                                                 atmel,clk-output-range = <0 83000000>;
 375                                         };
 376
 377                                         adc_clk: adc_clk@40 {
 378                                                 #clock-cells = <0>;
 379                                                 reg = <40>;
 380                                                 atmel,clk-output-range = <0 83000000>;
 381                                         };
 382
 383                                         uhphs_clk: uhphs_clk@41 {
 384                                                 #clock-cells = <0>;
 385                                                 reg = <41>;
 386                                                 atmel,clk-output-range = <0 83000000>;
 387                                         };
 388
 389                                         udphs_clk: udphs_clk@42 {
 390                                                 #clock-cells = <0>;
 391                                                 reg = <42>;
 392                                                 atmel,clk-output-range = <0 83000000>;
 393                                         };
 394
 395                                         ssc0_clk: ssc0_clk@43 {
 396                                                 #clock-cells = <0>;
 397                                                 reg = <43>;
 398                                                 atmel,clk-output-range = <0 83000000>;
 399                                         };
 400
 401                                         ssc1_clk: ssc1_clk@44 {
 402                                                 #clock-cells = <0>;
 403                                                 reg = <44>;
 404                                                 atmel,clk-output-range = <0 83000000>;
 405                                         };
 406
 407                                         trng_clk: trng_clk@47 {
 408                                                 #clock-cells = <0>;
 409                                                 reg = <47>;
 410                                                 atmel,clk-output-range = <0 83000000>;
 411                                         };
 412
 413                                         pdmic_clk: pdmic_clk@48 {
 414                                                 #clock-cells = <0>;
 415                                                 reg = <48>;
 416                                                 atmel,clk-output-range = <0 83000000>;
 417                                         };
 418
 419                                         i2s0_clk: i2s0_clk@54 {
 420                                                 #clock-cells = <0>;
 421                                                 reg = <54>;
 422                                                 atmel,clk-output-range = <0 83000000>;
 423                                         };
 424
 425                                         i2s1_clk: i2s1_clk@55 {
 426                                                 #clock-cells = <0>;
 427                                                 reg = <55>;
 428                                                 atmel,clk-output-range = <0 83000000>;
 429                                         };
 430
 431                                         can0_clk: can0_clk@56 {
 432                                                 #clock-cells = <0>;
 433                                                 reg = <56>;
 434                                                 atmel,clk-output-range = <0 83000000>;
 435                                         };
 436
 437                                         can1_clk: can1_clk@57 {
 438                                                 #clock-cells = <0>;
 439                                                 reg = <57>;
 440                                                 atmel,clk-output-range = <0 83000000>;
 441                                         };
 442
 443                                         classd_clk: classd_clk@59 {
 444                                                 #clock-cells = <0>;
 445                                                 reg = <59>;
 446                                                 atmel,clk-output-range = <0 83000000>;
 447                                         };
 448                                 };
 449
 450                                 periph64ck {
 451                                         compatible = "atmel,at91sam9x5-clk-peripheral";
 452                                         #address-cells = <1>;
 453                                         #size-cells = <0>;
 454                                         clocks = <&mck>;
 455                                         u-boot,dm-pre-reloc;
 456
 457                                         dma0_clk: dma0_clk@6 {
 458                                                 #clock-cells = <0>;
 459                                                 reg = <6>;
 460                                         };
 461
 462                                         dma1_clk: dma1_clk@7 {
 463                                                 #clock-cells = <0>;
 464                                                 reg = <7>;
 465                                         };
 466
 467                                         aes_clk: aes_clk@9 {
 468                                                 #clock-cells = <0>;
 469                                                 reg = <9>;
 470                                         };
 471
 472                                         aesb_clk: aesb_clk@10 {
 473                                                 #clock-cells = <0>;
 474                                                 reg = <10>;
 475                                         };
 476
 477                                         sha_clk: sha_clk@12 {
 478                                                 #clock-cells = <0>;
 479                                                 reg = <12>;
 480                                         };
 481
 482                                         mpddr_clk: mpddr_clk@13 {
 483                                                 #clock-cells = <0>;
 484                                                 reg = <13>;
 485                                         };
 486
 487                                         matrix0_clk: matrix0_clk@15 {
 488                                                 #clock-cells = <0>;
 489                                                 reg = <15>;
 490                                         };
 491
 492                                         sdmmc0_hclk: sdmmc0_hclk@31 {
 493                                                 #clock-cells = <0>;
 494                                                 reg = <31>;
 495                                                 u-boot,dm-pre-reloc;
 496                                         };
 497
 498                                         sdmmc1_hclk: sdmmc1_hclk@32 {
 499                                                 #clock-cells = <0>;
 500                                                 reg = <32>;
 501                                                 u-boot,dm-pre-reloc;
 502                                         };
 503
 504                                         lcdc_clk: lcdc_clk@45 {
 505                                                 #clock-cells = <0>;
 506                                                 reg = <45>;
 507                                         };
 508
 509                                         isc_clk: isc_clk@46 {
 510                                                 #clock-cells = <0>;
 511                                                 reg = <46>;
 512                                         };
 513
 514                                         qspi0_clk: qspi0_clk@52 {
 515                                                 #clock-cells = <0>;
 516                                                 reg = <52>;
 517                                                 u-boot,dm-pre-reloc;
 518                                         };
 519
 520                                         qspi1_clk: qspi1_clk@53 {
 521                                                 #clock-cells = <0>;
 522                                                 reg = <53>;
 523                                                 u-boot,dm-pre-reloc;
 524                                         };
 525                                 };
 526
 527                                 gck {
 528                                         compatible = "atmel,sama5d2-clk-generated";
 529                                         #address-cells = <1>;
 530                                         #size-cells = <0>;
 531                                         interrupt-parent = <&pmc>;
 532                                         clocks = <&main>, <&plla>, <&utmi>, <&mck>;
 533                                         u-boot,dm-pre-reloc;
 534
 535                                         sdmmc0_gclk: sdmmc0_gclk@31 {
 536                                                 #clock-cells = <0>;
 537                                                 reg = <31>;
 538                                                 u-boot,dm-pre-reloc;
 539                                         };
 540
 541                                         sdmmc1_gclk: sdmmc1_gclk@32 {
 542                                                 #clock-cells = <0>;
 543                                                 reg = <32>;
 544                                                 u-boot,dm-pre-reloc;
 545                                         };
 546
 547                                         tcb0_gclk: tcb0_gclk@35 {
 548                                                 #clock-cells = <0>;
 549                                                 reg = <35>;
 550                                                 atmel,clk-output-range = <0 83000000>;
 551                                         };
 552
 553                                         tcb1_gclk: tcb1_gclk@36 {
 554                                                 #clock-cells = <0>;
 555                                                 reg = <36>;
 556                                                 atmel,clk-output-range = <0 83000000>;
 557                                         };
 558
 559                                         pwm_gclk: pwm_gclk@38 {
 560                                                 #clock-cells = <0>;
 561                                                 reg = <38>;
 562                                                 atmel,clk-output-range = <0 83000000>;
 563                                         };
 564
 565                                         pdmic_gclk: pdmic_gclk@48 {
 566                                                 #clock-cells = <0>;
 567                                                 reg = <48>;
 568                                         };
 569
 570                                         i2s0_gclk: i2s0_gclk@54 {
 571                                                 #clock-cells = <0>;
 572                                                 reg = <54>;
 573                                         };
 574
 575                                         i2s1_gclk: i2s1_gclk@55 {
 576                                                 #clock-cells = <0>;
 577                                                 reg = <55>;
 578                                         };
 579
 580                                         can0_gclk: can0_gclk@56 {
 581                                                 #clock-cells = <0>;
 582                                                 reg = <56>;
 583                                                 atmel,clk-output-range = <0 80000000>;
 584                                         };
 585
 586                                         can1_gclk: can1_gclk@57 {
 587                                                 #clock-cells = <0>;
 588                                                 reg = <57>;
 589                                                 atmel,clk-output-range = <0 80000000>;
 590                                         };
 591
 592                                         classd_gclk: classd_gclk@59 {
 593                                                 #clock-cells = <0>;
 594                                                 reg = <59>;
 595                                                 atmel,clk-output-range = <0 100000000>;
 596                                         };
 597                                 };
 598                         };
 599
 600                         qspi0: spi@f0020000 {
 601                                 compatible = "atmel,sama5d2-qspi";
 602                                 reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
 603                                 reg-names = "qspi_base", "qspi_mmap";
 604                                 #address-cells = <1>;
 605                                 #size-cells = <0>;
 606                                 clocks = <&qspi0_clk>;
 607                                 status = "disabled";
 608                         };
 609
 610                         qspi1: spi@f0024000 {
 611                                 compatible = "atmel,sama5d2-qspi";
 612                                 reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
 613                                 reg-names = "qspi_base", "qspi_mmap";
 614                                 #address-cells = <1>;
 615                                 #size-cells = <0>;
 616                                 clocks = <&qspi1_clk>;
 617                                 status = "disabled";
 618                         };
 619
 620                         spi0: spi@f8000000 {
 621                                 compatible = "atmel,at91rm9200-spi";
 622                                 reg = <0xf8000000 0x100>;
 623                                 clocks = <&spi0_clk>;
 624                                 clock-names = "spi_clk";
 625                                 #address-cells = <1>;
 626                                 #size-cells = <0>;
 627                                 status = "disabled";
 628                         };
 629
 630                         macb0: ethernet@f8008000 {
 631                                 compatible = "cdns,macb";
 632                                 reg = <0xf8008000 0x1000>;
 633                                 #address-cells = <1>;
 634                                 #size-cells = <0>;
 635                                 clocks = <&macb0_clk>, <&macb0_clk>;
 636                                 clock-names = "hclk", "pclk";
 637                                 status = "disabled";
 638                         };
 639
 640                         uart0: serial@f801c000 {
 641                                 compatible = "atmel,at91sam9260-usart";
 642                                 reg = <0xf801c000 0x100>;
 643                                 clocks = <&uart0_clk>;
 644                                 clock-names = "usart";
 645                                 status = "disabled";
 646                         };
 647
 648                         uart1: serial@f8020000 {
 649                                 compatible = "atmel,at91sam9260-usart";
 650                                 reg = <0xf8020000 0x100>;
 651                                 clocks = <&uart1_clk>;
 652                                 clock-names = "usart";
 653                                 status = "disabled";
 654                         };
 655
 656                         uart2: serial@f8024000 {
 657                                 compatible = "atmel,at91sam9260-usart";
 658                                 reg = <0xf8024000 0x100>;
 659                                 clocks = <&uart2_clk>;
 660                                 clock-names = "usart";
 661                                 status = "disabled";
 662                         };
 663
 664                         i2c0: i2c@f8028000 {
 665                                 compatible = "atmel,sama5d2-i2c";
 666                                 reg = <0xf8028000 0x100>;
 667                                 #address-cells = <1>;
 668                                 #size-cells = <0>;
 669                                 clocks = <&twi0_clk>;
 670                                 status = "disabled";
 671                         };
 672
 673                         rstc@f8048000 {
 674                                 compatible = "atmel,sama5d3-rstc";
 675                                 reg = <0xf8048000 0x10>;
 676                                 clocks = <&clk32k>;
 677                         };
 678
 679                         shdwc@f8048010 {
 680                                 compatible = "atmel,sama5d2-shdwc";
 681                                 reg = <0xf8048010 0x10>;
 682                                 clocks = <&clk32k>;
 683                                 #address-cells = <1>;
 684                                 #size-cells = <0>;
 685                                 atmel,wakeup-rtc-timer;
 686                         };
 687
 688                         pit: timer@f8048030 {
 689                                 compatible = "atmel,at91sam9260-pit";
 690                                 reg = <0xf8048030 0x10>;
 691                                 clocks = <&h32ck>;
 692                         };
 693
 694                         watchdog@f8048040 {
 695                                 compatible = "atmel,sama5d4-wdt";
 696                                 reg = <0xf8048040 0x10>;
 697                                 clocks = <&clk32k>;
 698                                 status = "disabled";
 699                         };
 700
 701                         sfr: sfr@f8030000 {
 702                                 compatible = "atmel,sama5d2-sfr", "syscon";
 703                                 reg = <0xf8030000 0x98>;
 704                         };
 705
 706                         sckc@f8048050 {
 707                                 compatible = "atmel,at91sam9x5-sckc";
 708                                 reg = <0xf8048050 0x4>;
 709
 710                                 slow_rc_osc: slow_rc_osc {
 711                                         compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
 712                                         #clock-cells = <0>;
 713                                         clock-frequency = <32768>;
 714                                         clock-accuracy = <250000000>;
 715                                         atmel,startup-time-usec = <75>;
 716                                 };
 717
 718                                 slow_osc: slow_osc {
 719                                         compatible = "atmel,at91sam9x5-clk-slow-osc";
 720                                         #clock-cells = <0>;
 721                                         clocks = <&slow_xtal>;
 722                                         atmel,startup-time-usec = <1200000>;
 723                                 };
 724
 725                                 clk32k: slowck {
 726                                         compatible = "atmel,at91sam9x5-clk-slow";
 727                                         #clock-cells = <0>;
 728                                         clocks = <&slow_rc_osc &slow_osc>;
 729                                 };
 730                         };
 731
 732                         spi1: spi@fc000000 {
 733                                 compatible = "atmel,at91rm9200-spi";
 734                                 reg = <0xfc000000 0x100>;
 735                                 #address-cells = <1>;
 736                                 #size-cells = <0>;
 737                                 status = "disabled";
 738                         };
 739
 740                         uart3: serial@fc008000 {
 741                                 compatible = "atmel,at91sam9260-usart";
 742                                 reg = <0xfc008000 0x100>;
 743                                 clocks = <&uart3_clk>;
 744                                 clock-names = "usart";
 745                                 status = "disabled";
 746                         };
 747
 748                         i2c1: i2c@fc028000 {
 749                                 compatible = "atmel,sama5d2-i2c";
 750                                 reg = <0xfc028000 0x100>;
 751                                 #address-cells = <1>;
 752                                 #size-cells = <0>;
 753                                 clocks = <&twi1_clk>;
 754                                 status = "disabled";
 755                         };
 756
 757                         pioA: gpio@fc038000 {
 758                                 compatible = "atmel,sama5d2-gpio";
 759                                 reg = <0xfc038000 0x600>;
 760                                 clocks = <&pioA_clk>;
 761                                 gpio-controller;
 762                                 #gpio-cells = <2>;
 763                                 u-boot,dm-pre-reloc;
 764
 765                                 pinctrl {
 766                                         compatible = "atmel,sama5d2-pinctrl";
 767                                         u-boot,dm-pre-reloc;
 768                                 };
 769                         };
 770                 };
 771         };
 772
 773         onewire_tm: onewire {
 774                 compatible = "w1-gpio";
 775                 status = "disabled";
 776         };
 777 };