Merge tag 'u-boot-atmel-fixes-2020.07-a' of https://gitlab.denx.de/u-boot/custodians...
[oweals/u-boot.git] / arch / arm / dts / armada-3720-uDPU.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Device tree for the uDPU board.
4  * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
5  * Copyright (C) 2016 Marvell
6  * Copyright (C) 2018 Methode
7  * Copyright (C) 2018 Telus
8  *
9  * Vladimir Vid <vladimir.vid@sartura.hr>
10  */
11
12 /dts-v1/;
13
14 #include "armada-37xx.dtsi"
15 #include "armada-3720-uDPU-u-boot.dtsi"
16
17 / {
18         model = "Methode uDPU Board";
19         compatible = "methode,udpu";
20
21         chosen {
22                 stdout-path = "serial0:115200n8";
23                 bootargs = "console=ttyMV0,115200 earlycon=ar3700_uart,0xd0012000";
24         };
25
26         aliases {
27                 i2c0 = &i2c0;
28                 i2c1 = &i2c1;
29                 spi0 = &spi0;
30         };
31
32         memory@0 {
33                 device_type = "memory";
34                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
35         };
36
37         mdio: mdio@32004 {
38                 #address-cells = <1>;
39                 #size-cells = <0>;
40                 ethphy0: ethernet-phy@0 {
41                          reg = <0>;
42                 };
43                 ethphy1: ethernet-phy@1 {
44                         reg = <1>;
45                 };
46         };
47
48         scsi: scsi {
49                 compatible = "marvell,mvebu-scsi";
50                 #address-cells = <1>;
51                 #size-cells = <1>;
52                 max-id = <1>;
53                 max-lun = <1>;
54                 status = "okay";
55         };
56
57         i2c1: i2c@11080 {
58                 compatible = "marvell,armada-3700-i2c", "simple-bus";
59                 reg = <0x0 0x11080 0x0 0x80>;
60                 pinctrl-names = "default";
61                 pinctrl-0 = <&i2c2_pins>;
62                 #address-cells = <2>;
63                 #size-cells = <2>;
64                 status = "okay";
65         };
66
67         uart1: serial@12200 {
68                 compatible = "marvell,armada-3700-uart-ext";
69                 reg = <0x0 0x12200 0x0 0x30>;
70                 pinctrl-names = "default";
71                 pinctrl-0 = <&uart2_pins>;
72                 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
73                 status = "okay";
74                 #address-cells = <2>;
75                 #size-cells = <2>;
76         };
77
78         vcc_sd_reg0: regulator@0 {
79                 compatible = "regulator-gpio";
80                 regulator-name = "vcc_sd0";
81                 regulator-min-microvolt = <1800000>;
82                 regulator-max-microvolt = <3300000>;
83                 regulator-type = "voltage";
84                 states = <1800000 0x1
85                         3300000 0x0>;
86                 gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
87         };
88
89         sfp_eth0: sfp-eth0 {
90                 compatible = "sff,sfp";
91                 i2c-bus = <&i2c0>;
92                 los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>;
93                 mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>;
94                 tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>;
95                 tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>;
96         };
97
98         sfp_eth1: sfp-eth1 {
99                 compatible = "sff,sfp";
100                 i2c-bus = <&i2c1>;
101                 sfp,ethernet = <&eth1>;
102                 los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>;
103                 mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>;
104                 tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>;
105                 tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>;
106         };
107 };
108
109 &comphy {
110         phy0 {
111                 phy-type = <PHY_TYPE_SGMII1>;
112                 phy-speed = <PHY_SPEED_3_125G>;
113         };
114         phy1 {
115                 phy-type = <PHY_TYPE_SGMII0>;
116                 phy-speed = <PHY_SPEED_3_125G>;
117         };
118
119         phy2 {
120                 phy-type = <PHY_TYPE_USB3_HOST1>;
121                 phy-speed = <PHY_SPEED_5G>;
122         };
123 };
124
125 &eth0 {
126         pinctrl-0 = <&pcie_pins>;
127         status = "okay";
128         phy-mode = "sgmii-2500";
129         managed = "in-band-status";
130         phy = <&ethphy0>;
131 };
132
133 &eth1 {
134         status = "okay";
135         phy-mode = "sgmii-2500";
136         managed = "in-band-status";
137         phy = <&ethphy1>;
138 };
139
140 &i2c0 {
141         pinctrl-names = "default";
142         pinctrl-0 = <&i2c1_pins>;
143         status = "okay";
144 };
145
146 &spi0 {
147         status = "okay";
148         pinctrl-names = "default";
149         pinctrl-0 = <&spi_quad_pins>;
150
151         spi-flash@0 {
152                 #address-cells = <1>;
153                 #size-cells = <1>;
154                 compatible = "n25q1024a","n25q512a";
155                 reg = <0>;
156                 spi-max-frequency = <50000000>;
157                 spi-rx-bus-width = <4>;
158                 spi-tx-bus-width = <4>;
159                 m25p,fast-read;
160
161                 partition@0 {
162                         label = "uboot";
163                         reg = <0 0x400000>;
164                 };
165         };
166 };
167
168 &sdhci1 {
169         non-removable;
170         mmc-ddr-1_8v;
171         mmc-hs200-1_8v;
172         bus-width = <4>;
173         vqmmc-supply = <&vcc_sd_reg0>;
174         pinctrl-names = "default";
175         pinctrl-0 = <&sdio_pins>;
176         status = "okay";
177
178         #address-cells = <1>;
179         #size-cells = <0>;
180         mmccard: mmccard@0 {
181                 compatible = "mmc-card";
182                 reg = <0>;
183         };
184 };
185
186 &uart0 {
187         pinctrl-names = "default";
188         pinctrl-0 = <&uart1_pins>;
189         status = "okay";
190 };
191
192 &usb3 {
193         status = "okay";
194 };