-// SPDX-License-Identifier: GPL-2.0
-/*
- * Device Tree Source for Meraki MR33 (Stinkbug)
- *
- * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
- * Copyright (C) 2017 Christian Lamparter <chunkeey@googlemail.com>
- *
- * Based on Cisco Meraki DTS from GPL release r25-linux-3.14-20170427
- *
- * This file is licensed under the terms of the GNU General Public
- * License version 2. This program is licensed "as is" without
- * any warranty of any kind, whether express or implied.
- */
-
-#include "qcom-ipq4019.dtsi"
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-#include <dt-bindings/soc/qcom,tcsr.h>
-
-/ {
- model = "Meraki MR33 Access Point";
- compatible = "meraki,mr33";
-
- aliases {
- led-boot = &status_green;
- led-failsafe = &status_red;
- led-running = &status_green;
- led-upgrade = &power_orange;
- };
-
- /* Do we really need this defined? */
- memory {
- device_type = "memory";
- reg = <0x80000000 0x10000000>;
- };
-
- soc {
- rng@22000 {
- status = "okay";
- };
-
- mdio@90000 {
- status = "okay";
- pinctrl-0 = <&mdio_pins>;
- pinctrl-names = "default";
- };
-
- /* It is a 56-bit counter that supplies the count to the ARM arch
- timers and without upstream driver */
- counter@4a1000 {
- compatible = "qcom,qca-gcnt";
- reg = <0x4a1000 0x4>;
- };
-
- ess_tcsr@1953000 {
- compatible = "qcom,tcsr";
- reg = <0x1953000 0x1000>;
- qcom,ess-interface-select = <TCSR_ESS_PSGMII_RGMII5>;
- };
-
- tcsr@1949000 {
- compatible = "qcom,tcsr";
- reg = <0x1949000 0x100>;
- qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
- };
-
- tcsr@1957000 {
- compatible = "qcom,tcsr";
- reg = <0x1957000 0x100>;
- qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
- };
-
- serial@78b0000 {
- pinctrl-0 = <&serial_1_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- bluetooth {
- compatible = "ti,cc2650";
- enable-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
- };
- };
-
- crypto@8e3a000 {
- status = "okay";
- };
-
- watchdog@b017000 {
- status = "okay";
- };
-
- ess-switch@c000000 {
- switch_mac_mode = <0x3>; /* mac mode for RGMII RMII */
- switch_lan_bmp = <0x0>; /* lan port bitmap */
- switch_wan_bmp = <0x10>; /* wan port bitmap */
- };
-
- edma@c080000 {
- qcom,single-phy;
- qcom,num_gmac = <1>;
- phy-mode = "rgmii-rxid";
- status = "okay";
- };
- };
-
- keys {
- compatible = "gpio-keys";
-
- reset {
- label = "reset";
- gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_orange: power {
- label = "mr33:orange:power";
- gpios = <&tlmm 49 GPIO_ACTIVE_LOW>;
- panic-indicator;
- };
- };
-};
-
-&blsp_dma {
- status = "okay";
-};
-
-&blsp1_uart1 {
- pinctrl-0 = <&serial_0_pins>;
- pinctrl-names = "default";
- status = "okay";
-};
-
-&cryptobam {
- status = "okay";
-};
-
-&gmac0 {
- qcom,phy_mdio_addr = <1>;
- qcom,poll_required = <1>;
- vlan_tag = <0 0x20>;
-};
-
-&blsp1_i2c3 {
- pinctrl-0 = <&i2c_0_pins>;
- pinctrl-names = "default";
- status = "okay";
- at24@50 {
- compatible = "atmel,24c64";
- pagesize = <32>;
- reg = <0x50>;
- read-only; /* This holds our MAC & Meraki board-data */
- };
-};
-
-&blsp1_i2c4 {
- pinctrl-0 = <&i2c_1_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- led-controller@30 {
- compatible = "ti,lp5562";
- reg = <0x30>;
- clock-mode = /bits/8 <2>;
- enable-gpio = <&tlmm 48 GPIO_ACTIVE_HIGH>;
-
- /* RGB led */
- status_red: chan0 {
- chan-name = "mr33:red:status";
- led-cur = /bits/ 8 <0x20>;
- max-cur = /bits/ 8 <0x60>;
- };
-
- status_green: chan1 {
- chan-name = "mr33:green:status";
- led-cur = /bits/ 8 <0x20>;
- max-cur = /bits/ 8 <0x60>;
- };
-
- chan2 {
- chan-name = "mr33:blue:status";
- led-cur = /bits/ 8 <0x20>;
- max-cur = /bits/ 8 <0x60>;
- };
-
- chan3 {
- chan-name = "mr33:white:status";
- led-cur = /bits/ 8 <0x20>;
- max-cur = /bits/ 8 <0x60>;
- };
- };
-};
-
-&nand {
- pinctrl-0 = <&nand_pins>;
- pinctrl-names = "default";
- status = "okay";
-
- nand@0 {
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- partition@0 {
- label = "sbl1";
- reg = <0x00000000 0x00100000>;
- read-only;
- };
- partition@100000 {
- label = "mibib";
- reg = <0x00100000 0x00100000>;
- read-only;
- };
- partition@200000 {
- label = "bootconfig";
- reg = <0x00200000 0x00100000>;
- read-only;
- };
- partition@300000 {
- label = "qsee";
- reg = <0x00300000 0x00100000>;
- read-only;
- };
- partition@400000 {
- label = "qsee_alt";
- reg = <0x00400000 0x00100000>;
- read-only;
- };
- partition@500000 {
- label = "cdt";
- reg = <0x00500000 0x00080000>;
- read-only;
- };
- partition@580000 {
- label = "cdt_alt";
- reg = <0x00580000 0x00080000>;
- read-only;
- };
- partition@600000 {
- label = "ddrparams";
- reg = <0x00600000 0x00080000>;
- read-only;
- };
- partition@700000 {
- label = "u-boot";
- reg = <0x00700000 0x00200000>;
- read-only;
- };
- partition@900000 {
- label = "u-boot-backup";
- reg = <0x00900000 0x00200000>;
- read-only;
- };
- partition@b00000 {
- label = "ART";
- reg = <0x00b00000 0x00080000>;
- read-only;
- };
- partition@c00000 {
- label = "ubi";
- reg = <0x00c00000 0x07000000>;
- /*
- * Do not try to allocate the remaining
- * 4 MiB to this ubi partition. It will
- * confuse the u-boot and it might not
- * find the kernel partition anymore.
- */
- };
- };
- };
-};
-
-&pcie0 {
- status = "okay";
- perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
- wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
-
- bridge@0,0 {
- reg = <0x00000000 0 0 0 0>;
- #address-cells = <3>;
- #size-cells = <2>;
- ranges;
-
- wifi2: wifi@1,0 {
- compatible = "qcom,ath10k";
- status = "okay";
- reg = <0x00010000 0 0 0 0>;
- };
- };
-};
-
-&qpic_bam {
- status = "okay";
-};
-
-&tlmm {
- /*
- * GPIO43 should be 0/1 whenever the unit is
- * powered through PoE or AC-Adapter.
- * That said, playing with this seems to
- * reset the AP.
- */
-
- mdio_pins: mdio_pinmux {
- mux_1 {
- pins = "gpio6";
- function = "mdio";
- bias-pull-up;
- };
- mux_2 {
- pins = "gpio7";
- function = "mdc";
- bias-pull-up;
- };
- };
-
- serial_0_pins: serial_pinmux {
- mux {
- pins = "gpio16", "gpio17";
- function = "blsp_uart0";
- bias-disable;
- };
- };
-
- serial_1_pins: serial1_pinmux {
- mux {
- /* We use the i2c-0 pins for serial_1 */
- pins = "gpio8", "gpio9";
- function = "blsp_uart1";
- bias-disable;
- };
- };
-
- i2c_0_pins: i2c_0_pinmux {
- pinmux {
- function = "blsp_i2c0";
- pins = "gpio20", "gpio21";
- };
- pinconf {
- pins = "gpio20", "gpio21";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- i2c_1_pins: i2c_1_pinmux {
- pinmux {
- function = "blsp_i2c1";
- pins = "gpio34", "gpio35";
- };
- pinconf {
- pins = "gpio34", "gpio35";
- drive-strength = <16>;
- bias-disable;
- };
- };
-
- nand_pins: nand_pins {
- /*
- * There are 18 pins. 15 pins are common between LCD and NAND.
- * The QPIC controller arbitrates between LCD and NAND. Of the
- * remaining 4, 2 are for NAND and 2 are for LCD exclusively.
- *
- * The meraki source hints that the bluetooth module claims
- * pin 52 as well. But sadly, there's no data whenever this
- * is a NAND or LCD exclusive pin or not.
- */
-
- pullups {
- pins = "gpio52", "gpio53", "gpio58",
- "gpio59";
- function = "qpic";
- bias-pull-up;
- };
-
- pulldowns {
- pins = "gpio54", "gpio55", "gpio56",
- "gpio57", "gpio60", "gpio61",
- "gpio62", "gpio63", "gpio64",
- "gpio65", "gpio66", "gpio67",
- "gpio68", "gpio69";
- function = "qpic";
- bias-pull-down;
- };
- };
-};
-
-&wifi0 {
- status = "okay";
- qcom,ath10k-calibration-variant = "Meraki-MR33";
-};
-
-&wifi1 {
- status = "okay";
- qcom,ath10k-calibration-variant = "Meraki-MR33";
-};
projects / oweals / openwrt.git / commitdiff