--- /dev/null
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca9556_avm_fritz-repeater.dtsi"
+
+/ {
+ compatible = "avm,fritzdvbc", "qca,qca9556";
+ model = "AVM FRITZ!WLAN Repeater DVB-C";
+
+ aliases {
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
+ };
+
+ led_spi {
+ compatible = "spi-gpio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ sck-gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
+ mosi-gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+ num-chipselects = <0>;
+
+ spi_gpio: led_gpio@0 {
+ compatible = "fairchild,74hc595";
+ reg = <0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ registers-number = <2>;
+ spi-max-frequency = <10000000>;
+
+ gpio_latch_bit {
+ gpio-hog;
+ gpios = <16 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "gpio-latch-bit";
+ };
+ };
+ };
+
+ /*
+ * GPIO pins 100 or greater in the vendor GPL dump are redirected
+ * to the shift register.
+ * So OEM source pin 100 becomes 0 on the SR and so forth.
+ */
+ leds {
+ compatible = "gpio-leds";
+
+ led_power: power {
+ label = "fritzdvbc:green:power";
+ gpios = <&spi_gpio 6 GPIO_ACTIVE_LOW>;
+ };
+
+ wlan {
+ label = "fritzdvbc:green:wlan";
+ gpios = <&spi_gpio 7 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "phy1tpt";
+ };
+
+ tv {
+ label = "fritzdvbc:green:tv";
+ gpios = <&spi_gpio 5 GPIO_ACTIVE_LOW>;
+ };
+
+ rssihigh {
+ label = "fritzdvbc:green:rssihigh";
+ gpios = <&spi_gpio 1 GPIO_ACTIVE_LOW>;
+ };
+
+ rssimediumhigh {
+ label = "fritzdvbc:green:rssimediumhigh";
+ gpios = <&spi_gpio 2 GPIO_ACTIVE_LOW>;
+ };
+
+ rssimedium {
+ label = "fritzdvbc:green:rssimedium";
+ gpios = <&spi_gpio 3 GPIO_ACTIVE_LOW>;
+ };
+
+ rssimediumlow {
+ label = "fritzdvbc:green:rssimediumlow";
+ gpios = <&spi_gpio 4 GPIO_ACTIVE_LOW>;
+ };
+
+ rssilow {
+ label = "fritzdvbc:green:rssilow";
+ gpios = <&spi_gpio 0 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&gpio {
+ reset-pcie-ep {
+ gpio-hog;
+ gpios = <109 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PCIE EP reset";
+ };
+
+ reset-pcie-bus {
+ gpio-hog;
+ gpios = <110 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PCIE Bus reset";
+ };
+};
ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth1"
ucidef_set_led_switch "lan" "LAN" "$boardname:green:lan" "switch0" "0x1E"
;;
+avm,fritzdvbc)
+ ucidef_set_rssimon "wlan1" "200000" "1"
+ ucidef_set_led_rssi "rssilow" "RSSILOW" "$boardname:green:rssilow" "wlan1" "1" "100"
+ ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "$boardname:green:rssimediumlow" "wlan1" "20" "100"
+ ucidef_set_led_rssi "rssimedium" "RSSIMEDIUM" "$boardname:green:rssimedium" "wlan1" "40" "100"
+ ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$boardname:green:rssimediumhigh" "wlan1" "60" "100"
+ ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:green:rssihigh" "wlan1" "80" "100"
+ ;;
comfast,cf-e110n-v2)
ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth1"
ucidef_set_led_switch "wan" "WAN" "$boardname:green:wan" "switch0" "0x02"
projects / oweals / openwrt.git / commitdiff