Refreshed all patches.
Remove upstreamed:
- 302-0002-dmaengine-dw-implement-per-channel-protection-contro.patch
Fixes:
- CVE-2019-19332
Compile-tested on: cns3xxx
Runtime-tested on: cns3xxx
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
endif
LINUX_VERSION-4.9 = .206
-LINUX_VERSION-4.14 = .158
+LINUX_VERSION-4.14 = .159
LINUX_VERSION-4.19 = .88
LINUX_KERNEL_HASH-4.9.206 = 1df27899a9bc4dd874f3830ab9e7b638f0026dffd67a2e230444e5d2805ccad6
-LINUX_KERNEL_HASH-4.14.158 = 0d49ec72e273f6fc7462ad56849b2285f13fd5f4185e8f932a0074fc2eca1bb3
+LINUX_KERNEL_HASH-4.14.159 = e8d42d3a1b85d180141e9bc11c4a0e87f8a413c0e989b0f24c1b7c40f8a826f2
LINUX_KERNEL_HASH-4.19.88 = c1923b6bd166e6dd07be860c15f59e8273aaa8692bc2a1fce1d31b826b9b3fbe
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -973,7 +973,7 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -969,7 +969,7 @@ u32 crypto4xx_build_pd(struct crypto_asy
sa->sa_command_1.bf.hash_crypto_offset = 0;
pd->pd_ctl.w = ctx->pd_ctl;
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1125,7 +1125,9 @@ struct crypto4xx_alg_common crypto4xx_al
+@@ -1121,7 +1121,9 @@ struct crypto4xx_alg_common crypto4xx_al
.cra_name = "cbc(aes)",
.cra_driver_name = "cbc-aes-ppc4xx",
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1090,7 +1090,6 @@ static void crypto4xx_bh_tasklet_cb(unsi
+@@ -1086,7 +1086,6 @@ static void crypto4xx_bh_tasklet_cb(unsi
pd->pd_ctl.bf.pe_done = 0;
crypto4xx_pd_done(core_dev->dev, tail);
crypto4xx_put_pd_to_pdr(core_dev->dev, tail);
#include <crypto/sha.h>
#include "crypto4xx_reg_def.h"
#include "crypto4xx_core.h"
-@@ -1144,6 +1145,103 @@ struct crypto4xx_alg_common crypto4xx_al
+@@ -1140,6 +1141,103 @@ struct crypto4xx_alg_common crypto4xx_al
}
}
}},
#include "crypto4xx_reg_def.h"
#include "crypto4xx_core.h"
#include "crypto4xx_sa.h"
-@@ -483,111 +484,44 @@ static inline struct ce_sd *crypto4xx_ge
+@@ -479,111 +480,44 @@ static inline struct ce_sd *crypto4xx_ge
return (struct ce_sd *)(dev->sdr + sizeof(struct ce_sd) * idx);
}
- dev->scatter_buffer_size * PPC4XX_NUM_SD,
+ PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
&dev->scatter_buffer_pa, GFP_ATOMIC);
- if (!dev->scatter_buffer_va) {
- dma_free_coherent(dev->core_dev->device,
-@@ -412,7 +411,7 @@ static u32 crypto4xx_build_sdr(struct cr
+ if (!dev->scatter_buffer_va)
+ return -ENOMEM;
+@@ -408,7 +407,7 @@ static u32 crypto4xx_build_sdr(struct cr
for (i = 0; i < PPC4XX_NUM_SD; i++) {
sd_array[i].ptr = dev->scatter_buffer_pa +
}
return 0;
-@@ -427,7 +426,7 @@ static void crypto4xx_destroy_sdr(struct
+@@ -423,7 +422,7 @@ static void crypto4xx_destroy_sdr(struct
if (dev->scatter_buffer_va)
dma_free_coherent(dev->core_dev->device,
/* alloc memory for scatter descriptor ring */
dev->sdr = dma_alloc_coherent(dev->core_dev->device,
-@@ -407,10 +403,8 @@ static u32 crypto4xx_build_sdr(struct cr
+@@ -403,10 +399,8 @@ static u32 crypto4xx_build_sdr(struct cr
+ if (!dev->scatter_buffer_va)
return -ENOMEM;
- }
- sd_array = dev->sdr;
-
PPC4XX_SD_BUFFER_SIZE * i;
}
-@@ -480,7 +474,7 @@ static inline struct ce_sd *crypto4xx_ge
+@@ -476,7 +470,7 @@ static inline struct ce_sd *crypto4xx_ge
{
*sd_dma = dev->sdr_pa + sizeof(struct ce_sd) * idx;
}
static void crypto4xx_copy_pkt_to_dst(struct crypto4xx_device *dev,
-@@ -529,11 +523,10 @@ static u32 crypto4xx_copy_digest_to_dst(
+@@ -525,11 +519,10 @@ static u32 crypto4xx_copy_digest_to_dst(
struct crypto4xx_ctx *ctx)
{
struct dynamic_sa_ctl *sa = (struct dynamic_sa_ctl *) ctx->sa_in;
SA_HASH_ALG_SHA1_DIGEST_SIZE);
}
-@@ -616,11 +609,9 @@ static u32 crypto4xx_ahash_done(struct c
+@@ -612,11 +605,9 @@ static u32 crypto4xx_ahash_done(struct c
static u32 crypto4xx_pd_done(struct crypto4xx_device *dev, u32 idx)
{
if (crypto_tfm_alg_type(pd_uinfo->async_req->tfm) ==
CRYPTO_ALG_TYPE_ABLKCIPHER)
return crypto4xx_ablkcipher_done(dev, pd_uinfo, pd);
-@@ -721,7 +712,6 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -717,7 +708,6 @@ u32 crypto4xx_build_pd(struct crypto_asy
unsigned long flags;
struct pd_uinfo *pd_uinfo = NULL;
unsigned int nbytes = datalen, idx;
u32 gd_idx = 0;
/* figure how many gd is needed */
-@@ -780,17 +770,15 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -776,17 +766,15 @@ u32 crypto4xx_build_pd(struct crypto_asy
}
spin_unlock_irqrestore(&dev->core_dev->lock, flags);
if (ctx->direction == DIR_INBOUND)
memcpy(sa, ctx->sa_in, ctx->sa_len * 4);
else
-@@ -800,14 +788,15 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -796,14 +784,15 @@ u32 crypto4xx_build_pd(struct crypto_asy
&pd_uinfo->sr_pa, 4);
if (iv_len)
}
}
pd->sa_len = ctx->sa_len;
-@@ -1015,9 +1004,8 @@ static void crypto4xx_bh_tasklet_cb(unsi
+@@ -1011,9 +1000,8 @@ static void crypto4xx_bh_tasklet_cb(unsi
while (core_dev->dev->pdr_head != core_dev->dev->pdr_tail) {
tail = core_dev->dev->pdr_tail;
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1157,7 +1157,7 @@ struct crypto4xx_alg_common crypto4xx_al
+@@ -1153,7 +1153,7 @@ struct crypto4xx_alg_common crypto4xx_al
.min_keysize = AES_MIN_KEY_SIZE,
.max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_IV_SIZE,
#include "crypto4xx_reg_def.h"
#include "crypto4xx_core.h"
#include "crypto4xx_sa.h"
-@@ -582,8 +583,10 @@ static u32 crypto4xx_ablkcipher_done(str
+@@ -578,8 +579,10 @@ static u32 crypto4xx_ablkcipher_done(str
}
crypto4xx_ret_sg_desc(dev, pd_uinfo);
return 0;
}
-@@ -600,9 +603,10 @@ static u32 crypto4xx_ahash_done(struct c
+@@ -596,9 +599,10 @@ static u32 crypto4xx_ahash_done(struct c
crypto4xx_copy_digest_to_dst(pd_uinfo,
crypto_tfm_ctx(ahash_req->base.tfm));
crypto4xx_ret_sg_desc(dev, pd_uinfo);
return 0;
}
-@@ -713,6 +717,7 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -709,6 +713,7 @@ u32 crypto4xx_build_pd(struct crypto_asy
struct pd_uinfo *pd_uinfo = NULL;
unsigned int nbytes = datalen, idx;
u32 gd_idx = 0;
/* figure how many gd is needed */
num_gd = sg_nents_for_len(src, datalen);
-@@ -743,6 +748,31 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -739,6 +744,31 @@ u32 crypto4xx_build_pd(struct crypto_asy
* already got must be return the original place.
*/
spin_lock_irqsave(&dev->core_dev->lock, flags);
if (num_gd) {
fst_gd = crypto4xx_get_n_gd(dev, num_gd);
if (fst_gd == ERING_WAS_FULL) {
-@@ -897,11 +927,12 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -893,11 +923,12 @@ u32 crypto4xx_build_pd(struct crypto_asy
sa->sa_command_1.bf.hash_crypto_offset = 0;
pd->pd_ctl.w = ctx->pd_ctl;
pd->pd_ctl_len.w = 0x00400000 | datalen;
}
/**
-@@ -1006,7 +1037,7 @@ static void crypto4xx_bh_tasklet_cb(unsi
+@@ -1002,7 +1033,7 @@ static void crypto4xx_bh_tasklet_cb(unsi
tail = core_dev->dev->pdr_tail;
pd_uinfo = &core_dev->dev->pdr_uinfo[tail];
pd = &core_dev->dev->pdr[tail];
ctx->is_hash = 0;
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -623,42 +623,6 @@ static u32 crypto4xx_pd_done(struct cryp
+@@ -619,42 +619,6 @@ static u32 crypto4xx_pd_done(struct cryp
return crypto4xx_ahash_done(dev, pd_uinfo);
}
static void crypto4xx_stop_all(struct crypto4xx_core_device *core_dev)
{
crypto4xx_destroy_pdr(core_dev->dev);
-@@ -818,8 +782,8 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -814,8 +778,8 @@ u32 crypto4xx_build_pd(struct crypto_asy
&pd_uinfo->sr_pa, 4);
if (iv_len)
/**
* alloc memory for the gather ring
* no need to alloc buf for the ring
-@@ -520,18 +514,16 @@ static void crypto4xx_copy_pkt_to_dst(st
+@@ -516,18 +510,16 @@ static void crypto4xx_copy_pkt_to_dst(st
}
}
}
static void crypto4xx_ret_sg_desc(struct crypto4xx_device *dev,
-@@ -600,7 +592,7 @@ static u32 crypto4xx_ahash_done(struct c
+@@ -596,7 +588,7 @@ static u32 crypto4xx_ahash_done(struct c
ahash_req = ahash_request_cast(pd_uinfo->async_req);
ctx = crypto_tfm_ctx(ahash_req->base.tfm);
crypto_tfm_ctx(ahash_req->base.tfm));
crypto4xx_ret_sg_desc(dev, pd_uinfo);
-@@ -660,17 +652,17 @@ static u32 get_next_sd(u32 current)
+@@ -656,17 +648,17 @@ static u32 get_next_sd(u32 current)
return 0;
}
struct ce_gd *gd;
struct ce_pd *pd;
u32 num_gd, num_sd;
-@@ -678,8 +670,9 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -674,8 +666,9 @@ u32 crypto4xx_build_pd(struct crypto_asy
u32 fst_sd = 0xffffffff;
u32 pd_entry;
unsigned long flags;
u32 gd_idx = 0;
bool is_busy;
-@@ -693,7 +686,7 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -689,7 +682,7 @@ u32 crypto4xx_build_pd(struct crypto_asy
num_gd = 0;
/* figure how many sd is needed */
num_sd = 0;
} else {
if (datalen > PPC4XX_SD_BUFFER_SIZE) {
-@@ -764,37 +757,27 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -760,37 +753,27 @@ u32 crypto4xx_build_pd(struct crypto_asy
}
spin_unlock_irqrestore(&dev->core_dev->lock, flags);
/* get first gd we are going to use */
gd_idx = fst_gd;
pd_uinfo->first_gd = fst_gd;
-@@ -803,27 +786,30 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -799,27 +782,30 @@ u32 crypto4xx_build_pd(struct crypto_asy
pd->src = gd_dma;
/* enable gather */
sa->sa_command_0.bf.gather = 1;
/*
* Disable gather in sa command
*/
-@@ -834,25 +820,24 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -830,25 +816,24 @@ u32 crypto4xx_build_pd(struct crypto_asy
pd_uinfo->first_gd = 0xffffffff;
pd_uinfo->num_gd = 0;
}
u32 sd_idx = fst_sd;
nbytes = datalen;
sa->sa_command_0.bf.scatter = 1;
-@@ -866,7 +851,6 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -862,7 +847,6 @@ u32 crypto4xx_build_pd(struct crypto_asy
sd->ctl.done = 0;
sd->ctl.rdy = 1;
/* sd->ptr should be setup by sd_init routine*/
if (nbytes >= PPC4XX_SD_BUFFER_SIZE)
nbytes -= PPC4XX_SD_BUFFER_SIZE;
else
-@@ -877,19 +861,23 @@ u32 crypto4xx_build_pd(struct crypto_asy
+@@ -873,19 +857,23 @@ u32 crypto4xx_build_pd(struct crypto_asy
/* setup scatter descriptor */
sd->ctl.done = 0;
sd->ctl.rdy = 1;
if (n >= PPC4XX_NUM_GD)
return ERING_WAS_FULL;
-@@ -625,17 +626,6 @@ static void crypto4xx_stop_all(struct cr
+@@ -621,17 +622,6 @@ static void crypto4xx_stop_all(struct cr
kfree(core_dev);
}
}
/**
-@@ -863,16 +866,16 @@ int crypto4xx_build_pd(struct crypto_asy
+@@ -859,16 +862,16 @@ int crypto4xx_build_pd(struct crypto_asy
}
}
writel(1, dev->ce_base + CRYPTO4XX_INT_DESCR_RD);
return is_busy ? -EBUSY : -EINPROGRESS;
}
-@@ -973,23 +976,23 @@ static void crypto4xx_bh_tasklet_cb(unsi
+@@ -969,23 +972,23 @@ static void crypto4xx_bh_tasklet_cb(unsi
struct crypto4xx_core_device *core_dev = dev_get_drvdata(dev);
struct pd_uinfo *pd_uinfo;
struct ce_pd *pd;
/**
* alloc memory for the gather ring
* no need to alloc buf for the ring
-@@ -892,8 +861,6 @@ static int crypto4xx_alg_init(struct cry
+@@ -888,8 +857,6 @@ static int crypto4xx_alg_init(struct cry
ctx->dev = amcc_alg->dev;
ctx->sa_in = NULL;
ctx->sa_out = NULL;
ctx->sa_len = 0;
switch (alg->cra_flags & CRYPTO_ALG_TYPE_MASK) {
-@@ -914,7 +881,6 @@ static void crypto4xx_alg_exit(struct cr
+@@ -910,7 +877,6 @@ static void crypto4xx_alg_exit(struct cr
struct crypto4xx_ctx *ctx = crypto_tfm_ctx(tfm);
crypto4xx_free_sa(ctx);
#include <crypto/internal/skcipher.h>
#include "crypto4xx_reg_def.h"
#include "crypto4xx_core.h"
-@@ -518,7 +520,7 @@ static void crypto4xx_ret_sg_desc(struct
+@@ -514,7 +516,7 @@ static void crypto4xx_ret_sg_desc(struct
}
}
struct pd_uinfo *pd_uinfo,
struct ce_pd *pd)
{
-@@ -552,11 +554,9 @@ static u32 crypto4xx_ablkcipher_done(str
+@@ -548,11 +550,9 @@ static u32 crypto4xx_ablkcipher_done(str
if (pd_uinfo->state & PD_ENTRY_BUSY)
ablkcipher_request_complete(ablk_req, -EINPROGRESS);
ablkcipher_request_complete(ablk_req, 0);
struct pd_uinfo *pd_uinfo)
{
struct crypto4xx_ctx *ctx;
-@@ -572,20 +572,88 @@ static u32 crypto4xx_ahash_done(struct c
+@@ -568,20 +568,88 @@ static u32 crypto4xx_ahash_done(struct c
if (pd_uinfo->state & PD_ENTRY_BUSY)
ahash_request_complete(ahash_req, -EINPROGRESS);
ahash_request_complete(ahash_req, 0);
}
static void crypto4xx_stop_all(struct crypto4xx_core_device *core_dev)
-@@ -621,8 +689,10 @@ int crypto4xx_build_pd(struct crypto_asy
+@@ -617,8 +685,10 @@ int crypto4xx_build_pd(struct crypto_asy
const unsigned int datalen,
const __le32 *iv, const u32 iv_len,
const struct dynamic_sa_ctl *req_sa,
struct crypto4xx_device *dev = ctx->dev;
struct dynamic_sa_ctl *sa;
struct ce_gd *gd;
-@@ -636,18 +706,25 @@ int crypto4xx_build_pd(struct crypto_asy
+@@ -632,18 +702,25 @@ int crypto4xx_build_pd(struct crypto_asy
unsigned int nbytes = datalen;
size_t offset_to_sr_ptr;
u32 gd_idx = 0;
if (sg_is_last(dst)) {
num_sd = 0;
} else {
-@@ -733,6 +810,7 @@ int crypto4xx_build_pd(struct crypto_asy
+@@ -729,6 +806,7 @@ int crypto4xx_build_pd(struct crypto_asy
sa = pd_uinfo->sa_va;
memcpy(sa, req_sa, sa_len * 4);
offset_to_sr_ptr = get_dynamic_sa_offset_state_ptr_field(sa);
*(u32 *)((unsigned long)sa + offset_to_sr_ptr) = pd_uinfo->sr_pa;
-@@ -839,7 +917,7 @@ int crypto4xx_build_pd(struct crypto_asy
+@@ -835,7 +913,7 @@ int crypto4xx_build_pd(struct crypto_asy
((crypto_tfm_alg_type(req->tfm) == CRYPTO_ALG_TYPE_AHASH) |
(crypto_tfm_alg_type(req->tfm) == CRYPTO_ALG_TYPE_AEAD) ?
PD_CTL_HASH_FINAL : 0);
pd_uinfo->state = PD_ENTRY_INUSE | (is_busy ? PD_ENTRY_BUSY : 0);
wmb();
-@@ -852,40 +930,68 @@ int crypto4xx_build_pd(struct crypto_asy
+@@ -848,40 +926,68 @@ int crypto4xx_build_pd(struct crypto_asy
/**
* Algorithm Registration Functions
*/
{
struct crypto4xx_alg *alg;
int i;
-@@ -900,6 +1006,10 @@ int crypto4xx_register_alg(struct crypto
+@@ -896,6 +1002,10 @@ int crypto4xx_register_alg(struct crypto
alg->dev = sec_dev;
switch (alg->alg.type) {
case CRYPTO_ALG_TYPE_AHASH:
rc = crypto_register_ahash(&alg->alg.u.hash);
break;
-@@ -929,6 +1039,10 @@ static void crypto4xx_unregister_alg(str
+@@ -925,6 +1035,10 @@ static void crypto4xx_unregister_alg(str
crypto_unregister_ahash(&alg->alg.u.hash);
break;
default:
crypto_unregister_alg(&alg->alg.u.cipher);
}
-@@ -982,7 +1096,7 @@ static irqreturn_t crypto4xx_ce_interrup
+@@ -978,7 +1092,7 @@ static irqreturn_t crypto4xx_ce_interrup
/**
* Supported Crypto Algorithms
*/
/* Crypto AES modes */
{ .type = CRYPTO_ALG_TYPE_ABLKCIPHER, .u.cipher = {
.cra_name = "cbc(aes)",
-@@ -994,8 +1108,8 @@ struct crypto4xx_alg_common crypto4xx_al
+@@ -990,8 +1104,8 @@ struct crypto4xx_alg_common crypto4xx_al
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
.cra_type = &crypto_ablkcipher_type,
.cra_module = THIS_MODULE,
.cra_u = {
.ablkcipher = {
-@@ -1018,8 +1132,8 @@ struct crypto4xx_alg_common crypto4xx_al
+@@ -1014,8 +1128,8 @@ struct crypto4xx_alg_common crypto4xx_al
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
.cra_type = &crypto_ablkcipher_type,
.cra_module = THIS_MODULE,
.cra_u = {
.ablkcipher = {
-@@ -1042,8 +1156,8 @@ struct crypto4xx_alg_common crypto4xx_al
+@@ -1038,8 +1152,8 @@ struct crypto4xx_alg_common crypto4xx_al
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
.cra_type = &crypto_ablkcipher_type,
.cra_module = THIS_MODULE,
.cra_u = {
.ablkcipher = {
-@@ -1068,8 +1182,8 @@ struct crypto4xx_alg_common crypto4xx_al
+@@ -1064,8 +1178,8 @@ struct crypto4xx_alg_common crypto4xx_al
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
.cra_type = &crypto_ablkcipher_type,
.cra_module = THIS_MODULE,
.cra_u = {
.ablkcipher = {
-@@ -1091,8 +1205,8 @@ struct crypto4xx_alg_common crypto4xx_al
+@@ -1087,8 +1201,8 @@ struct crypto4xx_alg_common crypto4xx_al
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
.cra_type = &crypto_ablkcipher_type,
.cra_module = THIS_MODULE,
.cra_u = {
.ablkcipher = {
-@@ -1158,6 +1272,7 @@ static int crypto4xx_probe(struct platfo
+@@ -1154,6 +1268,7 @@ static int crypto4xx_probe(struct platfo
core_dev->device = dev;
spin_lock_init(&core_dev->lock);
INIT_LIST_HEAD(&core_dev->dev->alg_list);
*/
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1219,6 +1219,29 @@ static struct crypto4xx_alg_common crypt
+@@ -1215,6 +1215,29 @@ static struct crypto4xx_alg_common crypt
}
}
} },
#include <crypto/sha.h>
#include <crypto/scatterwalk.h>
#include <crypto/internal/aead.h>
-@@ -1236,6 +1237,27 @@ static struct crypto4xx_alg_common crypt
+@@ -1232,6 +1233,27 @@ static struct crypto4xx_alg_common crypt
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
.cra_flags = CRYPTO_ALG_ASYNC |
CRYPTO_ALG_NEED_FALLBACK |
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1084,9 +1084,6 @@ static irqreturn_t crypto4xx_ce_interrup
+@@ -1080,9 +1080,6 @@ static irqreturn_t crypto4xx_ce_interrup
struct device *dev = (struct device *)data;
struct crypto4xx_core_device *core_dev = dev_get_drvdata(dev);
writel(PPC4XX_INTERRUPT_CLR,
core_dev->dev->ce_base + CRYPTO4XX_INT_CLR);
tasklet_schedule(&core_dev->tasklet);
-@@ -1334,13 +1331,6 @@ static int crypto4xx_probe(struct platfo
+@@ -1330,13 +1327,6 @@ static int crypto4xx_probe(struct platfo
tasklet_init(&core_dev->tasklet, crypto4xx_bh_tasklet_cb,
(unsigned long) dev);
core_dev->dev->ce_base = of_iomap(ofdev->dev.of_node, 0);
if (!core_dev->dev->ce_base) {
dev_err(dev, "failed to of_iomap\n");
-@@ -1348,6 +1338,13 @@ static int crypto4xx_probe(struct platfo
+@@ -1344,6 +1334,13 @@ static int crypto4xx_probe(struct platfo
goto err_iomap;
}
/* need to setup pdr, rdr, gdr and sdr before this */
crypto4xx_hw_init(core_dev->dev);
-@@ -1361,11 +1358,11 @@ static int crypto4xx_probe(struct platfo
+@@ -1357,11 +1354,11 @@ static int crypto4xx_probe(struct platfo
return 0;
err_start_dev:
}
int crypto4xx_alloc_sa(struct crypto4xx_ctx *ctx, u32 size)
-@@ -1079,18 +1086,29 @@ static void crypto4xx_bh_tasklet_cb(unsi
+@@ -1075,18 +1082,29 @@ static void crypto4xx_bh_tasklet_cb(unsi
/**
* Top Half of isr.
*/
/**
* Supported Crypto Algorithms
*/
-@@ -1272,6 +1290,8 @@ static int crypto4xx_probe(struct platfo
+@@ -1268,6 +1286,8 @@ static int crypto4xx_probe(struct platfo
struct resource res;
struct device *dev = &ofdev->dev;
struct crypto4xx_core_device *core_dev;
rc = of_address_to_resource(ofdev->dev.of_node, 0, &res);
if (rc)
-@@ -1288,6 +1308,7 @@ static int crypto4xx_probe(struct platfo
+@@ -1284,6 +1304,7 @@ static int crypto4xx_probe(struct platfo
mfdcri(SDR0, PPC405EX_SDR0_SRST) | PPC405EX_CE_RESET);
mtdcri(SDR0, PPC405EX_SDR0_SRST,
mfdcri(SDR0, PPC405EX_SDR0_SRST) & ~PPC405EX_CE_RESET);
} else if (of_find_compatible_node(NULL, NULL,
"amcc,ppc460sx-crypto")) {
mtdcri(SDR0, PPC460SX_SDR0_SRST,
-@@ -1310,7 +1331,22 @@ static int crypto4xx_probe(struct platfo
+@@ -1306,7 +1327,22 @@ static int crypto4xx_probe(struct platfo
if (!core_dev->dev)
goto err_alloc_dev;
core_dev->device = dev;
spin_lock_init(&core_dev->lock);
INIT_LIST_HEAD(&core_dev->dev->alg_list);
-@@ -1340,7 +1376,9 @@ static int crypto4xx_probe(struct platfo
+@@ -1336,7 +1372,9 @@ static int crypto4xx_probe(struct platfo
/* Register for Crypto isr, Crypto Engine IRQ */
core_dev->irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1379,7 +1379,7 @@ static int crypto4xx_probe(struct platfo
+@@ -1375,7 +1375,7 @@ static int crypto4xx_probe(struct platfo
rc = request_irq(core_dev->irq, is_revb ?
crypto4xx_ce_interrupt_handler_revb :
crypto4xx_ce_interrupt_handler, 0,
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1441,7 +1441,7 @@ MODULE_DEVICE_TABLE(of, crypto4xx_match)
+@@ -1437,7 +1437,7 @@ MODULE_DEVICE_TABLE(of, crypto4xx_match)
static struct platform_driver crypto4xx_driver = {
.driver = {
SA_CIPHER_ALG_AES,
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -586,15 +586,14 @@ static void crypto4xx_aead_done(struct c
+@@ -582,15 +582,14 @@ static void crypto4xx_aead_done(struct c
struct pd_uinfo *pd_uinfo,
struct ce_pd *pd)
{
if (pd_uinfo->using_sd) {
crypto4xx_copy_pkt_to_dst(dev, pd, pd_uinfo,
pd->pd_ctl_len.bf.pkt_len,
-@@ -606,38 +605,39 @@ static void crypto4xx_aead_done(struct c
+@@ -602,38 +601,39 @@ static void crypto4xx_aead_done(struct c
if (pd_uinfo->sa_va->sa_command_0.bf.dir == DIR_OUTBOUND) {
/* append icv at the end */
/**
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -589,7 +589,7 @@ static void crypto4xx_aead_done(struct c
+@@ -585,7 +585,7 @@ static void crypto4xx_aead_done(struct c
struct scatterlist *dst = pd_uinfo->dest_va;
size_t cp_len = crypto_aead_authsize(
crypto_aead_reqtfm(aead_req));
int err = 0;
if (pd_uinfo->using_sd) {
-@@ -604,7 +604,7 @@ static void crypto4xx_aead_done(struct c
+@@ -600,7 +600,7 @@ static void crypto4xx_aead_done(struct c
if (pd_uinfo->sa_va->sa_command_0.bf.dir == DIR_OUTBOUND) {
/* append icv at the end */
crypto4xx_memcpy_from_le32(icv, pd_uinfo->sr_va->save_digest,
scatterwalk_map_and_copy(icv, dst, aead_req->cryptlen,
cp_len, 1);
-@@ -614,7 +614,7 @@ static void crypto4xx_aead_done(struct c
+@@ -610,7 +610,7 @@ static void crypto4xx_aead_done(struct c
aead_req->assoclen + aead_req->cryptlen -
cp_len, cp_len, 0);
if (crypto_memneq(icv, pd_uinfo->sr_va->save_digest, cp_len))
err = -EBADMSG;
-@@ -1131,8 +1131,8 @@ static struct crypto4xx_alg_common crypt
+@@ -1127,8 +1127,8 @@ static struct crypto4xx_alg_common crypt
.max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_IV_SIZE,
.setkey = crypto4xx_setkey_aes_cbc,
}
}
}},
-@@ -1155,8 +1155,8 @@ static struct crypto4xx_alg_common crypt
+@@ -1151,8 +1151,8 @@ static struct crypto4xx_alg_common crypt
.max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_IV_SIZE,
.setkey = crypto4xx_setkey_aes_cfb,
}
}
} },
-@@ -1204,8 +1204,8 @@ static struct crypto4xx_alg_common crypt
+@@ -1200,8 +1200,8 @@ static struct crypto4xx_alg_common crypt
.min_keysize = AES_MIN_KEY_SIZE,
.max_keysize = AES_MAX_KEY_SIZE,
.setkey = crypto4xx_setkey_aes_ecb,
}
}
} },
-@@ -1228,8 +1228,8 @@ static struct crypto4xx_alg_common crypt
+@@ -1224,8 +1224,8 @@ static struct crypto4xx_alg_common crypt
.max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_IV_SIZE,
.setkey = crypto4xx_setkey_aes_ofb,
#include <crypto/internal/aead.h>
#include <crypto/internal/skcipher.h>
#include "crypto4xx_reg_def.h"
-@@ -526,21 +527,19 @@ static void crypto4xx_ret_sg_desc(struct
+@@ -522,21 +523,19 @@ static void crypto4xx_ret_sg_desc(struct
}
}
} else {
dst = pd_uinfo->dest_va;
addr = dma_map_page(dev->core_dev->device, sg_page(dst),
-@@ -558,8 +557,8 @@ static void crypto4xx_ablkcipher_done(st
+@@ -554,8 +553,8 @@ static void crypto4xx_ablkcipher_done(st
crypto4xx_ret_sg_desc(dev, pd_uinfo);
if (pd_uinfo->state & PD_ENTRY_BUSY)
}
static void crypto4xx_ahash_done(struct crypto4xx_device *dev,
-@@ -650,8 +649,8 @@ static void crypto4xx_pd_done(struct cry
+@@ -646,8 +645,8 @@ static void crypto4xx_pd_done(struct cry
struct pd_uinfo *pd_uinfo = &dev->pdr_uinfo[idx];
switch (crypto_tfm_alg_type(pd_uinfo->async_req->tfm)) {
break;
case CRYPTO_ALG_TYPE_AEAD:
crypto4xx_aead_done(dev, pd_uinfo, pd);
-@@ -945,15 +944,14 @@ static void crypto4xx_ctx_init(struct cr
+@@ -941,15 +940,14 @@ static void crypto4xx_ctx_init(struct cr
ctx->sa_len = 0;
}
return 0;
}
-@@ -962,9 +960,11 @@ static void crypto4xx_common_exit(struct
+@@ -958,9 +956,11 @@ static void crypto4xx_common_exit(struct
crypto4xx_free_sa(ctx);
}
}
static int crypto4xx_aead_init(struct crypto_aead *tfm)
-@@ -1021,7 +1021,7 @@ static int crypto4xx_register_alg(struct
+@@ -1017,7 +1017,7 @@ static int crypto4xx_register_alg(struct
break;
default:
break;
}
-@@ -1050,7 +1050,7 @@ static void crypto4xx_unregister_alg(str
+@@ -1046,7 +1046,7 @@ static void crypto4xx_unregister_alg(str
break;
default:
}
kfree(alg);
}
-@@ -1112,126 +1112,109 @@ static irqreturn_t crypto4xx_ce_interrup
+@@ -1108,126 +1108,109 @@ static irqreturn_t crypto4xx_ce_interrup
*/
static struct crypto4xx_alg_common crypto4xx_alg[] = {
/* Crypto AES modes */
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -950,6 +950,19 @@ static int crypto4xx_sk_init(struct cryp
+@@ -946,6 +946,19 @@ static int crypto4xx_sk_init(struct cryp
struct crypto4xx_alg *amcc_alg;
struct crypto4xx_ctx *ctx = crypto_skcipher_ctx(sk);
amcc_alg = container_of(alg, struct crypto4xx_alg, alg.u.cipher);
crypto4xx_ctx_init(amcc_alg, ctx);
return 0;
-@@ -965,6 +978,8 @@ static void crypto4xx_sk_exit(struct cry
+@@ -961,6 +974,8 @@ static void crypto4xx_sk_exit(struct cry
struct crypto4xx_ctx *ctx = crypto_skcipher_ctx(sk);
crypto4xx_common_exit(ctx);
}
static int crypto4xx_aead_init(struct crypto_aead *tfm)
-@@ -1154,6 +1169,28 @@ static struct crypto4xx_alg_common crypt
+@@ -1150,6 +1165,28 @@ static struct crypto4xx_alg_common crypt
.init = crypto4xx_sk_init,
.exit = crypto4xx_sk_exit,
} },
/**
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -695,9 +695,9 @@ int crypto4xx_build_pd(struct crypto_asy
+@@ -691,9 +691,9 @@ int crypto4xx_build_pd(struct crypto_asy
const __le32 *iv, const u32 iv_len,
const struct dynamic_sa_ctl *req_sa,
const unsigned int sa_len,
struct crypto4xx_device *dev = ctx->dev;
struct dynamic_sa_ctl *sa;
struct ce_gd *gd;
-@@ -996,9 +996,9 @@ static int crypto4xx_aead_init(struct cr
+@@ -992,9 +992,9 @@ static int crypto4xx_aead_init(struct cr
amcc_alg = container_of(alg, struct crypto4xx_alg, alg.u.aead);
crypto4xx_ctx_init(amcc_alg, ctx);
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1132,8 +1132,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1128,8 +1128,7 @@ static struct crypto4xx_alg_common crypt
.cra_name = "cbc(aes)",
.cra_driver_name = "cbc-aes-ppc4xx",
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
CRYPTO_ALG_KERN_DRIVER_ONLY,
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
-@@ -1153,8 +1152,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1149,8 +1148,7 @@ static struct crypto4xx_alg_common crypt
.cra_name = "cfb(aes)",
.cra_driver_name = "cfb-aes-ppc4xx",
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
CRYPTO_ALG_KERN_DRIVER_ONLY,
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
-@@ -1174,8 +1172,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1170,8 +1168,7 @@ static struct crypto4xx_alg_common crypt
.cra_name = "ctr(aes)",
.cra_driver_name = "ctr-aes-ppc4xx",
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
CRYPTO_ALG_ASYNC |
CRYPTO_ALG_KERN_DRIVER_ONLY,
.cra_blocksize = AES_BLOCK_SIZE,
-@@ -1196,8 +1193,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1192,8 +1189,7 @@ static struct crypto4xx_alg_common crypt
.cra_name = "rfc3686(ctr(aes))",
.cra_driver_name = "rfc3686-ctr-aes-ppc4xx",
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
CRYPTO_ALG_KERN_DRIVER_ONLY,
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
-@@ -1217,8 +1213,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1213,8 +1209,7 @@ static struct crypto4xx_alg_common crypt
.cra_name = "ecb(aes)",
.cra_driver_name = "ecb-aes-ppc4xx",
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
CRYPTO_ALG_KERN_DRIVER_ONLY,
.cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
-@@ -1237,8 +1232,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1233,8 +1228,7 @@ static struct crypto4xx_alg_common crypt
.cra_name = "ofb(aes)",
.cra_driver_name = "ofb-aes-ppc4xx",
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -596,7 +596,7 @@ static void crypto4xx_aead_done(struct c
+@@ -592,7 +592,7 @@ static void crypto4xx_aead_done(struct c
pd->pd_ctl_len.bf.pkt_len,
dst);
} else {
#include <crypto/internal/skcipher.h>
#include "crypto4xx_reg_def.h"
#include "crypto4xx_core.h"
-@@ -1035,6 +1037,10 @@ static int crypto4xx_register_alg(struct
+@@ -1031,6 +1033,10 @@ static int crypto4xx_register_alg(struct
rc = crypto_register_ahash(&alg->alg.u.hash);
break;
default:
rc = crypto_register_skcipher(&alg->alg.u.cipher);
break;
-@@ -1064,6 +1070,10 @@ static void crypto4xx_unregister_alg(str
+@@ -1060,6 +1066,10 @@ static void crypto4xx_unregister_alg(str
crypto_unregister_aead(&alg->alg.u.aead);
break;
default:
crypto_unregister_skcipher(&alg->alg.u.cipher);
}
-@@ -1122,6 +1132,69 @@ static irqreturn_t crypto4xx_ce_interrup
+@@ -1118,6 +1128,69 @@ static irqreturn_t crypto4xx_ce_interrup
PPC4XX_TMO_ERR_INT);
}
/**
* Supported Crypto Algorithms
*/
-@@ -1291,6 +1364,18 @@ static struct crypto4xx_alg_common crypt
+@@ -1287,6 +1360,18 @@ static struct crypto4xx_alg_common crypt
.cra_module = THIS_MODULE,
},
} },
};
/**
-@@ -1360,6 +1445,7 @@ static int crypto4xx_probe(struct platfo
+@@ -1356,6 +1441,7 @@ static int crypto4xx_probe(struct platfo
core_dev->dev->core_dev = core_dev;
core_dev->dev->is_revb = is_revb;
core_dev->device = dev;
spin_lock_init(&core_dev->lock);
INIT_LIST_HEAD(&core_dev->dev->alg_list);
ratelimit_default_init(&core_dev->dev->aead_ratelimit);
-@@ -1439,6 +1525,7 @@ static int crypto4xx_remove(struct platf
+@@ -1435,6 +1521,7 @@ static int crypto4xx_remove(struct platf
tasklet_kill(&core_dev->tasklet);
/* Un-register with Linux CryptoAPI */
crypto4xx_unregister_alg(core_dev->dev);
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1248,7 +1248,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1244,7 +1244,7 @@ static struct crypto4xx_alg_common crypt
.cra_flags = CRYPTO_ALG_NEED_FALLBACK |
CRYPTO_ALG_ASYNC |
CRYPTO_ALG_KERN_DRIVER_ONLY,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
.cra_module = THIS_MODULE,
},
-@@ -1268,7 +1268,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1264,7 +1264,7 @@ static struct crypto4xx_alg_common crypt
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
.cra_flags = CRYPTO_ALG_ASYNC |
CRYPTO_ALG_KERN_DRIVER_ONLY,
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1227,7 +1227,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1223,7 +1223,7 @@ static struct crypto4xx_alg_common crypt
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
.cra_flags = CRYPTO_ALG_ASYNC |
CRYPTO_ALG_KERN_DRIVER_ONLY,
.cra_ctxsize = sizeof(struct crypto4xx_ctx),
.cra_module = THIS_MODULE,
},
-@@ -1307,7 +1307,7 @@ static struct crypto4xx_alg_common crypt
+@@ -1303,7 +1303,7 @@ static struct crypto4xx_alg_common crypt
.cra_priority = CRYPTO4XX_CRYPTO_PRIORITY,
.cra_flags = CRYPTO_ALG_ASYNC |
CRYPTO_ALG_KERN_DRIVER_ONLY,
static int crypto4xx_sk_setup_fallback(struct crypto4xx_ctx *ctx,
--- a/drivers/crypto/amcc/crypto4xx_core.c
+++ b/drivers/crypto/amcc/crypto4xx_core.c
-@@ -1215,8 +1215,8 @@ static struct crypto4xx_alg_common crypt
+@@ -1211,8 +1211,8 @@ static struct crypto4xx_alg_common crypt
.max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_IV_SIZE,
.setkey = crypto4xx_setkey_aes_cbc,
.init = crypto4xx_sk_init,
.exit = crypto4xx_sk_exit,
} },
-@@ -1235,8 +1235,8 @@ static struct crypto4xx_alg_common crypt
+@@ -1231,8 +1231,8 @@ static struct crypto4xx_alg_common crypt
.max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_IV_SIZE,
.setkey = crypto4xx_setkey_aes_cfb,
.init = crypto4xx_sk_init,
.exit = crypto4xx_sk_exit,
} },
-@@ -1295,8 +1295,8 @@ static struct crypto4xx_alg_common crypt
+@@ -1291,8 +1291,8 @@ static struct crypto4xx_alg_common crypt
.min_keysize = AES_MIN_KEY_SIZE,
.max_keysize = AES_MAX_KEY_SIZE,
.setkey = crypto4xx_setkey_aes_ecb,
.init = crypto4xx_sk_init,
.exit = crypto4xx_sk_exit,
} },
-@@ -1315,8 +1315,8 @@ static struct crypto4xx_alg_common crypt
+@@ -1311,8 +1311,8 @@ static struct crypto4xx_alg_common crypt
.max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_IV_SIZE,
.setkey = crypto4xx_setkey_aes_ofb,
+++ /dev/null
-From 2aad36357bbc73bc88ebab35a59a70a8f4ae6ecb Mon Sep 17 00:00:00 2001
-From: Christian Lamparter <chunkeey@gmail.com>
-Date: Wed, 31 Oct 2018 22:27:27 +0100
-Subject: [PATCH 2/2] dmaengine: dw: implement per-channel protection control
- setting
-
-This patch adds a new device-tree property that allows to
-specify the protection control bits for each DMA channel
-individually.
-
-Setting the "correct" bits can have a huge impact on the
-PPC460EX and APM82181 that use this DMA engine in combination
-with a DesignWare' SATA-II core (sata_dwc_460ex driver).
-
-In the OpenWrt Forum, the user takimata reported that:
-|It seems your patch unleashed the full power of the SATA port.
-|Where I was previously hitting a really hard limit at around
-|82 MB/s for reading and 27 MB/s for writing, I am now getting this:
-|
-|root@OpenWrt:/mnt# time dd if=/dev/zero of=tempfile bs=1M count=1024
-|1024+0 records in
-|1024+0 records out
-|real 0m 13.65s
-|user 0m 0.01s
-|sys 0m 11.89s
-|
-|root@OpenWrt:/mnt# time dd if=tempfile of=/dev/null bs=1M count=1024
-|1024+0 records in
-|1024+0 records out
-|real 0m 8.41s
-|user 0m 0.01s
-|sys 0m 4.70s
-|
-|This means: 121 MB/s reading and 75 MB/s writing!
-|
-|The drive is a WD Green WD10EARX taken from an older MBL Single.
-|I repeated the test a few times with even larger files to rule out
-|any caching, I'm still seeing the same great performance. OpenWrt is
-|now completely on par with the original MBL firmware's performance.
-
-Another user And.short reported:
-|I can report that your fix worked! Boots up fine with two
-|drives even with more partitions, and no more reboot on
-|concurrent disk access!
-
-A closer look into the sata_dwc_460ex code revealed that
-the driver did initally set the correct protection control
-bits. However, this feature was lost when the sata_dwc_460ex
-driver was converted to the generic DMA driver framework.
-
-BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/55
-BugLink: https://forum.openwrt.org/t/wd-mybook-live-duo-two-disks/16195/50
-Fixes: 8b3444852a2b ("sata_dwc_460ex: move to generic DMA driver")
-Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
----
- drivers/dma/dw/core.c | 2 ++
- drivers/dma/dw/platform.c | 12 +++++++++---
- drivers/dma/dw/regs.h | 4 ++++
- include/linux/platform_data/dma-dw.h | 6 ++++++
- 4 files changed, 21 insertions(+), 3 deletions(-)
-
---- a/drivers/dma/dw/core.c
-+++ b/drivers/dma/dw/core.c
-@@ -160,12 +160,14 @@ static void dwc_initialize_chan_idma32(s
-
- static void dwc_initialize_chan_dw(struct dw_dma_chan *dwc)
- {
-+ struct dw_dma *dw = to_dw_dma(dwc->chan.device);
- u32 cfghi = DWC_CFGH_FIFO_MODE;
- u32 cfglo = DWC_CFGL_CH_PRIOR(dwc->priority);
- bool hs_polarity = dwc->dws.hs_polarity;
-
- cfghi |= DWC_CFGH_DST_PER(dwc->dws.dst_id);
- cfghi |= DWC_CFGH_SRC_PER(dwc->dws.src_id);
-+ cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl);
-
- /* Set polarity of handshake interface */
- cfglo |= hs_polarity ? DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL : 0;
---- a/drivers/dma/dw/platform.c
-+++ b/drivers/dma/dw/platform.c
-@@ -162,6 +162,12 @@ dw_dma_parse_dt(struct platform_device *
- pdata->multi_block[tmp] = 1;
- }
-
-+ if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) {
-+ if (tmp > CHAN_PROTCTL_MASK)
-+ return NULL;
-+ pdata->protctl = tmp;
-+ }
-+
- return pdata;
- }
- #else
---- a/drivers/dma/dw/regs.h
-+++ b/drivers/dma/dw/regs.h
-@@ -200,6 +200,10 @@ enum dw_dma_msize {
- #define DWC_CFGH_FCMODE (1 << 0)
- #define DWC_CFGH_FIFO_MODE (1 << 1)
- #define DWC_CFGH_PROTCTL(x) ((x) << 2)
-+#define DWC_CFGH_PROTCTL_DATA (0 << 2) /* data access - always set */
-+#define DWC_CFGH_PROTCTL_PRIV (1 << 2) /* privileged -> AHB HPROT[1] */
-+#define DWC_CFGH_PROTCTL_BUFFER (2 << 2) /* bufferable -> AHB HPROT[2] */
-+#define DWC_CFGH_PROTCTL_CACHE (4 << 2) /* cacheable -> AHB HPROT[3] */
- #define DWC_CFGH_DS_UPD_EN (1 << 5)
- #define DWC_CFGH_SS_UPD_EN (1 << 6)
- #define DWC_CFGH_SRC_PER(x) ((x) << 7)
---- a/include/linux/platform_data/dma-dw.h
-+++ b/include/linux/platform_data/dma-dw.h
-@@ -49,6 +49,7 @@ struct dw_dma_slave {
- * @data_width: Maximum data width supported by hardware per AHB master
- * (in bytes, power of 2)
- * @multi_block: Multi block transfers supported by hardware per channel.
-+ * @protctl: Protection control signals setting per channel.
- */
- struct dw_dma_platform_data {
- unsigned int nr_channels;
-@@ -65,6 +66,11 @@ struct dw_dma_platform_data {
- unsigned char nr_masters;
- unsigned char data_width[DW_DMA_MAX_NR_MASTERS];
- unsigned char multi_block[DW_DMA_MAX_NR_CHANNELS];
-+#define CHAN_PROTCTL_PRIVILEGED BIT(0)
-+#define CHAN_PROTCTL_BUFFERABLE BIT(1)
-+#define CHAN_PROTCTL_CACHEABLE BIT(2)
-+#define CHAN_PROTCTL_MASK GENMASK(2, 0)
-+ unsigned char protctl;
- };
-
- #endif /* _PLATFORM_DATA_DMA_DW_H */
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -1152,6 +1152,9 @@ config MIPS_MSC
+@@ -1153,6 +1153,9 @@ config MIPS_MSC
config MIPS_NILE4
bool
config MODULES_TREE_LOOKUP
--- a/kernel/module.c
+++ b/kernel/module.c
-@@ -3020,9 +3020,11 @@ static struct module *setup_load_info(st
+@@ -3022,9 +3022,11 @@ static struct module *setup_load_info(st
static int check_modinfo(struct module *mod, struct load_info *info, int flags)
{
if (flags & MODULE_INIT_IGNORE_VERMAGIC)
modmagic = NULL;
-@@ -3043,6 +3045,7 @@ static int check_modinfo(struct module *
+@@ -3045,6 +3047,7 @@ static int check_modinfo(struct module *
mod->name);
add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK);
}
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
-@@ -1984,7 +1984,9 @@ static void read_symbols(char *modname)
+@@ -1996,7 +1996,9 @@ static void read_symbols(char *modname)
symname = remove_dot(info.strtab + sym->st_name);
handle_modversions(mod, &info, sym, symname);
}
if (!is_vmlinux(modname) ||
(is_vmlinux(modname) && vmlinux_section_warnings))
-@@ -2145,8 +2147,10 @@ static void add_header(struct buffer *b,
+@@ -2157,8 +2159,10 @@ static void add_header(struct buffer *b,
buf_printf(b, "#include <linux/vermagic.h>\n");
buf_printf(b, "#include <linux/compiler.h>\n");
buf_printf(b, "\n");
buf_printf(b, "\n");
buf_printf(b, "__visible struct module __this_module\n");
buf_printf(b, "__attribute__((section(\".gnu.linkonce.this_module\"))) = {\n");
-@@ -2163,8 +2167,10 @@ static void add_header(struct buffer *b,
+@@ -2175,8 +2179,10 @@ static void add_header(struct buffer *b,
static void add_intree_flag(struct buffer *b, int is_intree)
{
}
/* Cannot check for assembler */
-@@ -2177,10 +2183,12 @@ static void add_retpoline(struct buffer
+@@ -2189,10 +2195,12 @@ static void add_retpoline(struct buffer
static void add_staging_flag(struct buffer *b, const char *name)
{
}
/**
-@@ -2279,11 +2287,13 @@ static void add_depends(struct buffer *b
+@@ -2291,11 +2299,13 @@ static void add_depends(struct buffer *b
static void add_srcversion(struct buffer *b, struct module *mod)
{
}
static void write_if_changed(struct buffer *b, const char *fname)
-@@ -2520,7 +2530,9 @@ int main(int argc, char **argv)
+@@ -2532,7 +2542,9 @@ int main(int argc, char **argv)
add_staging_flag(&buf, mod->name);
err |= add_versions(&buf, mod);
add_depends(&buf, mod, modules);
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -1158,6 +1158,10 @@ config SYNC_R4K
+@@ -1159,6 +1159,10 @@ config SYNC_R4K
config MIPS_MACHINE
def_bool n
}
--- a/mm/vmstat.c
+++ b/mm/vmstat.c
-@@ -1950,10 +1950,12 @@ void __init init_mm_internals(void)
+@@ -1951,10 +1951,12 @@ void __init init_mm_internals(void)
start_shepherd_timer();
#endif
#ifdef CONFIG_PROC_FS
---
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -1067,9 +1067,6 @@ config FW_ARC
+@@ -1068,9 +1068,6 @@ config FW_ARC
config ARCH_MAY_HAVE_PC_FDC
bool
config CEVT_BCM1480
bool
-@@ -2967,6 +2964,18 @@ choice
+@@ -2968,6 +2965,18 @@ choice
bool "Extend builtin kernel arguments with bootloader arguments"
endchoice
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
-@@ -2891,6 +2891,20 @@ config MIPS_O32_FP64_SUPPORT
+@@ -2892,6 +2892,20 @@ config MIPS_O32_FP64_SUPPORT
If unsure, say N.
select HAVE_PCSPKR_PLATFORM
select IRQ_MIPS_CPU
select I8253
-@@ -1128,6 +1130,9 @@ config DMA_NONCOHERENT
+@@ -1129,6 +1131,9 @@ config DMA_NONCOHERENT
bool
select NEED_DMA_MAP_STATE
config NEED_DMA_MAP_STATE
bool
-@@ -1652,6 +1657,7 @@ config CPU_R10000
+@@ -1653,6 +1658,7 @@ config CPU_R10000
select CPU_SUPPORTS_64BIT_KERNEL
select CPU_SUPPORTS_HIGHMEM
select CPU_SUPPORTS_HUGEPAGES
help
MIPS Technologies R10000-series processors.
-@@ -1900,9 +1906,11 @@ config SYS_HAS_CPU_MIPS32_R3_5
+@@ -1901,9 +1907,11 @@ config SYS_HAS_CPU_MIPS32_R3_5
bool
config SYS_HAS_CPU_MIPS32_R5
bool
config SYS_HAS_CPU_MIPS64_R1
-@@ -1912,6 +1920,7 @@ config SYS_HAS_CPU_MIPS64_R2
+@@ -1913,6 +1921,7 @@ config SYS_HAS_CPU_MIPS64_R2
bool
config SYS_HAS_CPU_MIPS64_R6
+extern s32 qcom_scm_pinmux_read(u32 arg1);
+extern s32 qcom_scm_pinmux_write(u32 arg1, u32 arg2);
#else
- static inline
- int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
-@@ -73,5 +75,7 @@ qcom_scm_set_remote_state(u32 state,u32
+
+ #include <linux/errno.h>
+@@ -76,5 +78,7 @@ qcom_scm_set_remote_state(u32 state,u32
static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) { return -ENODEV; }
static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) { return -ENODEV; }
static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) { return -ENODEV; }
/* Get I2C clock */
i2c_imx->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(i2c_imx->clk)) {
-@@ -1103,7 +1301,8 @@ static int i2c_imx_probe(struct platform
+@@ -1104,7 +1302,8 @@ static int i2c_imx_probe(struct platform
pdev->name, i2c_imx);
if (ret) {
dev_err(&pdev->dev, "can't claim irq %d\n", irq);
}
/* Init queue */
-@@ -1150,25 +1349,31 @@ static int i2c_imx_probe(struct platform
+@@ -1151,25 +1350,31 @@ static int i2c_imx_probe(struct platform
pm_runtime_mark_last_busy(&pdev->dev);
pm_runtime_put_autosuspend(&pdev->dev);
dwc->lpm_nyet_threshold = lpm_nyet_threshold;
dwc->tx_de_emphasis = tx_de_emphasis;
-@@ -1367,12 +1532,14 @@ static int dwc3_resume_common(struct dwc
+@@ -1368,12 +1533,14 @@ static int dwc3_resume_common(struct dwc
switch (dwc->dr_mode) {
case USB_DR_MODE_PERIPHERAL:
while (ep_ring->dequeue != td->last_trb)
--- a/drivers/usb/host/xhci.c
+++ b/drivers/usb/host/xhci.c
-@@ -1607,13 +1607,38 @@ static int xhci_urb_dequeue(struct usb_h
+@@ -1604,13 +1604,38 @@ static int xhci_urb_dequeue(struct usb_h
ret = -ENOMEM;
goto done;
}
projects / oweals / openwrt.git / commitdiff