kernel: bump 4.14 to 4.14.161

[oweals/openwrt.git] / target / linux / mediatek / patches-4.14 / 0156-mmc-mediatek-add-stop_clk-fix-and-enhance_rx-support.patch

diff --git a/target/linux/mediatek/patches-4.14/0156-mmc-mediatek-add-stop_clk-fix-and-enhance_rx-support.patch b/target/linux/mediatek/patches-4.14/0156-mmc-mediatek-add-stop_clk-fix-and-enhance_rx-support.patch
index 8db0a279e93b1d4032f591a71ac6b69ba1663e63..044cc021fc7d9bbb16d62db072e9e47cf0445e91 100644 (file)
--- a/target/linux/mediatek/patches-4.14/0156-mmc-mediatek-add-stop_clk-fix-and-enhance_rx-support.patch
+++ b/target/linux/mediatek/patches-4.14/0156-mmc-mediatek-add-stop_clk-fix-and-enhance_rx-support.patch
@@ -42,16 +42,16 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  /* MSDC_DMA_CTRL mask */
  #define MSDC_DMA_CTRL_START     (0x1 << 0)    /* W */
  #define MSDC_DMA_CTRL_STOP      (0x1 << 1)    /* W */
-@@ -217,6 +222,8 @@
- #define MSDC_PATCH_BIT_SPCPUSH    (0x1 << 29) /* RW */
- #define MSDC_PATCH_BIT_DECRCTMO   (0x1 << 30) /* RW */
+@@ -219,6 +224,8 @@
+ 
+ #define MSDC_PATCH_BIT1_CMDTA     (0x7 << 3)    /* RW */
  
 +#define MSDC_PATCH_BIT1_STOP_DLY  (0xf << 8)    /* RW */
 +
  #define MSDC_PATCH_BIT2_CFGRESP   (0x1 << 15)   /* RW */
  #define MSDC_PATCH_BIT2_CFGCRCSTS (0x1 << 28)   /* RW */
  #define MSDC_PB2_RESPWAIT         (0x3 << 2)    /* RW */
-@@ -242,6 +249,9 @@
+@@ -244,6 +251,9 @@
  #define EMMC50_CFG_CRCSTS_EDGE    (0x1 << 3)   /* RW */
  #define EMMC50_CFG_CFCSTS_SEL     (0x1 << 4)   /* RW */
  
@@ -61,7 +61,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  #define REQ_CMD_EIO  (0x1 << 0)
  #define REQ_CMD_TMO  (0x1 << 1)
  #define REQ_DAT_ERR  (0x1 << 2)
-@@ -308,6 +318,7 @@ struct msdc_save_para {
+@@ -310,6 +320,7 @@ struct msdc_save_para {
        u32 pad_ds_tune;
        u32 pad_cmd_tune;
        u32 emmc50_cfg0;
@@ -69,7 +69,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  };
  
  struct mtk_mmc_compatible {
-@@ -317,6 +328,8 @@ struct mtk_mmc_compatible {
+@@ -319,6 +330,8 @@ struct mtk_mmc_compatible {
        bool async_fifo;
        bool data_tune;
        bool busy_check;
@@ -78,7 +78,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  };
  
  struct msdc_tune_para {
-@@ -382,6 +395,8 @@ static const struct mtk_mmc_compatible m
+@@ -384,6 +397,8 @@ static const struct mtk_mmc_compatible m
        .async_fifo = false,
        .data_tune = false,
        .busy_check = false,
@@ -87,7 +87,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  };
  
  static const struct mtk_mmc_compatible mt8173_compat = {
-@@ -391,6 +406,8 @@ static const struct mtk_mmc_compatible m
+@@ -393,6 +408,8 @@ static const struct mtk_mmc_compatible m
        .async_fifo = false,
        .data_tune = false,
        .busy_check = false,
@@ -96,7 +96,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  };
  
  static const struct mtk_mmc_compatible mt2701_compat = {
-@@ -400,6 +417,8 @@ static const struct mtk_mmc_compatible m
+@@ -402,6 +419,8 @@ static const struct mtk_mmc_compatible m
        .async_fifo = true,
        .data_tune = true,
        .busy_check = false,
@@ -105,7 +105,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  };
  
  static const struct mtk_mmc_compatible mt2712_compat = {
-@@ -409,6 +428,8 @@ static const struct mtk_mmc_compatible m
+@@ -411,6 +430,8 @@ static const struct mtk_mmc_compatible m
        .async_fifo = true,
        .data_tune = true,
        .busy_check = true,
@@ -114,7 +114,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  };
  
  static const struct of_device_id msdc_of_ids[] = {
-@@ -1280,15 +1301,31 @@ static void msdc_init_hw(struct msdc_hos
+@@ -1282,15 +1303,31 @@ static void msdc_init_hw(struct msdc_hos
        sdr_set_field(host->base + MSDC_PATCH_BIT, MSDC_CKGEN_MSDC_DLY_SEL, 1);
        writel(0xffff4089, host->base + MSDC_PATCH_BIT1);
        sdr_set_bits(host->base + EMMC50_CFG0, EMMC50_CFG_CFCSTS_SEL);
@@ -150,7 +150,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
                /* use async fifo, then no need tune internal delay */
                sdr_clr_bits(host->base + MSDC_PATCH_BIT2,
                             MSDC_PATCH_BIT2_CFGRESP);
-@@ -1933,6 +1970,7 @@ static void msdc_save_reg(struct msdc_ho
+@@ -1936,6 +1973,7 @@ static void msdc_save_reg(struct msdc_ho
        host->save_para.pad_ds_tune = readl(host->base + PAD_DS_TUNE);
        host->save_para.pad_cmd_tune = readl(host->base + PAD_CMD_TUNE);
        host->save_para.emmc50_cfg0 = readl(host->base + EMMC50_CFG0);
@@ -158,7 +158,7 @@ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
  }
  
  static void msdc_restore_reg(struct msdc_host *host)
-@@ -1949,6 +1987,7 @@ static void msdc_restore_reg(struct msdc
+@@ -1952,6 +1990,7 @@ static void msdc_restore_reg(struct msdc
        writel(host->save_para.pad_ds_tune, host->base + PAD_DS_TUNE);
        writel(host->save_para.pad_cmd_tune, host->base + PAD_CMD_TUNE);
        writel(host->save_para.emmc50_cfg0, host->base + EMMC50_CFG0);