ipq40xx: consolidate DTS files
[oweals/openwrt.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4028-wpj428.dts
1 /* Copyright (c) 2015, The Linux Foundation. All rights reserved.
2  * Copyright (c) 2017, Christian Mehlis <christian@m3hlis.de>
3  * Copyright (c) 2017-2018, Sven Eckelmann <sven.eckelmann@openmesh.com>
4  *
5  * Permission to use, copy, modify, and/or distribute this software for any
6  * purpose with or without fee is hereby granted, provided that the above
7  * copyright notice and this permission notice appear in all copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16  *
17  */
18
19 #include "qcom-ipq4019.dtsi"
20 #include <dt-bindings/gpio/gpio.h>
21 #include <dt-bindings/input/input.h>
22 #include <dt-bindings/soc/qcom,tcsr.h>
23
24 / {
25         model = "Compex WPJ428";
26         compatible = "compex,wpj428";
27
28         soc {
29                 rng@22000 {
30                         status = "okay";
31                 };
32
33                 mdio@90000 {
34                         status = "okay";
35                         pinctrl-0 = <&mdio_pins>;
36                         pinctrl-names = "default";
37                         reset-gpios = <&tlmm 59 GPIO_ACTIVE_LOW>;
38                         reset-delay-us = <2000>;
39                 };
40
41                 ess-psgmii@98000 {
42                         status = "okay";
43                 };
44
45                 tcsr@194b000 {
46                         /* select hostmode */
47                         compatible = "qcom,tcsr";
48                         reg = <0x194b000 0x100>;
49                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
50                         status = "okay";
51                 };
52
53                 tcsr@1949000 {
54                         compatible = "qcom,tcsr";
55                         reg = <0x1949000 0x100>;
56                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
57                 };
58
59                 ess_tcsr@1953000 {
60                         compatible = "qcom,tcsr";
61                         reg = <0x1953000 0x1000>;
62                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
63                 };
64
65                 tcsr@1957000 {
66                         compatible = "qcom,tcsr";
67                         reg = <0x1957000 0x100>;
68                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
69                 };
70
71                 usb2: usb2@60f8800 {
72                         status = "okay";
73                 };
74
75                 usb3: usb3@8af8800 {
76                         status = "okay";
77                 };
78
79                 crypto@8e3a000 {
80                         status = "okay";
81                 };
82
83                 watchdog@b017000 {
84                         status = "okay";
85                 };
86
87                 ess-switch@c000000 {
88                         switch_lan_bmp = <0x10>;
89                         switch_wan_bmp = <0x20>;
90
91                         status = "okay";
92                 };
93
94                 edma@c080000 {
95                         status = "okay";
96                 };
97         };
98
99         keys {
100                 compatible = "gpio-keys";
101
102                 reset {
103                         label = "reset";
104                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
105                         linux,code = <KEY_RESTART>;
106                 };
107         };
108
109         aliases {
110                 led-boot = &status;
111                 led-failsafe = &status;
112                 led-upgrade = &status;
113         };
114
115         leds {
116                 compatible = "gpio-leds";
117
118                 status: rss4 {
119                         label = "wpj428:green:rss4";
120                         gpios = <&tlmm 5 GPIO_ACTIVE_HIGH>;
121                 };
122
123                 rss3 {
124                         label = "wpj428:green:rss3";
125                         gpios = <&tlmm 4 GPIO_ACTIVE_HIGH>;
126                 };
127         };
128
129         beeper: beeper {
130                 compatible = "gpio-beeper";
131                 gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>;
132         };
133 };
134
135 &tlmm {
136         mdio_pins: mdio_pinmux {
137                 mux_1 {
138                         pins = "gpio53";
139                         function = "mdio";
140                         bias-pull-up;
141                 };
142
143                 mux_2 {
144                         pins = "gpio52";
145                         function = "mdc";
146                         bias-pull-up;
147                 };
148         };
149
150         serial_pins: serial_pinmux {
151                 mux {
152                         pins = "gpio60", "gpio61";
153                         function = "blsp_uart0";
154                         bias-disable;
155                 };
156         };
157
158         spi_0_pins: spi_0_pinmux {
159                 pin {
160                         function = "blsp_spi0";
161                         pins = "gpio55", "gpio56", "gpio57";
162                         drive-strength = <12>;
163                         bias-disable;
164                 };
165                 pin_cs {
166                         function = "gpio";
167                         pins = "gpio54";
168                         drive-strength = <2>;
169                         bias-disable;
170                         output-high;
171                 };
172         };
173 };
174
175 &blsp_dma {
176         status = "okay";
177 };
178
179 &blsp1_spi1 {
180         pinctrl-0 = <&spi_0_pins>;
181         pinctrl-names = "default";
182         status = "okay";
183         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>;
184
185         m25p80@0 {
186                 compatible = "jedec,spi-nor";
187                 reg = <0>;
188                 spi-max-frequency = <24000000>;
189
190                 partitions {
191                         compatible = "fixed-partitions";
192                         #address-cells = <1>;
193                         #size-cells = <1>;
194
195                         partition0@0 {
196                                 label = "0:SBL1";
197                                 reg = <0x00000000 0x00040000>;
198                                 read-only;
199                         };
200                         partition1@40000 {
201                                 label = "0:MIBIB";
202                                 reg = <0x00040000 0x00020000>;
203                                 read-only;
204                         };
205                         partition2@60000 {
206                                 label = "0:QSEE";
207                                 reg = <0x00060000 0x00060000>;
208                                 read-only;
209                         };
210                         partition3@c0000 {
211                                 label = "0:CDT";
212                                 reg = <0x000c0000 0x00010000>;
213                                 read-only;
214                         };
215                         partition4@d0000 {
216                                 label = "0:DDRPARAMS";
217                                 reg = <0x000d0000 0x00010000>;
218                                 read-only;
219                         };
220                         partition5@e0000 {
221                                 label = "0:APPSBLENV"; /* uboot env*/
222                                 reg = <0x000e0000 0x00010000>;
223                                 read-only;
224                         };
225                         partition5@f0000 {
226                                 label = "0:APPSBL"; /* uboot */
227                                 reg = <0x000f0000 0x00080000>;
228                                 read-only;
229                         };
230                         partition5@170000 {
231                                 label = "0:ART";
232                                 reg = <0x00170000 0x00010000>;
233                                 read-only;
234                         };
235                         partition6@180000 {
236                                 compatible = "denx,fit";
237                                 label = "firmware";
238                                 reg = <0x00180000 0x01e80000>;
239                         };
240                 };
241         };
242 };
243
244 &blsp1_uart1 {
245         pinctrl-0 = <&serial_pins>;
246         pinctrl-names = "default";
247         status = "okay";
248 };
249
250 &cryptobam {
251         status = "okay";
252 };
253
254 &gmac0 {
255         qcom,phy_mdio_addr = <4>;
256         qcom,poll_required = <1>;
257         qcom,forced_speed = <1000>;
258         qcom,forced_duplex = <1>;
259         vlan_tag = <2 0x20>;
260 };
261
262 &gmac1 {
263         qcom,phy_mdio_addr = <3>;
264         qcom,poll_required = <1>;
265         qcom,forced_speed = <1000>;
266         qcom,forced_duplex = <1>;
267         vlan_tag = <1 0x10>;
268 };
269
270 &usb3_ss_phy {
271         status = "okay";
272 };
273
274 &usb3_hs_phy {
275         status = "okay";
276 };
277
278 &usb2_hs_phy {
279         status = "okay";
280 };
281
282 &wifi0 {
283         status = "okay";
284 };
285
286 &wifi1 {
287         status = "okay";
288 };