target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts

   1 // SPDX-License-Identifier: ISC
   2 // Copyright (c) 2015, The Linux Foundation. All rights reserved.
   3 // Copyright (c) 2019, Cezary Jackiewicz <cezary@eko.one.pl>.
   4 // Copyright (c) 2020, Pawel Dembicki <paweldembicki@gmail.com>.
   5
   6 #include "qcom-ipq4019.dtsi"
   7 #include <dt-bindings/soc/qcom,tcsr.h>
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         model = "Cell C RTL30VW";
  13         compatible = "cellc,rtl30vw";
  14
  15         aliases {
  16                 led-boot = &led_power_blue;
  17                 led-failsafe = &led_power_red;
  18                 led-running = &led_power_blue;
  19                 led-upgrade = &led_power_red;
  20         };
  21
  22         chosen {
  23                 bootargs-append = "ubi.mtd=ubifs root=/dev/ubiblock0_0 rootfstype=squashfs ro";
  24         };
  25
  26         led_spi {
  27                 compatible = "spi-gpio";
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30                 num-chipselects = <1>;
  31
  32                 mosi-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
  33                 cs-gpios = <&tlmm 4 GPIO_ACTIVE_LOW>;
  34                 sck-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
  35
  36                 led_gpio: led_gpio@0 {
  37                         compatible = "fairchild,74hc595";
  38                         reg = <0>;
  39                         gpio-controller;
  40                         #gpio-cells = <2>;
  41                         registers-number = <2>;
  42                         spi-max-frequency = <1000000>;
  43                 };
  44         };
  45
  46         leds {
  47                 compatible = "gpio-leds";
  48
  49                 led_power_blue: power_blue {
  50                         gpios = <&led_gpio 0 GPIO_ACTIVE_HIGH>;
  51                         label = "rtl30vw:blue:power";
  52                         default-state = "on";
  53                 };
  54
  55                 led_power_red: power_red {
  56                         gpios = <&led_gpio 1 GPIO_ACTIVE_HIGH>;
  57                         label = "rtl30vw:red:power";
  58                 };
  59
  60                 tp28 {
  61                         gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
  62                         label = "rtl30vw:ext:tp28";
  63                         default-state = "keep";
  64                 };
  65
  66                 tp27 {
  67                         gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
  68                         label = "rtl30vw:ext:tp27";
  69                         default-state = "keep";
  70                 };
  71
  72                 wlan2g {
  73                         gpios = <&led_gpio 8 GPIO_ACTIVE_HIGH>;
  74                         label = "rtl30vw:blue:wlan2g";
  75                         linux,default-trigger = "phy0tpt";
  76                 };
  77
  78                 wlan5g {
  79                         gpios = <&led_gpio 9 GPIO_ACTIVE_HIGH>;
  80                         label = "rtl30vw:blue:wlan5g";
  81                         linux,default-trigger = "phy1tpt";
  82                 };
  83
  84                 wps {
  85                         gpios = <&led_gpio 10 GPIO_ACTIVE_HIGH>;
  86                         label = "rtl30vw:blue:wps";
  87                 };
  88
  89                 voip {
  90                         gpios = <&led_gpio 11 GPIO_ACTIVE_HIGH>;
  91                         label = "rtl30vw:blue:voip";
  92                 };
  93
  94                 s1 {
  95                         gpios = <&led_gpio 12 GPIO_ACTIVE_HIGH>;
  96                         label = "rtl30vw:blue:s1";
  97                 };
  98
  99                 s2 {
 100                         gpios = <&led_gpio 13 GPIO_ACTIVE_HIGH>;
 101                         label = "rtl30vw:blue:s2";
 102                 };
 103
 104                 s3 {
 105                         gpios = <&led_gpio 14 GPIO_ACTIVE_HIGH>;
 106                         label = "rtl30vw:blue:s3";
 107                 };
 108
 109                 s4 {
 110                         gpios = <&led_gpio 15 GPIO_ACTIVE_HIGH>;
 111                         label = "rtl30vw:blue:s4";
 112                 };
 113
 114                 signal {
 115                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
 116                         label = "rtl30vw:red:signal";
 117                 };
 118         };
 119
 120         keys {
 121                 compatible = "gpio-keys";
 122
 123                 wps {
 124                         label = "wps";
 125                         linux,code = <KEY_WPS_BUTTON>;
 126                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
 127                 };
 128
 129                 reset {
 130                         label = "reset";
 131                         linux,code = <KEY_RESTART>;
 132                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
 133                 };
 134         };
 135
 136         soc {
 137                 rng@22000 {
 138                         status = "okay";
 139                 };
 140
 141                 mdio@90000 {
 142                         status = "okay";
 143                 };
 144
 145                 ess-psgmii@98000 {
 146                         status = "okay";
 147                 };
 148
 149                 tcsr@1949000 {
 150                         compatible = "qcom,tcsr";
 151                         reg = <0x1949000 0x100>;
 152                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
 153                 };
 154
 155                 tcsr@194b000 {
 156                         /* select hostmode */
 157                         compatible = "qcom,tcsr";
 158                         reg = <0x194b000 0x100>;
 159                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
 160                         status = "okay";
 161                 };
 162
 163                 ess_tcsr@1953000 {
 164                         compatible = "qcom,tcsr";
 165                         reg = <0x1953000 0x1000>;
 166                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
 167                 };
 168
 169                 tcsr@1957000 {
 170                         compatible = "qcom,tcsr";
 171                         reg = <0x1957000 0x100>;
 172                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
 173                 };
 174
 175                 usb2@60f8800 {
 176                         status = "okay";
 177                 };
 178
 179                 usb3@8af8800 {
 180                         status = "okay";
 181                 };
 182
 183                 crypto@8e3a000 {
 184                         status = "okay";
 185                 };
 186
 187                 watchdog@b017000 {
 188                         status = "okay";
 189                 };
 190
 191                 ess-switch@c000000 {
 192                         status = "okay";
 193                 };
 194
 195                 edma@c080000 {
 196                         status = "okay";
 197                 };
 198         };
 199 };
 200
 201 &blsp_dma {
 202         status = "okay";
 203 };
 204
 205 &blsp1_spi1 {
 206         pinctrl-0 = <&spi_0_pins>;
 207         pinctrl-names = "default";
 208         status = "okay";
 209         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>;
 210
 211         flash@0 {
 212                 /*"n25q128a11" is required for proper nand recognition in u-boot. */
 213                 compatible = "jedec,spi-nor", "n25q128a11";
 214                 #address-cells = <1>;
 215                 #size-cells = <1>;
 216                 reg = <0>;
 217                 spi-max-frequency = <24000000>;
 218
 219                 partitions {
 220                         compatible = "fixed-partitions";
 221                         #address-cells = <1>;
 222                         #size-cells = <1>;
 223
 224                         partition@0 {
 225                                 label = "0:SBL1";
 226                                 reg = <0x0 0x40000>;
 227                                 read-only;
 228                         };
 229
 230                         partition@40000 {
 231                                 label = "0:MIBIB";
 232                                 reg = <0x40000 0x20000>;
 233                                 read-only;
 234                         };
 235
 236                         partition@60000 {
 237                                 label = "0:QSEE";
 238                                 reg = <0x60000 0x60000>;
 239                                 read-only;
 240                                 };
 241
 242                         partition@c0000 {
 243                                 label = "0:CDT";
 244                                 reg = <0xc0000 0x10000>;
 245                                 read-only;
 246                         };
 247
 248                         partition@d0000 {
 249                                 label = "0:DDRPARAMS";
 250                                 reg = <0xd0000 0x10000>;
 251                                 read-only;
 252                         };
 253
 254                         partition@e0000 {
 255                                 label = "0:APPSBLENV";
 256                                 reg = <0xe0000 0x10000>;
 257                                 read-only;
 258                         };
 259
 260                         partition@f0000 {
 261                                 label = "0:APPSBL";
 262                                 reg = <0xf0000 0x80000>;
 263                                 read-only;
 264                         };
 265
 266                         partition@170000 {
 267                                 label = "0:ART";
 268                                 reg = <0x170000 0x10000>;
 269                                 read-only;
 270                         };
 271
 272                         partition@180000 {
 273                                 label = "0:BOOTCONFIG";
 274                                 reg = <0x180000 0x10000>;
 275                                 read-only;
 276                         };
 277                 };
 278         };
 279
 280         flash@1 {
 281                 /*
 282                  * Factory U-boot looks in 0:BOOTCONFIG partition for active
 283                  * partitions settings and mangle partition config. So kernel
 284                  * /kernel_1 and rootfs/rootfs_1 pairs can be swaped.
 285                  * It isn't a problem but we never can be sure where OFW put
 286                  * factory images. "spinand,mt29f" value is required for proper
 287                  * nand recognition in u-boot.
 288                  */
 289                 compatible = "spi-nand","spinand,mt29f";
 290                 #address-cells = <1>;
 291                 #size-cells = <0>;
 292                 reg = <1>;
 293                 spi-max-frequency = <24000000>;
 294
 295                 partitions {
 296                         compatible = "fixed-partitions";
 297                         #address-cells = <1>;
 298                         #size-cells = <1>;
 299
 300                         partition@0 {
 301                                 label = "kernel";
 302                                 reg = <0x0 0x400000>;
 303                         };
 304
 305                         partition@400000 {
 306                                 label = "rootfs";
 307                                 reg = <0x400000 0x2000000>;
 308                         };
 309
 310                         partition@2400000 {
 311                                 label = "kernel_1";
 312                                 reg = <0x2400000 0x400000>;
 313                         };
 314
 315                         partition@2800000 {
 316                                 label = "rootfs_1";
 317                                 reg = <0x2800000 0x2000000>;
 318                         };
 319
 320                         partition@4800000 {
 321                                 label = "ubifs";
 322                                 reg = <0x4800000 0x3800000>;
 323                         };
 324                 };
 325         };
 326 };
 327
 328 &blsp1_uart1 {
 329         pinctrl-0 = <&serial_pins>;
 330         pinctrl-names = "default";
 331         status = "okay";
 332 };
 333
 334 &cryptobam {
 335         status = "okay";
 336 };
 337
 338 &tlmm {
 339         serial_pins: serial_pinmux {
 340                 mux {
 341                         pins = "gpio60", "gpio61";
 342                         function = "blsp_uart0";
 343                         bias-disable;
 344                 };
 345         };
 346
 347         spi_0_pins: spi_0_pinmux {
 348                 pinmux {
 349                         function = "blsp_spi0";
 350                         pins = "gpio55", "gpio56", "gpio57";
 351                         drive-strength = <12>;
 352                         bias-disable;
 353                 };
 354
 355                 pinmux_cs {
 356                         function = "gpio";
 357                         pins = "gpio54", "gpio59";
 358                         drive-strength = <2>;
 359                         bias-disable;
 360                         output-high;
 361                 };
 362         };
 363 };
 364
 365 &usb2_hs_phy {
 366         status = "okay";
 367 };
 368
 369 &usb3_ss_phy {
 370         status = "okay";
 371 };
 372
 373 &usb3_hs_phy {
 374         status = "okay";
 375 };
 376
 377 &wifi0 {
 378         status = "okay";
 379         qcom,ath10k-calibration-variant = "cellc,rtl30vw";
 380 };
 381
 382 &wifi1 {
 383         status = "okay";
 384         qcom,ath10k-calibration-variant = "cellc,rtl30vw";
 385 };