ipq40xx: consolidate DTS files
[oweals/openwrt.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4018-ap120c-ac.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7
8 / {
9         model = "ALFA Network AP120C-AC";
10         compatible = "alfa-network,ap120c-ac";
11
12         aliases {
13                 led-boot = &status;
14                 led-failsafe = &status;
15                 led-running = &status;
16                 led-upgrade = &status;
17         };
18
19         keys {
20                 compatible = "gpio-keys";
21
22                 reset {
23                         label = "reset";
24                         gpios = <&tlmm 63 GPIO_ACTIVE_LOW>;
25                         linux,code = <KEY_RESTART>;
26                 };
27         };
28
29         leds {
30                 compatible = "gpio-leds";
31
32                 status: status {
33                         label = "ap120c-ac:blue:status";
34                         gpios = <&tlmm 5 GPIO_ACTIVE_LOW>;
35                         default-state = "keep";
36                 };
37
38                 wan {
39                         label = "ap120c-ac:amber:wan";
40                         gpios = <&qca8075 19 GPIO_ACTIVE_HIGH>;
41                 };
42
43                 wlan2g {
44                         label = "ap120c-ac:green:wlan2g";
45                         gpios = <&tlmm 3 GPIO_ACTIVE_HIGH>;
46                         linux,default-trigger = "phy0tpt";
47                 };
48
49                 wlan5g {
50                         label = "ap120c-ac:red:wlan5g";
51                         gpios = <&tlmm 2 GPIO_ACTIVE_HIGH>;
52                         linux,default-trigger = "phy1tpt";
53                 };
54         };
55
56         soc {
57                 rng@22000 {
58                         status = "okay";
59                 };
60
61                 mdio@90000 {
62                         status = "okay";
63
64                         pinctrl-0 = <&mdio_pins>;
65                         pinctrl-names = "default";
66                 };
67
68                 ess-psgmii@98000 {
69                         status = "okay";
70                 };
71
72                 counter@4a1000 {
73                         compatible = "qcom,qca-gcnt";
74                         reg = <0x4a1000 0x4>;
75                 };
76
77                 tcsr@1949000 {
78                         compatible = "qcom,tcsr";
79                         reg = <0x1949000 0x100>;
80                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
81                 };
82
83                 tcsr@194b000 {
84                         compatible = "qcom,tcsr";
85                         reg = <0x194b000 0x100>;
86                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
87                 };
88
89                 ess_tcsr@1953000 {
90                         compatible = "qcom,tcsr";
91                         reg = <0x1953000 0x1000>;
92                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
93                 };
94
95                 tcsr@1957000 {
96                         compatible = "qcom,tcsr";
97                         reg = <0x1957000 0x100>;
98                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
99                 };
100
101                 usb2@60f8800 {
102                         status = "okay";
103                 };
104
105                 usb3@8af8800 {
106                         status = "okay";
107
108                         dwc3@8a00000 {
109                                 phys = <&usb3_hs_phy>;
110                                 phy-names = "usb2-phy";
111                         };
112                 };
113
114                 crypto@8e3a000 {
115                         status = "okay";
116                 };
117
118                 watchdog@b017000 {
119                         status = "okay";
120                 };
121
122                 qca8075: ess-switch@c000000 {
123                         status = "okay";
124
125                         switch_lan_bmp = <0x10>;
126                         switch_wan_bmp = <0x20>;
127
128                         #gpio-cells = <2>;
129                         gpio-controller;
130                 };
131
132                 edma@c080000 {
133                         status = "okay";
134                 };
135         };
136 };
137
138 &blsp_dma {
139         status = "okay";
140 };
141
142 &blsp1_i2c3 {
143         status = "okay";
144
145         pinctrl-0 = <&i2c0_pins>;
146         pinctrl-names = "default";
147
148         tpm@29 {
149                 compatible = "atmel,at97sc3204t";
150                 reg = <0x29>;
151         };
152 };
153
154 &blsp1_spi1 {
155         status = "okay";
156
157         pinctrl-0 = <&spi0_pins>;
158         pinctrl-names = "default";
159         cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>,
160                    <&tlmm  4 GPIO_ACTIVE_HIGH>;
161
162         flash@0 {
163                 compatible = "jedec,spi-nor";
164                 reg = <0>;
165                 spi-max-frequency = <24000000>;
166
167                 partitions {
168                         compatible = "fixed-partitions";
169                         #address-cells = <1>;
170                         #size-cells = <1>;
171
172                         partition@0 {
173                                 label = "SBL1";
174                                 reg = <0x00000000 0x00040000>;
175                                 read-only;
176                         };
177
178                         partition@40000 {
179                                 label = "MIBIB";
180                                 reg = <0x00040000 0x00020000>;
181                                 read-only;
182                         };
183
184                         partition@60000 {
185                                 label = "QSEE";
186                                 reg = <0x00060000 0x00060000>;
187                                 read-only;
188                         };
189
190                         partition@c0000 {
191                                 label = "CDT";
192                                 reg = <0x000c0000 0x00010000>;
193                                 read-only;
194                         };
195
196                         partition@d0000 {
197                                 label = "DDRPARAMS";
198                                 reg = <0x000d0000 0x00010000>;
199                                 read-only;
200                         };
201
202                         partition@e0000 {
203                                 label = "APPSBLENV";
204                                 reg = <0x000e0000 0x00010000>;
205                         };
206
207                         partition@f0000 {
208                                 label = "APPSBL";
209                                 reg = <0x000f0000 0x00080000>;
210                                 read-only;
211                         };
212
213                         partition@170000 {
214                                 label = "ART";
215                                 reg = <0x00170000 0x00010000>;
216                                 read-only;
217                         };
218
219                         partition@180000 {
220                                 label = "priv_data1";
221                                 reg = <0x00180000 0x00010000>;
222                                 read-only;
223                         };
224
225                         partition@190000 {
226                                 label = "priv_data2";
227                                 reg = <0x00190000 0x00010000>;
228                                 read-only;
229                         };
230                 };
231         };
232
233         nand@1 {
234                 compatible = "spi-nand";
235                 reg = <1>;
236                 spi-max-frequency = <24000000>;
237
238                 partitions {
239                         compatible = "fixed-partitions";
240                         #address-cells = <1>;
241                         #size-cells = <1>;
242
243                         partition@0 {
244                                 label = "rootfs1";
245                                 reg = <0x00000000 0x04000000>;
246                         };
247
248                         partition@4000000 {
249                                 label = "rootfs2";
250                                 reg = <0x04000000 0x04000000>;
251                         };
252                 };
253         };
254 };
255
256 &blsp1_uart1 {
257         status = "okay";
258
259         pinctrl-0 = <&serial0_pins>;
260         pinctrl-names = "default";
261 };
262
263 &cryptobam {
264         status = "okay";
265 };
266
267 &gmac0 {
268         qcom,forced_duplex = <1>;
269         qcom,forced_speed = <1000>;
270         qcom,phy_mdio_addr = <3>;
271         qcom,poll_required = <1>;
272         vlan_tag = <1 0x10>;
273 };
274
275 &gmac1 {
276         qcom,forced_duplex = <1>;
277         qcom,forced_speed = <1000>;
278         qcom,phy_mdio_addr = <4>;
279         qcom,poll_required = <1>;
280         vlan_tag = <2 0x20>;
281 };
282
283 &tlmm {
284         i2c0_pins: i2c0_pinmux {
285                 mux_i2c {
286                         function = "blsp_i2c0";
287                         pins = "gpio58", "gpio59";
288                         drive-strength = <16>;
289                         bias-disable;
290                 };
291         };
292
293         mdio_pins: mdio_pinmux {
294                 mux_mdio {
295                         pins = "gpio53";
296                         function = "mdio";
297                         bias-pull-up;
298                 };
299
300                 mux_mdc {
301                         pins = "gpio52";
302                         function = "mdc";
303                         bias-pull-up;
304                 };
305         };
306
307         serial0_pins: serial0_pinmux {
308                 mux_uart {
309                         pins = "gpio60", "gpio61";
310                         function = "blsp_uart0";
311                         bias-disable;
312                 };
313         };
314
315         spi0_pins: spi0_pinmux {
316                 mux_spi {
317                         function = "blsp_spi0";
318                         pins = "gpio55", "gpio56", "gpio57";
319                         drive-strength = <12>;
320                         bias-disable;
321                 };
322
323                 mux_cs {
324                         function = "gpio";
325                         pins = "gpio54", "gpio4";
326                         drive-strength = <2>;
327                         bias-disable;
328                         output-high;
329                 };
330         };
331 };
332
333 &usb2_hs_phy {
334         status = "okay";
335 };
336
337 &usb3_hs_phy {
338         status = "okay";
339 };
340
341 &wifi0 {
342         status = "okay";
343 };
344
345 &wifi1 {
346         status = "okay";
347         qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC";
348 };