igmpproxy: remove some bashism
[oweals/openwrt.git] / target / linux / ipq40xx / files-4.19 / arch / arm / boot / dts / qcom-ipq4019-cm520-79f.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qcom-ipq4019.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/soc/qcom,tcsr.h>
7
8 / {
9         model = "MobiPromo CM520-79F";
10         compatible = "mobipromo,cm520-79f";
11
12         aliases {
13                 led-boot = &led_sys;
14                 led-failsafe = &led_sys;
15                 led-running = &led_sys;
16                 led-upgrade = &led_sys;
17         };
18
19         soc {
20                 rng@22000 {
21                         status = "okay";
22                 };
23
24                 mdio@90000 {
25                         status = "okay";
26                         pinctrl-0 = <&mdio_pins>;
27                         pinctrl-names = "default";
28                         reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
29                         reset-delay-us = <1000>;
30                 };
31
32                 ess-psgmii@98000 {
33                         status = "okay";
34                 };
35
36                 tcsr@1949000 {
37                         compatible = "qcom,tcsr";
38                         reg = <0x1949000 0x100>;
39                         qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
40                 };
41
42                 tcsr@194b000 {
43                         compatible = "qcom,tcsr";
44                         reg = <0x194b000 0x100>;
45                         qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
46                 };
47
48                 ess_tcsr@1953000 {
49                         compatible = "qcom,tcsr";
50                         reg = <0x1953000 0x1000>;
51                         qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
52                 };
53
54                 tcsr@1957000 {
55                         compatible = "qcom,tcsr";
56                         reg = <0x1957000 0x100>;
57                         qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
58                 };
59
60                 usb2@60f8800 {
61                         status = "okay";
62
63                         dwc3@6000000 {
64                                 #address-cells = <1>;
65                                 #size-cells = <0>;
66
67                                 usb2_port1: port@1 {
68                                         reg = <1>;
69                                         #trigger-source-cells = <0>;
70                                 };
71                         };
72                 };
73
74                 usb3@8af8800 {
75                         status = "okay";
76
77                         dwc3@8a00000 {
78                                 #address-cells = <1>;
79                                 #size-cells = <0>;
80
81                                 usb3_port1: port@1 {
82                                         reg = <1>;
83                                         #trigger-source-cells = <0>;
84                                 };
85
86                                 usb3_port2: port@2 {
87                                         reg = <2>;
88                                         #trigger-source-cells = <0>;
89                                 };
90                         };
91                 };
92
93                 crypto@8e3a000 {
94                         status = "okay";
95                 };
96
97                 watchdog@b017000 {
98                         status = "okay";
99                 };
100
101                 ess-switch@c000000 {
102                         status = "okay";
103                 };
104
105                 edma@c080000 {
106                         status = "okay";
107                 };
108         };
109
110         led_spi {
111                 compatible = "spi-gpio";
112                 #address-cells = <1>;
113                 ranges;
114
115                 sck-gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
116                 mosi-gpios = <&tlmm 36 GPIO_ACTIVE_HIGH>;
117                 num-chipselects = <0>;
118
119                 led_gpio: led_gpio@0 {
120                         compatible = "fairchild,74hc595";
121                         reg = <0>;
122                         gpio-controller;
123                         #gpio-cells = <2>;
124                         registers-number = <1>;
125                         spi-max-frequency = <1000000>;
126                 };
127         };
128
129         leds {
130                 compatible = "gpio-leds";
131
132                 usb {
133                         label = "cm520-79f:blue:usb";
134                         gpios = <&tlmm 10 GPIO_ACTIVE_HIGH>;
135                         linux,default-trigger = "usbport";
136                         trigger-sources = <&usb3_port1>, <&usb3_port2>, <&usb2_port1>;
137                 };
138
139                 led_sys: can {
140                         label = "cm520-79f:blue:can";
141                         gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
142                 };
143
144                 wan {
145                         label = "cm520-79f:blue:wan";
146                         gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
147                 };
148
149                 lan1 {
150                         label = "cm520-79f:blue:lan1";
151                         gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
152                 };
153
154                 lan2 {
155                         label = "cm520-79f:blue:lan2";
156                         gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
157                 };
158
159                 wlan2g {
160                         label = "cm520-79f:blue:wlan2g";
161                         gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
162                         linux,default-trigger = "phy0tpt";
163                 };
164
165                 wlan5g {
166                         label = "cm520-79f:blue:wlan5g";
167                         gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
168                         linux,default-trigger = "phy1tpt";
169                 };
170         };
171
172         keys {
173                 compatible = "gpio-keys";
174
175                 reset {
176                         label = "reset";
177                         gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
178                         linux,code = <KEY_RESTART>;
179                 };
180         };
181 };
182
183 &blsp_dma {
184         status = "okay";
185 };
186
187 &blsp1_uart1 {
188         status = "okay";
189 };
190
191 &blsp1_uart2 {
192         status = "okay";
193 };
194
195 &cryptobam {
196         status = "okay";
197 };
198
199 &gmac0 {
200         mtd-mac-address = <&art 0x1006>;
201 };
202
203 &gmac1 {
204         mtd-mac-address = <&art 0x5006>;
205 };
206
207 &nand {
208         pinctrl-0 = <&nand_pins>;
209         pinctrl-names = "default";
210         status = "okay";
211
212         nand@0 {
213                 partitions {
214                         compatible = "fixed-partitions";
215                         #address-cells = <1>;
216                         #size-cells = <1>;
217
218                         partition@0 {
219                                 label = "SBL1";
220                                 reg = <0x0 0x100000>;
221                                 read-only;
222                         };
223
224                         partition@100000 {
225                                 label = "MIBIB";
226                                 reg = <0x100000 0x100000>;
227                                 read-only;
228                         };
229
230                         partition@200000 {
231                                 label = "BOOTCONFIG";
232                                 reg = <0x200000 0x100000>;
233                         };
234
235                         partition@300000 {
236                                 label = "QSEE";
237                                 reg = <0x300000 0x100000>;
238                                 read-only;
239                         };
240
241                         partition@400000 {
242                                 label = "QSEE_1";
243                                 reg = <0x400000 0x100000>;
244                                 read-only;
245                         };
246
247                         partition@500000 {
248                                 label = "CDT";
249                                 reg = <0x500000 0x80000>;
250                                 read-only;
251                         };
252
253                         partition@580000 {
254                                 label = "CDT_1";
255                                 reg = <0x580000 0x80000>;
256                                 read-only;
257                         };
258
259                         partition@600000 {
260                                 label = "BOOTCONFIG1";
261                                 reg = <0x600000 0x80000>;
262                         };
263
264                         partition@680000 {
265                                 label = "APPSBLENV";
266                                 reg = <0x680000 0x80000>;
267                         };
268
269                         partition@700000 {
270                                 label = "APPSBL";
271                                 reg = <0x700000 0x200000>;
272                                 read-only;
273                         };
274
275                         partition@900000 {
276                                 label = "APPSBL_1";
277                                 reg = <0x900000 0x200000>;
278                                 read-only;
279                         };
280
281                         art: partition@b00000 {
282                                 label = "ART";
283                                 reg = <0xb00000 0x80000>;
284                                 read-only;
285                         };
286
287                         partition@b80000 {
288                                 label = "ubi";
289                                 reg = <0xb80000 0x7480000>;
290                         };
291                 };
292         };
293 };
294
295 &qpic_bam {
296         status = "okay";
297 };
298
299 &tlmm {
300         mdio_pins: mdio_pinmux {
301                 mux_1 {
302                         pins = "gpio6";
303                         function = "mdio";
304                         bias-pull-up;
305                 };
306
307                 mux_2 {
308                         pins = "gpio7";
309                         function = "mdc";
310                         bias-pull-up;
311                 };
312         };
313
314         nand_pins: nand_pins {
315                 pullups {
316                         pins =  "gpio52", "gpio53", "gpio58",
317                                 "gpio59";
318                         function = "qpic";
319                         bias-pull-up;
320                 };
321
322                 pulldowns {
323                         pins =  "gpio54", "gpio55", "gpio56",
324                                 "gpio57", "gpio60", "gpio61",
325                                 "gpio62", "gpio63", "gpio64",
326                                 "gpio65", "gpio66", "gpio67",
327                                 "gpio68", "gpio69";
328                         function = "qpic";
329                         bias-pull-down;
330                 };
331         };
332 };
333
334 &usb3_ss_phy {
335         status = "okay";
336 };
337
338 &usb3_hs_phy {
339         status = "okay";
340 };
341
342 &usb2_hs_phy {
343         status = "okay";
344 };
345
346 &wifi0 {
347         status = "okay";
348         qcom,ath10k-calibration-variant = "CM520-79F";
349 };
350
351 &wifi1 {
352         status = "okay";
353         qcom,ath10k-calibration-variant = "CM520-79F";
354 };