1 "original version":https://docs.google.com/document/d/1pg27qHGx-2hsx9tGCwj0l9EtJZU-viquaOKC02WRt6Y/edit#
4 htc - host target communications
5 wmi - Wireless Module Interface Service Implementation
8 Do this struct actually work? It was wronlgy configured on linux driver
9 fw:HTC_CONNECT_SERVICE_MSG = kernel:htc_conn_svc_msg
12 0040 01 00 00 4c 01 88 ff ff 00 15 00 20 00 00 98 d8 ...L.... ... ....
13 0050 00 00 70 58 00 00 98 80 00 01 00 00 00 00 98 80 ..pX.... ........
14 0060 00 01 00 00 00 00 98 80 00 01 00 00 00 00 98 80 ........ ........
15 0070 00 01 00 00 00 00 98 80 00 01 00 00 00 00 98 80 ........ ........
16 0080 00 01 00 00 00 00 98 80 00 01 00 00 00 00 98 80 ........ ........
19 fw: HTC_FRAME_HDR = kernel: htc_frame_hdr
20 wmi_cmd_hdr (currently 4 byte)
21 commad data... depends on wmi command type
24 Incomming packet path:
27 - WMIRecvMessageHandler
34 target_firmware/magpie_fw_dev/build/magpie_1_1/sboot/hif/usb/src/usb_api.c
35 target_firmware/magpie_fw_dev/build/magpie_1_1/inc/usb_defs.h
37 #define ZM_MAIN_CTRL_OFFSET 0x00
38 #define ZM_DEVICE_ADDRESS_OFFSET 0x01
39 #define ZM_TEST_OFFSET 0x02
40 #define ZM_PHY_TEST_SELECT_OFFSET 0x08
41 #define ZM_VDR_SPECIFIC_MODE_OFFSET 0x0A
42 #define ZM_CX_CONFIG_STATUS_OFFSET 0x0B
43 #define ZM_EP0_DATA1_OFFSET 0x0C
44 #define ZM_EP0_DATA2_OFFSET 0x0D
45 #define ZM_EP0_DATA_OFFSET 0x0C
47 #define ZM_INTR_MASK_BYTE_0_OFFSET 0x11
48 #define ZM_INTR_MASK_BYTE_1_OFFSET 0x12
49 #define ZM_INTR_MASK_BYTE_2_OFFSET 0x13
50 #define ZM_INTR_MASK_BYTE_3_OFFSET 0x14
51 #define ZM_INTR_MASK_BYTE_4_OFFSET 0x15
52 #define ZM_INTR_MASK_BYTE_5_OFFSET 0x16
53 #define ZM_INTR_MASK_BYTE_6_OFFSET 0x17
54 #define ZM_INTR_MASK_BYTE_7_OFFSET 0x18
56 #define ZM_INTR_GROUP_OFFSET 0x20
57 #define ZM_INTR_SOURCE_0_OFFSET 0x21
58 #define ZM_INTR_SOURCE_1_OFFSET 0x22
59 #define ZM_INTR_SOURCE_2_OFFSET 0x23
60 #define ZM_INTR_SOURCE_3_OFFSET 0x24
61 #define ZM_INTR_SOURCE_4_OFFSET 0x25
62 #define ZM_INTR_SOURCE_5_OFFSET 0x26
63 #define ZM_INTR_SOURCE_6_OFFSET 0x27
64 #define ZM_INTR_SOURCE_7_OFFSET 0x28
66 #define ZM_EP_IN_MAX_SIZE_HIGH_OFFSET 0x3F
67 #define ZM_EP_IN_MAX_SIZE_LOW_OFFSET 0x3E
69 #define ZM_EP_OUT_MAX_SIZE_HIGH_OFFSET 0x5F
70 #define ZM_EP_OUT_MAX_SIZE_LOW_OFFSET 0x5E
72 #define ZM_EP3_BYTE_COUNT_HIGH_OFFSET 0xAE
74 comments: after sending data from target to host, set BIT3
75 #define ZM_EP3_BYTE_COUNT_LOW_OFFSET 0xBE
76 #define ZM_EP4_BYTE_COUNT_HIGH_OFFSET 0xAF
77 BIT4 - 1 - reset fifo; 0 - disable reset?
78 comments: probably compatible with
79 #define ZM_EP4_BYTE_COUNT_LOW_OFFSET 0xBF
80 size of data in fifo buffer
82 #define ZM_EP3_DATA_OFFSET 0xF8
83 #define ZM_EP4_DATA_OFFSET 0xFC
85 #define ZM_SOC_USB_MODE_CTRL_OFFSET 0x108
86 BIT10 - 1 - enable MP (EP6) downstream stream mode
87 BIT9 - 1 - enable MP (EP6) downstream DMA mode
88 BIT8 - 1 - enable HP (EP5) downstream DMA mode
89 BIT7 - 1 - enable HP (EP5) downstream stream mode
90 BIT6 - 1 - enable LP downstream stream mode
91 BIT5 - define the host dma buffer size - 4096(00) 8192 (01) 16384(10) 32768(11) bytes
93 BIT3 - 0 - enable upstream stream mode: 1 - enable upstream packed mode;
94 BIT2 - 0 - Set into 64 byte mode (full speed) 1 - Set into 512 byte mode (usb highspeed)
95 BIT1 - 0 - disable upstream dma mode; 1 - enable upstream dma mode
96 BIT0 - 0 - disable LP down stream dma mode; 1 - eanble LP down stream dma mode
98 ryan: 04/01: bit0 could disable lpdn dma, which is good at debugging while async_fifo have problem, we could disable this and check the fifo_rcv_size to see if we have correct at fifo or not
99 LP - lo priotiry; MP - middle priority; HP - High priority;
102 #define ZM_SOC_USB_MAX_AGGREGATE_OFFSET 0x110
103 set stream mode packet buffer critirea
104 0x0 = disable stream mode or 1 packet. So 0x9 is 10 packets?
105 #define ZM_SOC_USB_TIME_CTRL_OFFSET 0x114
106 set stream mode timeout critirea. the unit is 32 USB (30Mhz) clock cycles.