ar71xx: enable ddr wb flush on qca955x
authorTomislav Požega <pozega.tomislav@gmail.com>
Tue, 3 Sep 2019 15:10:31 +0000 (17:10 +0200)
committerRISCi_ATOM <bob@bobcall.me>
Fri, 13 Sep 2019 20:26:17 +0000 (16:26 -0400)
commit3bbfead6b7b9d821e69a692a975b9d3420189beb
treefa73731a521d501a5bd708e478e5fc9a5b2f19b1
parent51774d7a4f33d870a90f4a6fdeb08ed5d4a7a556
ar71xx: enable ddr wb flush on qca955x

Enable flushing of write buffers on qca955x. GPL code has 0x88 reg
defined for PCI flush which is likely an error since the device
freezes on boot. So use DS default value 0xA8 for PCI flush.

Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
(cherry picked from commit fe9e702dc94ece2a004f6db68d6fb9a94d9437cb)
target/linux/ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch [new file with mode: 0644]