From fc1840e88114ddf1d357435358615a6e0f8e36c9 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Fri, 21 Jul 2006 18:51:56 +0200 Subject: [PATCH] Code cleanup. --- board/spc1920/spc1920.c | 1 - board/tqm8xx/tqm8xx.c | 11 ++++------- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/board/spc1920/spc1920.c b/board/spc1920/spc1920.c index 44ab4be40f..028f4c635d 100644 --- a/board/spc1920/spc1920.c +++ b/board/spc1920/spc1920.c @@ -206,7 +206,6 @@ static long int dram_size (long int mbmr_value, long int *base, int board_early_init_f(void) { volatile immap_t *immap = (immap_t *) CFG_IMMR; - volatile memctl8xx_t *memctl = &immap->im_memctl; /* Turn on LED PD9 */ diff --git a/board/tqm8xx/tqm8xx.c b/board/tqm8xx/tqm8xx.c index 06c84f7cf7..6b206f8a18 100644 --- a/board/tqm8xx/tqm8xx.c +++ b/board/tqm8xx/tqm8xx.c @@ -203,7 +203,7 @@ long int initdram (int board_type) #ifndef CONFIG_CAN_DRIVER if ((board_type != 'L') && (board_type != 'M') && - (board_type != 'D') ) { /* "L" and "M" type boards have only one bank SDRAM */ + (board_type != 'D') ) { /* only one SDRAM bank on L, M and D modules */ memctl->memc_mcr = 0x80006105; /* SDRAM bank 1 */ udelay (1); memctl->memc_mcr = 0x80006230; /* SDRAM bank 1 - execute twice */ @@ -220,8 +220,7 @@ long int initdram (int board_type) * * try 8 column mode */ - size8 = dram_size (CFG_MAMR_8COL, SDRAM_BASE2_PRELIM, - SDRAM_MAX_SIZE); + size8 = dram_size (CFG_MAMR_8COL, SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE); debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size8 >> 20); udelay (1000); @@ -229,8 +228,7 @@ long int initdram (int board_type) /* * try 9 column mode */ - size9 = dram_size (CFG_MAMR_9COL, SDRAM_BASE2_PRELIM, - SDRAM_MAX_SIZE); + size9 = dram_size (CFG_MAMR_9COL, SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE); debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size9 >> 20); udelay(1000); @@ -239,8 +237,7 @@ long int initdram (int board_type) /* * try 10 column mode */ - size10 = dram_size (CFG_MAMR_10COL, (ulong *) SDRAM_BASE2_PRELIM, - SDRAM_MAX_SIZE); + size10 = dram_size (CFG_MAMR_10COL, SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE); debug ("SDRAM Bank 0 in 10 column mode: %ld MB\n", size10 >> 20); #else size10 = 0; -- 2.25.1