From ea86e725d4c363232047126f1c84b03f13de7840 Mon Sep 17 00:00:00 2001 From: Wolfgang Wallner Date: Mon, 3 Feb 2020 11:38:06 +0100 Subject: [PATCH] gpio: intel_gpio: Fix register/bit offsets intel_gpio_get_value() Fix the following in intel_gpio_get_value(): * The value of the register is contained in the variable 'reg', not in 'mode'. The variable 'mode' contains only the configuration whether the gpio is currently an input or an output. * The correct bitmasks for the input and output value are PAD_CFG0_RX_STATE and PAD_CFG0_TX_STATE. Use them instead of the currently used PAD_CFG0_RX_STATE_BIT and PAD_CFG0_TX_STATE_BIT. Signed-off-by: Wolfgang Wallner Reviewed-by: Simon Glass Reviewed-by: Bin Meng --- drivers/gpio/intel_gpio.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/intel_gpio.c b/drivers/gpio/intel_gpio.c index be91626cc5..67b8b80b9d 100644 --- a/drivers/gpio/intel_gpio.c +++ b/drivers/gpio/intel_gpio.c @@ -59,9 +59,9 @@ static int intel_gpio_get_value(struct udevice *dev, uint offset) if (!mode) { rx_tx = reg & (PAD_CFG0_TX_DISABLE | PAD_CFG0_RX_DISABLE); if (rx_tx == PAD_CFG0_TX_DISABLE) - return mode & PAD_CFG0_RX_STATE_BIT ? 1 : 0; + return reg & PAD_CFG0_RX_STATE ? 1 : 0; else if (rx_tx == PAD_CFG0_RX_DISABLE) - return mode & PAD_CFG0_TX_STATE_BIT ? 1 : 0; + return reg & PAD_CFG0_TX_STATE ? 1 : 0; } return 0; -- 2.25.1