From dc760aedb762edcd35e48aa6ee067fecc42e5840 Mon Sep 17 00:00:00 2001 From: Hou Zhiqiang Date: Mon, 6 Feb 2017 11:29:00 +0800 Subject: [PATCH] armv8/ls104xa: remove the DDR interactive debugging info from SPL Remove the DDR interactive debugging to reduce the size of spl image. Signed-off-by: Hou Zhiqiang Reviewed-by: York Sun --- include/configs/ls1043aqds.h | 2 ++ include/configs/ls1043ardb.h | 2 ++ include/configs/ls1046aqds.h | 2 ++ include/configs/ls1046ardb.h | 2 ++ 4 files changed, 8 insertions(+) diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h index f3b521d705..6a345c0400 100644 --- a/include/configs/ls1043aqds.h +++ b/include/configs/ls1043aqds.h @@ -38,7 +38,9 @@ unsigned long get_board_ddr_clk(void); #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 +#ifndef CONFIG_SPL #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#endif #define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 8fa3bb3a64..f185380ae3 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -29,7 +29,9 @@ #define CONFIG_SYS_SPD_BUS_NUM 0 #define CONFIG_FSL_DDR_BIST +#ifndef CONFIG_SPL #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#endif #define CONFIG_SYS_DDR_RAW_TIMING #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xdeadbeef diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h index cba22ca2b6..4b3b21eaa1 100644 --- a/include/configs/ls1046aqds.h +++ b/include/configs/ls1046aqds.h @@ -38,7 +38,9 @@ unsigned long get_board_ddr_clk(void); #define SPD_EEPROM_ADDRESS 0x51 #define CONFIG_SYS_SPD_BUS_NUM 0 +#ifndef CONFIG_SPL #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#endif #define CONFIG_DDR_ECC #ifdef CONFIG_DDR_ECC diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index a96aa650f7..2141b8299a 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -34,7 +34,9 @@ #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER #define CONFIG_MEM_INIT_VALUE 0xdeadbeef #define CONFIG_FSL_DDR_BIST /* enable built-in memory test */ +#ifndef CONFIG_SPL #define CONFIG_FSL_DDR_INTERACTIVE /* Interactive debugging */ +#endif #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/ls1046ardb/ls1046ardb_pbi.cfg -- 2.25.1