From d4326aca187b965b6c96fee85cb6b98b6e5fe79c Mon Sep 17 00:00:00 2001 From: wdenk Date: Sun, 18 Apr 2004 21:17:30 +0000 Subject: [PATCH] * Add missing microblaze header files * Patch by Rune Torgersen, 06 Apr 2004: - Fix some PCI problems on the MPC8266ADS board - Fix the location of some PCI entries in the immap structure --- CHANGELOG | 4 + cpu/mpc8260/pci.c | 4 +- .../arch-microblaze/xbasic_types.h | 301 ++++++++++++++++++ .../arch-microblaze/xuartlite_l.h | 256 +++++++++++++++ include/asm-ppc/immap_8260.h | 12 +- 5 files changed, 571 insertions(+), 6 deletions(-) create mode 100644 include/asm-microblaze/arch-microblaze/xbasic_types.h create mode 100644 include/asm-microblaze/arch-microblaze/xuartlite_l.h diff --git a/CHANGELOG b/CHANGELOG index e7c273d3c1..c2acd37b85 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,10 @@ Changes for U-Boot 1.1.1: ====================================================================== +* Patch by Rune Torgersen, 06 Apr 2004: + - Fix some PCI problems on the MPC8266ADS board + - Fix the location of some PCI entries in the immap structure + * Patch by Yasushi Shoji, 07 Apr 2004: - add support for microblaze processors - add support for AtmarkTechno "suzaku" board diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c index dc077ed1d5..f068e8e50d 100644 --- a/cpu/mpc8260/pci.c +++ b/cpu/mpc8260/pci.c @@ -291,8 +291,8 @@ void pci_mpc8250_init (struct pci_controller *hose) immap->im_memctl.memc_pcibr0 = PCI_MSTR0_LOCAL | PCIBR_ENABLE; #ifdef CONFIG_MPC8266ADS - immap->im_memctl.memc_pcimsk0 = PCIMSK1_MASK; - immap->im_memctl.memc_pcibr0 = PCI_MSTR1_LOCAL | PCIBR_ENABLE; + immap->im_memctl.memc_pcimsk1 = PCIMSK1_MASK; + immap->im_memctl.memc_pcibr1 = PCI_MSTR1_LOCAL | PCIBR_ENABLE; #endif /* Release PCI RST (by default the PCI RST signal is held low) */ diff --git a/include/asm-microblaze/arch-microblaze/xbasic_types.h b/include/asm-microblaze/arch-microblaze/xbasic_types.h new file mode 100644 index 0000000000..25012e6b95 --- /dev/null +++ b/include/asm-microblaze/arch-microblaze/xbasic_types.h @@ -0,0 +1,301 @@ +/****************************************************************************** +* +* Author: Xilinx, Inc. +* +* +* This program is free software; you can redistribute it and/or modify it +* under the terms of the GNU General Public License as published by the +* Free Software Foundation; either version 2 of the License, or (at your +* option) any later version. +* +* +* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A +* COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS +* ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR STANDARD, +* XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION IS FREE +* FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE FOR OBTAINING +* ANY THIRD PARTY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION. +* XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO +* THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY +* WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM +* CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND +* FITNESS FOR A PARTICULAR PURPOSE. +* +* +* Xilinx hardware products are not intended for use in life support +* appliances, devices, or systems. Use in such applications is +* expressly prohibited. +* +* +* (c) Copyright 2002-2003 Xilinx Inc. +* All rights reserved. +* +* +* You should have received a copy of the GNU General Public License along +* with this program; if not, write to the Free Software Foundation, Inc., +* 675 Mass Ave, Cambridge, MA 02139, USA. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xbasic_types.h +* +* This file contains basic types for Xilinx software IP. These types do not +* follow the standard naming convention with respect to using the component +* name in front of each name because they are considered to be primitives. +* +* @note +* +* This file contains items which are architecture dependent. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver	 Who	Date	Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a rmm  12/14/01 First release
+*	rmm  05/09/03 Added "xassert always" macros to rid ourselves of diab
+*		      compiler warnings
+*
+* +******************************************************************************/ + +#ifndef XBASIC_TYPES_H /* prevent circular inclusions */ +#define XBASIC_TYPES_H /* by using protection macros */ + +/***************************** Include Files *********************************/ + +/************************** Constant Definitions *****************************/ + +#ifndef TRUE +#define TRUE 1 +#endif +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef NULL +#define NULL 0 +#endif +/** Null */ + +#define XCOMPONENT_IS_READY 0x11111111 /* component has been initialized */ +#define XCOMPONENT_IS_STARTED 0x22222222 /* component has been started */ + +/* the following constants and declarations are for unit test purposes and are + * designed to be used in test applications. + */ +#define XTEST_PASSED 0 +#define XTEST_FAILED 1 + +#define XASSERT_NONE 0 +#define XASSERT_OCCURRED 1 + +extern unsigned int XAssertStatus; +extern void XAssert(char *, int); + +/**************************** Type Definitions *******************************/ + +/** @name Primitive types + * These primitive types are created for transportability. + * They are dependent upon the target architecture. + * @{ + */ +#include + +typedef struct { + u32 Upper; + u32 Lower; +} Xuint64; + +/* Xilinx's unsigned integer types */ +typedef u32 Xuint32; +typedef u16 Xuint16; +typedef u8 Xuint8; + +/* and signed integer types */ +typedef s32 Xint32; +typedef s16 Xint16; +typedef s8 Xint8; + +#ifndef NULL +#define NULL 0 +#endif + +typedef unsigned long Xboolean; +#define XNULL NULL + +#define XTRUE 1 +#define XFALSE 0 + +/*@}*/ + +/** + * This data type defines an interrupt handler for a device. + * The argument points to the instance of the component + */ +typedef void (*XInterruptHandler) (void *InstancePtr); + +/** + * This data type defines a callback to be invoked when an + * assert occurs. The callback is invoked only when asserts are enabled + */ +typedef void (*XAssertCallback) (char *FilenamePtr, int LineNumber); + +/***************** Macros (Inline Functions) Definitions *********************/ + +/*****************************************************************************/ +/** +* Return the most significant half of the 64 bit data type. +* +* @param x is the 64 bit word. +* +* @return +* +* The upper 32 bits of the 64 bit word. +* +* @note +* +* None. +* +******************************************************************************/ +#define XUINT64_MSW(x) ((x).Upper) + +/*****************************************************************************/ +/** +* Return the least significant half of the 64 bit data type. +* +* @param x is the 64 bit word. +* +* @return +* +* The lower 32 bits of the 64 bit word. +* +* @note +* +* None. +* +******************************************************************************/ +#define XUINT64_LSW(x) ((x).Lower) + +#ifndef NDEBUG + +/*****************************************************************************/ +/** +* This assert macro is to be used for functions that do not return anything +* (void). This in conjunction with the XWaitInAssert boolean can be used to +* accomodate tests so that asserts which fail allow execution to continue. +* +* @param expression is the expression to evaluate. If it evaluates to false, +* the assert occurs. +* +* @return +* +* Returns void unless the XWaitInAssert variable is true, in which case +* no return is made and an infinite loop is entered. +* +* @note +* +* None. +* +******************************************************************************/ +#define XASSERT_VOID(expression) \ +{ \ + if (expression) { \ + XAssertStatus = XASSERT_NONE; \ + } else { \ + XAssert(__FILE__, __LINE__); \ + XAssertStatus = XASSERT_OCCURRED; \ + return; \ + } \ +} + +/*****************************************************************************/ +/** +* This assert macro is to be used for functions that do return a value. This in +* conjunction with the XWaitInAssert boolean can be used to accomodate tests so +* that asserts which fail allow execution to continue. +* +* @param expression is the expression to evaluate. If it evaluates to false, +* the assert occurs. +* +* @return +* +* Returns 0 unless the XWaitInAssert variable is true, in which case +* no return is made and an infinite loop is entered. +* +* @note +* +* None. +* +******************************************************************************/ +#define XASSERT_NONVOID(expression) \ +{ \ + if (expression) { \ + XAssertStatus = XASSERT_NONE; \ + } else { \ + XAssert(__FILE__, __LINE__); \ + XAssertStatus = XASSERT_OCCURRED; \ + return 0; \ + } \ +} + +/*****************************************************************************/ +/** +* Always assert. This assert macro is to be used for functions that do not +* return anything (void). Use for instances where an assert should always +* occur. +* +* @return +* +* Returns void unless the XWaitInAssert variable is true, in which case +* no return is made and an infinite loop is entered. +* +* @note +* +* None. +* +******************************************************************************/ +#define XASSERT_VOID_ALWAYS() \ +{ \ + XAssert(__FILE__, __LINE__); \ + XAssertStatus = XASSERT_OCCURRED; \ + return; \ +} + +/*****************************************************************************/ +/** +* Always assert. This assert macro is to be used for functions that do return +* a value. Use for instances where an assert should always occur. +* +* @return +* +* Returns void unless the XWaitInAssert variable is true, in which case +* no return is made and an infinite loop is entered. +* +* @note +* +* None. +* +******************************************************************************/ +#define XASSERT_NONVOID_ALWAYS() \ +{ \ + XAssert(__FILE__, __LINE__); \ + XAssertStatus = XASSERT_OCCURRED; \ + return 0; \ +} + +#else + +#define XASSERT_VOID(expression) +#define XASSERT_VOID_ALWAYS() +#define XASSERT_NONVOID(expression) +#define XASSERT_NONVOID_ALWAYS() +#endif + +/************************** Function Prototypes ******************************/ + +void XAssertSetCallback(XAssertCallback Routine); + +#endif /* end of protection macro */ diff --git a/include/asm-microblaze/arch-microblaze/xuartlite_l.h b/include/asm-microblaze/arch-microblaze/xuartlite_l.h new file mode 100644 index 0000000000..b381a0d7b6 --- /dev/null +++ b/include/asm-microblaze/arch-microblaze/xuartlite_l.h @@ -0,0 +1,256 @@ +/***************************************************************************** +* +* XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" +* AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND +* SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE, +* OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, +* APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION +* THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT, +* AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE +* FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY +* WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE +* IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR +* REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF +* INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS +* FOR A PARTICULAR PURPOSE. +* +* (c) Copyright 2002 Xilinx Inc. +* All rights reserved. +* +*****************************************************************************/ +/****************************************************************************/ +/** +* +* @file xuartlite_l.h +* +* This header file contains identifiers and low-level driver functions (or +* macros) that can be used to access the device. High-level driver functions +* are defined in xuartlite.h. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver	Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00b rpm  04/25/02 First release
+*
+* +*****************************************************************************/ + +#ifndef XUARTLITE_L_H /* prevent circular inclusions */ +#define XUARTLITE_L_H /* by using protection macros */ + +/***************************** Include Files ********************************/ + +#include "xbasic_types.h" +#include "xio.h" + +/************************** Constant Definitions ****************************/ + +/* UART Lite register offsets */ + +#define XUL_RX_FIFO_OFFSET 0 /* receive FIFO, read only */ +#define XUL_TX_FIFO_OFFSET 4 /* transmit FIFO, write only */ +#define XUL_STATUS_REG_OFFSET 8 /* status register, read only */ +#define XUL_CONTROL_REG_OFFSET 12 /* control register, write only */ + +/* control register bit positions */ + +#define XUL_CR_ENABLE_INTR 0x10 /* enable interrupt */ +#define XUL_CR_FIFO_RX_RESET 0x02 /* reset receive FIFO */ +#define XUL_CR_FIFO_TX_RESET 0x01 /* reset transmit FIFO */ + +/* status register bit positions */ + +#define XUL_SR_PARITY_ERROR 0x80 +#define XUL_SR_FRAMING_ERROR 0x40 +#define XUL_SR_OVERRUN_ERROR 0x20 +#define XUL_SR_INTR_ENABLED 0x10 /* interrupt enabled */ +#define XUL_SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */ +#define XUL_SR_TX_FIFO_EMPTY 0x04 /* transmit FIFO empty */ +#define XUL_SR_RX_FIFO_FULL 0x02 /* receive FIFO full */ +#define XUL_SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */ + +/* the following constant specifies the size of the FIFOs, the size of the + * FIFOs includes the transmitter and receiver such that it is the total number + * of bytes that the UART can buffer + */ +#define XUL_FIFO_SIZE 16 + +/* Stop bits are fixed at 1. Baud, parity, and data bits are fixed on a + * per instance basis + */ +#define XUL_STOP_BITS 1 + +/* Parity definitions + */ +#define XUL_PARITY_NONE 0 +#define XUL_PARITY_ODD 1 +#define XUL_PARITY_EVEN 2 + +/**************************** Type Definitions ******************************/ + +/***************** Macros (Inline Functions) Definitions ********************/ + +/***************************************************************************** +* +* Low-level driver macros and functions. The list below provides signatures +* to help the user use the macros. +* +* void XUartLite_mSetControlReg(u32 BaseAddress, u32 Mask) +* u32 XUartLite_mGetControlReg(u32 BaseAddress) +* u32 XUartLite_mGetStatusReg(u32 BaseAddress) +* +* Xboolean XUartLite_mIsReceiveEmpty(u32 BaseAddress) +* Xboolean XUartLite_mIsTransmitFull(u32 BaseAddress) +* Xboolean XUartLite_mIsIntrEnabled(u32 BaseAddress) +* +* void XUartLite_mEnableIntr(u32 BaseAddress) +* void XUartLite_mDisableIntr(u32 BaseAddress) +* +* void XUartLite_SendByte(u32 BaseAddress, u8 Data); +* u8 XUartLite_RecvByte(u32 BaseAddress); +* +*****************************************************************************/ + +/****************************************************************************/ +/** +* +* Set the contents of the control register. Use the XUL_CR_* constants defined +* above to create the bit-mask to be written to the register. +* +* @param BaseAddress is the base address of the device +* @param Mask is the 32-bit value to write to the control register +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +#define XUartLite_mSetControlReg(BaseAddress, Mask) \ + XIo_Out32((BaseAddress) + XUL_CONTROL_REG_OFFSET, (Mask)) + + +/****************************************************************************/ +/** +* +* Get the contents of the control register. Use the XUL_CR_* constants defined +* above to interpret the bit-mask returned. +* +* @param BaseAddress is the base address of the device +* +* @return A 32-bit value representing the contents of the control register. +* +* @note None. +* +*****************************************************************************/ +#define XUartLite_mGetControlReg(BaseAddress) \ + XIo_In32((BaseAddress) + XUL_CONTROL_REG_OFFSET) + + +/****************************************************************************/ +/** +* +* Get the contents of the status register. Use the XUL_SR_* constants defined +* above to interpret the bit-mask returned. +* +* @param BaseAddress is the base address of the device +* +* @return A 32-bit value representing the contents of the status register. +* +* @note None. +* +*****************************************************************************/ +#define XUartLite_mGetStatusReg(BaseAddress) \ + XIo_In32((BaseAddress) + XUL_STATUS_REG_OFFSET) + + +/****************************************************************************/ +/** +* +* Check to see if the receiver has data. +* +* @param BaseAddress is the base address of the device +* +* @return XTRUE if the receiver is empty, XFALSE if there is data present. +* +* @note None. +* +*****************************************************************************/ +#define XUartLite_mIsReceiveEmpty(BaseAddress) \ + (!(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA)) + + +/****************************************************************************/ +/** +* +* Check to see if the transmitter is full. +* +* @param BaseAddress is the base address of the device +* +* @return XTRUE if the transmitter is full, XFALSE otherwise. +* +* @note None. +* +*****************************************************************************/ +#define XUartLite_mIsTransmitFull(BaseAddress) \ + (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL) + + +/****************************************************************************/ +/** +* +* Check to see if the interrupt is enabled. +* +* @param BaseAddress is the base address of the device +* +* @return XTRUE if the interrupt is enabled, XFALSE otherwise. +* +* @note None. +* +*****************************************************************************/ +#define XUartLite_mIsIntrEnabled(BaseAddress) \ + (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED) + + +/****************************************************************************/ +/** +* +* Enable the device interrupt. Preserve the contents of the control register. +* +* @param BaseAddress is the base address of the device +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +#define XUartLite_mEnableIntr(BaseAddress) \ + XUartLite_mSetControlReg((BaseAddress), \ + XUartLite_mGetControlReg((BaseAddress)) | XUL_CR_ENABLE_INTR) + + +/****************************************************************************/ +/** +* +* Disable the device interrupt. Preserve the contents of the control register. +* +* @param BaseAddress is the base address of the device +* +* @return None. +* +* @note None. +* +*****************************************************************************/ +#define XUartLite_mDisableIntr(BaseAddress) \ + XUartLite_mSetControlReg((BaseAddress), \ + XUartLite_mGetControlReg((BaseAddress)) & ~XUL_CR_ENABLE_INTR) + + +/************************** Function Prototypes *****************************/ + +void XUartLite_SendByte(u32 BaseAddress, u8 Data); +u8 XUartLite_RecvByte(u32 BaseAddress); + + +#endif /* end of protection macro */ diff --git a/include/asm-ppc/immap_8260.h b/include/asm-ppc/immap_8260.h index 407cf49956..1272e99428 100644 --- a/include/asm-ppc/immap_8260.h +++ b/include/asm-ppc/immap_8260.h @@ -135,17 +135,21 @@ typedef struct pci_config { uint pci_imimr; char res5[24]; uint pci_ifhpr; + char res5_2[4]; uint pci_iftpr; - char res6[8]; + char res6[4]; uint pci_iphpr; + char res6_2[4]; uint pci_iptpr; - char res7[8]; + char res7[4]; uint pci_ofhpr; + char res7_2[4]; uint pci_oftpr; - char res8[8]; + char res8[4]; uint pci_ophpr; + char res8_2[4]; uint pci_optpr; - char res9[12]; + char res9[8]; uint pci_mucr; char res10[8]; uint pci_qbar; -- 2.25.1