From d0967bbd0f8e79de59b6a64bd061f1f8823d4e55 Mon Sep 17 00:00:00 2001 From: Piotr Dymacz Date: Sun, 13 Mar 2016 22:43:07 +0100 Subject: [PATCH] Calculate SPI clock only if needed in qca_clocks.c --- u-boot/cpu/mips/ar7240/qca_clocks.c | 23 +++++++++++++---------- 1 file changed, 13 insertions(+), 10 deletions(-) diff --git a/u-boot/cpu/mips/ar7240/qca_clocks.c b/u-boot/cpu/mips/ar7240/qca_clocks.c index 89e7444..1dc71af 100644 --- a/u-boot/cpu/mips/ar7240/qca_clocks.c +++ b/u-boot/cpu/mips/ar7240/qca_clocks.c @@ -293,19 +293,22 @@ void qca_sys_clocks(u32 *cpu_clk, qca_ahb_clk = cpu_pll / temp; } #endif - /* Calculate SPI FLASH clock - first disable SPI */ - qca_soc_reg_read_set(QCA_SPI_FUNC_SEL_REG, - QCA_SPI_FUNC_SEL_FUNC_SEL_MASK); + /* Calculate SPI FLASH clock if needed */ + if (spi_clk != NULL) { + /* First disable SPI */ + qca_soc_reg_read_set(QCA_SPI_FUNC_SEL_REG, + QCA_SPI_FUNC_SEL_FUNC_SEL_MASK); - /* SPI clock = AHB clock / ((SPI clock divider + 1) * 2) */ - reg_val = (qca_soc_reg_read(QCA_SPI_CTRL_REG) & QCA_SPI_CTRL_CLK_DIV_MASK) - >> QCA_SPI_CTRL_CLK_DIV_SHIFT; + /* SPI clock = AHB clock / ((SPI clock divider + 1) * 2) */ + reg_val = (qca_soc_reg_read(QCA_SPI_CTRL_REG) & QCA_SPI_CTRL_CLK_DIV_MASK) + >> QCA_SPI_CTRL_CLK_DIV_SHIFT; - qca_spi_clk = qca_ahb_clk / ((reg_val + 1) * 2); + qca_spi_clk = qca_ahb_clk / ((reg_val + 1) * 2); - /* Re-enable SPI */ - qca_soc_reg_read_clear(QCA_SPI_FUNC_SEL_REG, - QCA_SPI_FUNC_SEL_FUNC_SEL_MASK); + /* Re-enable SPI */ + qca_soc_reg_read_clear(QCA_SPI_FUNC_SEL_REG, + QCA_SPI_FUNC_SEL_FUNC_SEL_MASK); + } /* Return values */ if (cpu_clk != NULL) -- 2.25.1