From c879e76e6cfded5b0fc311c6050e3dab6b2a6e4b Mon Sep 17 00:00:00 2001 From: Piotr Dymacz Date: Tue, 16 Aug 2016 19:50:30 +0200 Subject: [PATCH] Cleanups in QCA953x eth/phy related code Get rid of some warnings from compilator. This also fixes #111 (don't drop broadcast packets). --- u-boot/board/ar7240/common/athr_s27_phy.c | 36 +++++------------------ u-boot/board/ar7240/common/qca-eth-953x.c | 14 +++------ 2 files changed, 12 insertions(+), 38 deletions(-) diff --git a/u-boot/board/ar7240/common/athr_s27_phy.c b/u-boot/board/ar7240/common/athr_s27_phy.c index af03afa..ccdbebf 100644 --- a/u-boot/board/ar7240/common/athr_s27_phy.c +++ b/u-boot/board/ar7240/common/athr_s27_phy.c @@ -42,6 +42,8 @@ extern int ath_gmac_miiphy_read(char *devname, uint32_t phaddr, uint8_t reg, uint16_t *data); extern int ath_gmac_miiphy_write(char *devname, uint32_t phaddr, uint8_t reg, uint16_t data); +void athrs27_reg_rmw(unsigned int s27_addr, unsigned int s27_write_data); + #define phy_reg_read(base, addr, reg) \ ath_gmac_miiphy_read(ath_gmac_unit2name(base), addr, reg, NULL) @@ -269,8 +271,6 @@ int athrs27_reg_init_lan(void) uint32_t rd_val; #endif int phyUnit; - uint32_t phyBase = 0; - BOOL foundPhy = FALSE; uint32_t phyAddr = 0; @@ -279,7 +279,7 @@ int athrs27_reg_init_lan(void) athrs27_reg_write(0x0, athrs27_reg_read(0x0)|0x80000000); while(i--) { - sysMsDelay(100); + //sysMsDelay(100); if(!(athrs27_reg_read(0x0)&0x80000000)) break; } @@ -294,8 +294,6 @@ int athrs27_reg_init_lan(void) for (phyUnit=0; phyUnit < ATHR_PHY_MAX; phyUnit++) { - foundPhy = TRUE; - phyBase = ATHR_PHYBASE(phyUnit); phyAddr = ATHR_PHYADDR(phyUnit); #if defined(S27_FORCE_100M) @@ -378,10 +376,8 @@ BOOL athrs27_phy_is_link_alive(int phyUnit) { uint16_t phyHwStatus; - uint32_t phyBase; uint32_t phyAddr; - phyBase = ATHR_PHYBASE(phyUnit); phyAddr = ATHR_PHYADDR(phyUnit); phyHwStatus = s27_rd_phy(phyAddr, ATHR_PHY_SPEC_STATUS); @@ -409,21 +405,14 @@ athrs27_phy_setup(int ethUnit) uint16_t phyHwStatus; uint16_t timeout; int liveLinks = 0; - uint32_t phyBase = 0; BOOL foundPhy = FALSE; uint32_t phyAddr = 0; -//#if S27_PHY_DEBUG - uint32_t rd_val = 0; -//#endif - uint32_t ar7240_revid; - /* See if there's any configuration data for this enet */ /* start auto negogiation on each phy */ for (phyUnit=0; phyUnit < ATHR_PHY_MAX; phyUnit++) { foundPhy = TRUE; - phyBase = ATHR_PHYBASE(phyUnit); phyAddr = ATHR_PHYADDR(phyUnit); if (!ATHR_IS_ETHUNIT(phyUnit, ethUnit)) { @@ -455,10 +444,6 @@ athrs27_phy_setup(int ethUnit) | ATHR_CTRL_SOFTWARE_RESET); } } - rd_val = s27_rd_phy(phyAddr,ATHR_PHY_CONTROL); - //printf("%s ATHR_PHY_CONTROL %d :%x\n",__func__,phyAddr,rd_val); - rd_val = s27_rd_phy(phyAddr,ATHR_PHY_SPEC_STATUS); - //printf("%s ATHR_PHY_SPEC_STAUS %d :%x\n",__func__,phyAddr,rd_val); } if (!foundPhy) { return FALSE; /* No PHY's configured for this ethUnit */ @@ -468,10 +453,12 @@ athrs27_phy_setup(int ethUnit) * After the phy is reset, it takes a little while before * it can respond properly. */ + /* if (ethUnit == ENET_UNIT_LAN) sysMsDelay(100); else sysMsDelay(300); + */ /* * Wait up to 3 seconds for ALL associated PHYs to finish @@ -502,7 +489,7 @@ athrs27_phy_setup(int ethUnit) break; } - sysMsDelay(150); + //sysMsDelay(150); } /* extend the cable length */ s27_wr_phy(phyUnit, ATHR_DEBUG_PORT_ADDRESS, 0x14); @@ -570,7 +557,6 @@ athrs27_phy_setup(int ethUnit) int athrs27_phy_is_fdx(int ethUnit,int phyUnit) { - uint32_t phyBase; uint32_t phyAddr; uint16_t phyHwStatus; int ii = 200; @@ -585,7 +571,6 @@ athrs27_phy_is_fdx(int ethUnit,int phyUnit) if (athrs27_phy_is_link_alive(phyUnit)) { - phyBase = ATHR_PHYBASE(phyUnit); phyAddr = ATHR_PHYADDR(phyUnit); do { @@ -616,17 +601,14 @@ int athrs27_phy_speed(int ethUnit,int phyUnit) { uint16_t phyHwStatus; - uint32_t phyBase; uint32_t phyAddr; int ii = 200; - int phySpeed; + int phySpeed = _100BASET; for (phyUnit=0; phyUnit < ATHR_PHY_MAX; phyUnit++) { if (!ATHR_IS_ETHUNIT(phyUnit, ethUnit)) { continue; } - - phyBase = ATHR_PHYBASE(phyUnit); phyAddr = ATHR_PHYADDR(phyUnit); phySpeed = _10BASET; @@ -694,7 +676,6 @@ athrs27_phy_is_up(int ethUnit) int linkCount = 0; int lostLinks = 0; int gainedLinks = 0; - uint32_t phyBase; uint32_t phyAddr; int phyUnit; @@ -703,7 +684,6 @@ athrs27_phy_is_up(int ethUnit) continue; } - phyBase = ATHR_PHYBASE(phyUnit); phyAddr = ATHR_PHYADDR(phyUnit); lastStatus = &athrPhyInfo[phyUnit]; @@ -864,7 +844,7 @@ void s27_wr_phy(unsigned int phy_addr, unsigned int reg_addr, unsigned int write phy_reg_write(unit, phy_addr, reg_addr, write_data); } -int athrs27_mdc_check() +int athrs27_mdc_check(void) { int i; diff --git a/u-boot/board/ar7240/common/qca-eth-953x.c b/u-boot/board/ar7240/common/qca-eth-953x.c index 26f5e7b..a96582d 100644 --- a/u-boot/board/ar7240/common/qca-eth-953x.c +++ b/u-boot/board/ar7240/common/qca-eth-953x.c @@ -43,6 +43,7 @@ int ath_gmac_miiphy_read(char *devname, uint32_t phaddr, uint8_t reg, uint16_t *data); int ath_gmac_miiphy_write(char *devname, uint32_t phaddr, uint8_t reg, uint16_t data); extern void ath_sys_frequency(uint32_t *, uint32_t *, uint32_t *); +extern int athrs27_reg_init_lan(void); #ifndef CFG_ATH_GMAC_NMACS #define CFG_ATH_GMAC_NMACS 1 @@ -248,7 +249,7 @@ static void ath_gmac_hw_start(ath_gmac_mac_t *mac) * and Multi/Broad cast frames. */ - ath_gmac_reg_wr(mac, ATH_MAC_FIFO_CFG_5, 0x7eccf); + ath_gmac_reg_wr(mac, ATH_MAC_FIFO_CFG_5, 0x7ffff); ath_gmac_reg_wr(mac, ATH_MAC_FIFO_CFG_3, 0x1f00140); @@ -362,6 +363,8 @@ static int ath_gmac_alloc_fifo(int ndesc, ath_gmac_desc_t ** fifo) ~(CFG_CACHELINE_SIZE - 1)); p = UNCACHED_SDRAM(p); + memset((void*)p, 0, size); + for (i = 0; i < ndesc; i++) fifo[i] = (ath_gmac_desc_t *) p + i; @@ -595,17 +598,8 @@ int ath_gmac_enet_initialize(bd_t * bis) ath_gmac_hw_start(ath_gmac_macs[i]); ath_gmac_setup_fifos(ath_gmac_macs[i]); - - udelay(100 * 1000); - { - unsigned char *mac = dev[i]->enetaddr; - - //printf("%s: %02x:%02x:%02x:%02x:%02x:%02x\n", dev[i]->name, - // mac[0] & 0xff, mac[1] & 0xff, mac[2] & 0xff, - // mac[3] & 0xff, mac[4] & 0xff, mac[5] & 0xff); - } mac_l = (dev[i]->enetaddr[4] << 8) | (dev[i]->enetaddr[5]); mac_h = (dev[i]->enetaddr[0] << 24) | (dev[i]->enetaddr[1] << 16) | (dev[i]->enetaddr[2] << 8) | (dev[i]->enetaddr[3] << 0); -- 2.25.1