From c3d2b4b48a225edd35f80f4b7b8e70e628366575 Mon Sep 17 00:00:00 2001 From: wdenk Date: Sat, 22 Jan 2005 18:13:04 +0000 Subject: [PATCH] Code cleanup. --- CHANGELOG | 2 ++ board/dbau1x00/dbau1x00.c | 2 ++ common/cmd_fpga.c | 36 ++++++++++++++++++------------------ drivers/i82365.c | 16 +++++++--------- include/configs/RPXlite_DW.h | 25 +++++-------------------- 5 files changed, 34 insertions(+), 47 deletions(-) diff --git a/CHANGELOG b/CHANGELOG index 6ae7c78c6d..6194f5c343 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,8 @@ Changes for U-Boot 1.1.3: ====================================================================== +* Code cleanup + * Patch by Robin Getz, 13 Oct 2004: Add standalone application to change SMC91C111 MAC addresses, see examples/README.smc91111_eeprom diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c index 1f7253ee96..d29e8d591e 100644 --- a/board/dbau1x00/dbau1x00.c +++ b/board/dbau1x00/dbau1x00.c @@ -41,8 +41,10 @@ void write_one_tlb( int index, u32 pagemask, u32 hi, u32 low0, u32 low1 ); int checkboard (void) { +#ifdef CONFIG_IDE_PCMCIA u16 status; volatile u32 *pcmcia_bcsr = (u32*)(DB1XX0_BCSR_ADDR+0x10); +#endif /* CONFIG_IDE_PCMCIA */ volatile u32 *phy = (u32*)(DB1XX0_BCSR_ADDR+0xC); volatile u32 *sys_counter = (volatile u32*)SYS_COUNTER_CNTRL; u32 proc_id; diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c index d50cede3b5..900d35aa44 100644 --- a/common/cmd_fpga.c +++ b/common/cmd_fpga.c @@ -31,6 +31,7 @@ #include #endif #include +#include #if 0 #define FPGA_DEBUG @@ -76,7 +77,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) /* get design name (identifier, length, string) */ if (*dataptr++ != 0x61) { - PRINTF(__FUNCTION__ ": Design name identifier not recognized in bitstream.\n"); + PRINTF("fpga_loadbitstream: Design name identifier not recognized in bitstream.\n"); return FPGA_FAIL; } @@ -86,60 +87,60 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size) buffer[i]=*dataptr++; buffer[length-5]='\0'; /* remove filename extension */ - PRINTF(__FUNCTION__ ": design name = \"%s\".\n",buffer); + PRINTF("fpga_loadbitstream: design name = \"%s\".\n",buffer); /* get part number (identifier, length, string) */ if (*dataptr++ != 0x62) { - printf(__FUNCTION__ ": Part number identifier not recognized in bitstream.\n"); + printf("fpga_loadbitstream: Part number identifier not recognized in bitstream.\n"); return FPGA_FAIL; } length = (*dataptr << 8) + *(dataptr+1); dataptr+=2; for(i=0;i= size) { - printf(__FUNCTION__ ": Could not find right length of data in bitstream.\n"); + printf("fpga_loadbitstream: Could not find right length of data in bitstream.\n"); return FPGA_FAIL; } /* allocate memory */ swapdata = (char *)malloc(swapsize); if (swapdata == NULL) { - printf(__FUNCTION__ ": Could not allocate %d bytes memory !\n",swapsize); + printf("fpga_loadbitstream: Could not allocate %d bytes memory !\n",swapsize); return FPGA_FAIL; } @@ -195,17 +196,16 @@ int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) data_size = simple_strtoul (argv[4], NULL, 16); case 4: /* fpga */ fpga_data = (void *) simple_strtoul (argv[3], NULL, 16); - PRINTF (__FUNCTION__ ": fpga_data = 0x%x\n", + PRINTF ("do_fpga: fpga_data = 0x%x\n", (uint) fpga_data); case 3: /* fpga */ dev = (int) simple_strtoul (argv[2], NULL, 16); - PRINTF (__FUNCTION__ ": device = %d\n", dev); + PRINTF ("do_fpga: device = %d\n", dev); /* FIXME - this is a really weak test */ if ((argc == 3) && (dev > fpga_count ())) { /* must be buffer ptr */ - PRINTF (__FUNCTION__ - ": Assuming buffer pointer in arg 3\n"); + PRINTF ("do_fpga: Assuming buffer pointer in arg 3\n"); fpga_data = (void *) dev; - PRINTF (__FUNCTION__ ": fpga_data = 0x%x\n", + PRINTF ("do_fpga: fpga_data = 0x%x\n", (uint) fpga_data); dev = FPGA_INVALID_DEVICE; /* reset device num */ } @@ -213,7 +213,7 @@ int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) op = (int) fpga_get_op (argv[1]); break; default: - PRINTF (__FUNCTION__ ": Too many or too few args (%d)\n", + PRINTF ("do_fpga: Too many or too few args (%d)\n", argc); op = FPGA_NONE; /* force usage display */ break; diff --git a/drivers/i82365.c b/drivers/i82365.c index 41b8d42b4c..c37383d481 100644 --- a/drivers/i82365.c +++ b/drivers/i82365.c @@ -149,7 +149,6 @@ static int pci_writel (socket_info_t * s, int r, u_int v) static u_char i365_get (socket_info_t * s, u_short reg) { u_char val; - #ifdef CONFIG_PCMCIA_SLOT_A int slot = 0; #else @@ -172,8 +171,9 @@ static void i365_set (socket_info_t * s, u_short reg, u_char data) #else int slot = 1; #endif + u_char val; - u_char val = I365_REG (slot, reg); + val = I365_REG (slot, reg); cb_writeb (s, val); cb_writeb2 (s, data); @@ -274,7 +274,6 @@ static u_int cirrus_set_opts (socket_info_t * s) { cirrus_state_t *p = &s->c_state; u_int mask = 0xffff; - #if DEBUG char buf[200]; @@ -585,7 +584,6 @@ static void set_bridge_opts (socket_info_t * s) static int i365_get_status (socket_info_t * s, u_int * value) { u_int status; - #ifdef CONFIG_CPC45 u_char val; u_char power, vcc, vpp; @@ -612,9 +610,7 @@ static int i365_get_status (socket_info_t * s, u_int * value) if ((val & PD67_INFO_CHIP_ID) == PD67_INFO_CHIP_ID) { val = i365_get (s, PD67_CHIP_INFO); if ((val & PD67_INFO_CHIP_ID) == 0) { - s->type = - (val & PD67_INFO_SLOTS) ? IS_PD672X : - IS_PD6710; + s->type = (val & PD67_INFO_SLOTS) ? IS_PD672X : IS_PD6710; i365_set (s, PD67_EXT_INDEX, 0xe5); if (i365_get (s, PD67_EXT_INDEX) != 0xe5) s->type = IS_VT83C469; @@ -1004,8 +1000,10 @@ static void i82365_dump_regions (pci_dev_t dev) pci_read_config_dword (dev, 0x00, tmp + 0); pci_read_config_dword (dev, 0x80, tmp + 1); - printf ("PCI CONF: %08X ... %08X\n", tmp[0], tmp[1]); - printf ("PCI MEM: ... %08X ... %08X\n", mem[0x8 / 4], mem[0x800 / 4]); + printf ("PCI CONF: %08X ... %08X\n", + tmp[0], tmp[1]); + printf ("PCI MEM: ... %08X ... %08X\n", + mem[0x8 / 4], mem[0x800 / 4]); printf ("CIS: ...%c%c%c%c%c%c%c%c...\n", cis[0x38], cis[0x3a], cis[0x3c], cis[0x3e], cis[0x40], cis[0x42], cis[0x44], cis[0x48]); diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h index 5ff5c8514e..ea01bc4750 100644 --- a/include/configs/RPXlite_DW.h +++ b/include/configs/RPXlite_DW.h @@ -73,8 +73,8 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_RESET_TO_RETRY 1 #define CONFIG_BOOT_RETRY_MIN 1 -#endif -#endif +#endif /* DEPLOYMENT */ +#endif /* DEBUG */ /* pre-boot commands */ #define CONFIG_PREBOOT "setenv stdout serial;setenv stdin serial" @@ -95,7 +95,6 @@ "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ "gatewayip=172.16.115.254\0" \ "netmask=255.255.255.0\0" \ -<<<<<<< RPXlite_DW.h "kernel_addr=ff040000\0" \ "ramdisk_addr=ff200000\0" \ "ku=era $(kernel_addr) ff1fffff;cp.b 100000 $(kernel_addr) " \ @@ -109,11 +108,6 @@ "ser=setenv stdout serial;setenv stdin serial\0" \ "verify=no" -======= - "kernel_addr=ff080000\0" \ - "ramdisk_addr=ff200000\0" \ - "" ->>>>>>> 1.3 #define CONFIG_BOOTCOMMAND "run flash_self" #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ @@ -137,6 +131,7 @@ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #endif + #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ @@ -180,6 +175,7 @@ #else #define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ #endif + #define CFG_MONITOR_BASE 0xFF000000 #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ @@ -205,15 +201,10 @@ #define CFG_ENV_IS_IN_FLASH #define CFG_ENV_OFFSET 0x30000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x8000 /* Total Size of Environment Sector */ -#endif - -<<<<<<< RPXlite_DW.h -#define CFG_RESET_ADDRESS ((ulong)((((immap_t *)CFG_IMMR)->im_clkrst.res))) +#endif /* CFG_ENV_IS_IN_NVRAM */ -======= #define CFG_RESET_ADDRESS ((ulong)((((immap_t *)CFG_IMMR)->im_clkrst.res))) ->>>>>>> 1.3 /*----------------------------------------------------------------------- * Cache Configuration */ @@ -288,16 +279,10 @@ /* Up to 48MHz system clock, we use 1:1 SYSTEM/BUS ratio */ #if defined(RPXlite_64MHz) #define CFG_SCCR ( SCCR_TBS | SCCR_EBDF01 ) /* %%%SCCR:0x02020000 */ -<<<<<<< RPXlite_DW.h #else #define CFG_SCCR ( SCCR_TBS | SCCR_EBDF00 ) /* %%%SCCR:0x02000000 */ #endif -======= -#else -#define CFG_SCCR ( SCCR_TBS | SCCR_EBDF00 ) /* %%%SCCR:0x02000000 */ -#endif ->>>>>>> 1.3 /*----------------------------------------------------------------------- * PCMCIA stuff *----------------------------------------------------------------------- -- 2.25.1