From c0171a10805352b44e314beb04e3c485202ff693 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Thu, 4 May 2006 22:45:27 +0000 Subject: [PATCH] Fix zImage target, now really build valid images SVN-Revision: 3729 --- .../linux/au1000-2.6/patches/003-zImage.patch | 3891 +++++++++-------- 1 file changed, 1953 insertions(+), 1938 deletions(-) diff --git a/openwrt/target/linux/au1000-2.6/patches/003-zImage.patch b/openwrt/target/linux/au1000-2.6/patches/003-zImage.patch index 6c2230f8c9..685b8548a8 100644 --- a/openwrt/target/linux/au1000-2.6/patches/003-zImage.patch +++ b/openwrt/target/linux/au1000-2.6/patches/003-zImage.patch @@ -1,892 +1,1300 @@ -diff -urN linux-2.6.16.7/arch/mips/Makefile linux-2.6.16.7.new/arch/mips/Makefile ---- linux-2.6.16.7/arch/mips/Makefile 2006-04-17 23:53:25.000000000 +0200 -+++ linux-2.6.16.7.new/arch/mips/Makefile 2006-04-20 19:27:22.000000000 +0200 -@@ -840,6 +840,12 @@ - vmlinux.srec: $(vmlinux-32) - +@$(call makeboot,$@) - -+zImage: vmlinux -+ +@$(call makeboot,$@) +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/head.S linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/head.S +--- linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/head.S 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/head.S 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,119 @@ ++/* ++ * arch/mips/kernel/head.S ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 1994, 1995 Waldorf Electronics ++ * Written by Ralf Baechle and Andreas Busse ++ * Copyright (C) 1995 - 1999 Ralf Baechle ++ * Copyright (C) 1996 Paul M. Antoine ++ * Modified for DECStation and hence R3000 support by Paul M. Antoine ++ * Further modifications by David S. Miller and Harald Koerfgen ++ * Copyright (C) 1999 Silicon Graphics, Inc. ++ * ++ * Head.S contains the MIPS exception handler and startup code. ++ * ++ ************************************************************************** ++ * 9 Nov, 2000. ++ * Added Cache Error exception handler and SBDDP EJTAG debug exception. ++ * ++ * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com ++ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. ++ ************************************************************************** ++ */ ++#include ++#include + -+zImage.flash: vmlinux -+ +@$(call makeboot,$@) ++#include ++#include ++#include ++#include ++#include + - CLEAN_FILES += vmlinux.ecoff \ - vmlinux.srec \ - vmlinux.rm200.tmp \ -@@ -848,6 +854,7 @@ - archclean: - @$(MAKE) $(clean)=arch/mips/boot - @$(MAKE) $(clean)=arch/mips/lasat -+ @$(MAKE) $(clean)=arch/mips/boot/compressed - - CLEAN_FILES += vmlinux.32 \ - vmlinux.64 \ -diff -urN linux-2.6.16.7/arch/mips/Makefile.orig linux-2.6.16.7.new/arch/mips/Makefile.orig ---- linux-2.6.16.7/arch/mips/Makefile.orig 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/Makefile.orig 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,858 @@ -+# -+# This file is subject to the terms and conditions of the GNU General Public -+# License. See the file "COPYING" in the main directory of this archive -+# for more details. -+# -+# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle -+# DECStation modifications by Paul M. Antoine, 1996 -+# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki -+# -+# This file is included by the global makefile so that you can add your own -+# architecture-specific flags and dependencies. Remember to do have actions -+# for "archclean" cleaning up for this architecture. -+# ++#define IndexInvalidate_I 0x00 ++#define IndexWriteBack_D 0x01 + -+as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \ -+ -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \ -+ else echo "$(2)"; fi ;) ++ .set noreorder ++ .cprestore ++ LEAF(start) ++start: ++ bal locate ++ nop ++locate: ++ subu s8, ra, 8 /* Where we were loaded */ ++ la sp, (.stack + 8192) + -+cflags-y := ++ move s0, a0 /* Save boot rom start args */ ++ move s1, a1 ++ move s2, a2 ++ move s3, a3 + -+# -+# Select the object file format to substitute into the linker script. -+# -+ifdef CONFIG_CPU_LITTLE_ENDIAN -+32bit-tool-prefix = mipsel-linux- -+64bit-tool-prefix = mips64el-linux- -+32bit-bfd = elf32-tradlittlemips -+64bit-bfd = elf64-tradlittlemips -+32bit-emul = elf32ltsmip -+64bit-emul = elf64ltsmip -+else -+32bit-tool-prefix = mips-linux- -+64bit-tool-prefix = mips64-linux- -+32bit-bfd = elf32-tradbigmips -+64bit-bfd = elf64-tradbigmips -+32bit-emul = elf32btsmip -+64bit-emul = elf64btsmip -+endif ++ la a0, start /* Where we were linked to run */ + -+ifdef CONFIG_32BIT -+gcc-abi = 32 -+tool-prefix = $(32bit-tool-prefix) -+UTS_MACHINE := mips -+endif -+ifdef CONFIG_64BIT -+gcc-abi = 64 -+tool-prefix = $(64bit-tool-prefix) -+UTS_MACHINE := mips64 -+endif ++ move a1, s8 ++ la a2, _edata ++ subu t1, a2, a0 ++ srl t1, t1, 2 + -+ifdef CONFIG_CROSSCOMPILE -+CROSS_COMPILE := $(tool-prefix) -+endif ++ /* copy text section */ ++ li t0, 0 ++1: lw v0, 0(a1) ++ nop ++ sw v0, 0(a0) ++ xor t0, t0, v0 ++ addu a0, 4 ++ bne a2, a0, 1b ++ addu a1, 4 + -+CHECKFLAGS-y += -D__linux__ -D__mips__ \ -+ -D_MIPS_SZINT=32 \ -+ -D_ABIO32=1 \ -+ -D_ABIN32=2 \ -+ -D_ABI64=3 -+CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \ -+ -D_MIPS_SZLONG=32 \ -+ -D_MIPS_SZPTR=32 \ -+ -D__PTRDIFF_TYPE__=int -+CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \ -+ -D_MIPS_SZLONG=64 \ -+ -D_MIPS_SZPTR=64 \ -+ -D__PTRDIFF_TYPE__="long int" -+CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__ -+CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__ ++ /* Clear BSS */ ++ la a0, _edata ++ la a2, _end ++2: sw zero, 0(a0) ++ bne a2, a0, 2b ++ addu a0, 4 + -+CHECKFLAGS = $(CHECKFLAGS-y) ++ /* push the D-Cache and invalidate I-Cache */ ++ li k0, 0x80000000 # start address ++ li k1, 0x80004000 # end address (16KB I-Cache) ++ subu k1, 128 + -+ifdef CONFIG_BUILD_ELF64 -+gas-abi = 64 -+ld-emul = $(64bit-emul) -+vmlinux-32 = vmlinux.32 -+vmlinux-64 = vmlinux -+else -+gas-abi = 32 -+ld-emul = $(32bit-emul) -+vmlinux-32 = vmlinux -+vmlinux-64 = vmlinux.64 ++1: ++ .set mips3 ++ cache IndexWriteBack_D, 0(k0) ++ cache IndexWriteBack_D, 32(k0) ++ cache IndexWriteBack_D, 64(k0) ++ cache IndexWriteBack_D, 96(k0) ++ cache IndexInvalidate_I, 0(k0) ++ cache IndexInvalidate_I, 32(k0) ++ cache IndexInvalidate_I, 64(k0) ++ cache IndexInvalidate_I, 96(k0) ++ .set mips0 + -+cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs) -+endif ++ bne k0, k1, 1b ++ addu k0, k0, 128 ++ /* done */ + ++ move a0, s8 /* load address */ ++ move a1, t1 /* length in words */ ++ move a2, t0 /* checksum */ ++ move a3, sp ++ ++ la ra, 1f ++ la k0, decompress_kernel ++ jr k0 ++ nop ++1: ++ ++ move a0, s0 ++ move a1, s1 ++ move a2, s2 ++ move a3, s3 ++ li k0, KERNEL_ENTRY ++ jr k0 ++ nop ++3: ++ b 3b ++ END(start) ++ .comm .stack,4096*2,4 +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/Makefile +--- linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/Makefile 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,110 @@ ++# arch/mips/boot/compressed/au1xxx/Makefile ++# ++# Makefile for AMD Alchemy Semiconductor Au1x based boards. ++# All of the boot loader code was derived from the ppc ++# boot code. +# -+# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel -+# code since it only slows down the whole thing. At some point we might make -+# use of global pointer optimizations but their use of $28 conflicts with -+# the current pointer optimization. -+# -+# The DECStation requires an ECOFF kernel for remote booting, other MIPS -+# machines may also. Since BFD is incredibly buggy with respect to -+# crossformat linking we rely on the elf2ecoff tool for format conversion. ++# Copyright 2001,2002 MontaVista Software Inc. +# -+cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -+cflags-y += -msoft-float -+LDFLAGS_vmlinux += -G 0 -static -n -nostdlib -+MODFLAGS += -mlong-calls -+ ++# Author: Mark A. Greer ++# mgreer@mvista.com +# -+# We explicitly add the endianness specifier if needed, this allows -+# to compile kernels with a toolchain for the other endianness. We -+# carefully avoid to add it redundantly because gcc 3.3/3.4 complains -+# when fed the toolchain default! ++# Copyright 2004 Embedded Alley Solutions, Inc ++# Ported and modified for mips 2.6 support by ++# Pete Popov +# -+cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB) -+cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL) ++# This program is free software; you can redistribute it and/or modify it ++# under the terms of the GNU General Public License as published by the ++# Free Software Foundation; either version 2 of the License, or (at your ++# option) any later version. + -+cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ -+ -fno-omit-frame-pointer ++boot := arch/mips/boot ++compressed := $(boot)/compressed ++utils := $(compressed)/utils ++lib := $(compressed)/lib ++images := $(compressed)/images ++common := $(compressed)/common + -+# -+# Use: $(call set_gccflags,,,,,) -+# -+# , -- preferred CPU and ISA designations (may require -+# recent tools) -+# , -- fallback CPU and ISA designations (have to work -+# with up to the oldest supported tools) -+# -- an ISA designation used as an ABI selector for -+# gcc versions that do not support "-mabi=32" -+# (depending on the CPU type, either "mips1" or -+# "mips2") -+# -+set_gccflags = $(shell \ -+while :; do \ -+ cpu=$(1); isa=-$(2); \ -+ for gcc_opt in -march= -mcpu=; do \ -+ $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \ -+ -xc /dev/null > /dev/null 2>&1 && \ -+ break 2; \ -+ done; \ -+ cpu=$(3); isa=-$(4); \ -+ for gcc_opt in -march= -mcpu=; do \ -+ $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \ -+ -xc /dev/null > /dev/null 2>&1 && \ -+ break 2; \ -+ done; \ -+ break; \ -+done; \ -+gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \ -+if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \ -+ gcc_isa=$$isa; \ -+else \ -+ gcc_abi=; gcc_isa=-$(5); \ -+fi; \ -+gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \ -+while :; do \ -+ for gas_opt in -Wa,-march= -Wa,-mcpu=; do \ -+ $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \ -+ -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \ -+ break 2; \ -+ done; \ -+ gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \ -+ break; \ -+done; \ -+if test "$(gcc-abi)" != "$(gas-abi)"; then \ -+ gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \ -+fi; \ -+if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \ -+ $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \ -+ -xc /dev/null > /dev/null 2>&1 && \ -+ gcc_isa=; \ -+fi; \ -+echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa) -+ -+# -+# CPU-dependent compiler/assembler options for optimization. -+# -+cflags-$(CONFIG_CPU_R3000) += \ -+ $(call set_gccflags,r3000,mips1,r3000,mips1,mips1) -+CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1 ++######################################################################### ++# START BOARD SPECIFIC VARIABLES + -+cflags-$(CONFIG_CPU_TX39XX) += \ -+ $(call set_gccflags,r3900,mips1,r3000,mips1,mips1) -+CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1 ++# These two variables control where the zImage is stored ++# in flash and loaded in memory. It only controls how the srec ++# file is generated, the code is the same. ++RAM_RUN_ADDR = 0x81000000 + -+cflags-$(CONFIG_CPU_R6000) += \ -+ $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2 ++ifdef CONFIG_MIPS_XXS1500 ++FLASH_LOAD_ADDR = 0xBF000000 ++else ++FLASH_LOAD_ADDR = 0xBFD00000 ++endif + -+cflags-$(CONFIG_CPU_R4300) += \ -+ $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 ++# These two variables specify the free ram region ++# that can be used for temporary malloc area ++AVAIL_RAM_START=0x80500000 ++AVAIL_RAM_END=0x80900000 + -+cflags-$(CONFIG_CPU_VR41XX) += \ -+ $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 ++# This one must match the LOADADDR in arch/mips/Makefile! ++LOADADDR=0x80100000 + -+cflags-$(CONFIG_CPU_R4X00) += \ -+ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 ++# WARNING WARNING WARNING ++# Note that with a LOADADDR of 0x80100000 and AVAIL_RAM_START of ++# 0x80500000, the max decompressed kernel size can be 4MB. Else we ++# start overwriting ourselve. You can change these vars as needed; ++# it would be much better if we just figured everything out on the fly. + -+cflags-$(CONFIG_CPU_TX49XX) += \ -+ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 ++# END BOARD SPECIFIC VARIABLES ++######################################################################### + -+cflags-$(CONFIG_CPU_MIPS32_R1) += \ -+ $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32 ++OBJECTS := $(obj)/head.o $(common)/misc-common.o $(common)/misc-simple.o \ ++ $(common)/au1k_uart.o ++LIBS := $(lib)/lib.a + -+cflags-$(CONFIG_CPU_MIPS32_R2) += \ -+ $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32 ++ENTRY := $(utils)/entry ++OFFSET := $(utils)/offset ++SIZE := $(utils)/size + -+cflags-$(CONFIG_CPU_MIPS64_R1) += \ -+ $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 ++LD_ARGS := -T $(compressed)/ld.script -Ttext $(RAM_RUN_ADDR) -Bstatic + -+cflags-$(CONFIG_CPU_MIPS64_R2) += \ -+ $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 ++ifdef CONFIG_CPU_LITTLE_ENDIAN ++OBJCOPY_ARGS = -O elf32-tradlittlemips ++else ++OBJCOPY_ARGS = -O elf32-tradbigmips ++endif + -+cflags-$(CONFIG_CPU_R5000) += \ -+ $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 ++$(obj)/head.o: $(obj)/head.S $(TOPDIR)/vmlinux ++ $(CC) -I $(TOPDIR)/include $(AFLAGS) \ ++ -DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) $(TOPDIR)/vmlinux ) \ ++ -c -o $*.o $< + -+cflags-$(CONFIG_CPU_R5432) += \ -+ $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 ++$(common)/misc-simple.o: ++ $(CC) -I $(TOPDIR)/include $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \ ++ -DAVAIL_RAM_START=$(AVAIL_RAM_START) \ ++ -DAVAIL_RAM_END=$(AVAIL_RAM_END) \ ++ -DLOADADDR=$(LOADADDR) \ ++ -DZIMAGE_SIZE=0 -c -o $@ $*.c + -+cflags-$(CONFIG_CPU_NEVADA) += \ -+ $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 ++$(obj)/zvmlinux: $(OBJECTS) $(LIBS) $(srctree)/$(compressed)/ld.script $(images)/vmlinux.gz $(common)/dummy.o ++ $(OBJCOPY) \ ++ --add-section=.image=$(images)/vmlinux.gz \ ++ --set-section-flags=.image=contents,alloc,load,readonly,data \ ++ $(common)/dummy.o $(common)/image.o ++ $(LD) $(LD_ARGS) -o $@ $(OBJECTS) $(common)/image.o $(LIBS) ++ $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R __kcrctab -R __ksymtab_strings \ ++ -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap + -+cflags-$(CONFIG_CPU_RM7000) += \ -+ $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 ++# Here we manipulate the image in order to get it the necessary ++# srecord file we need. ++zImage: $(obj)/zvmlinux ++ mv $(obj)/zvmlinux $(images)/zImage ++ $(OBJCOPY) -O srec $(images)/zImage $(images)/zImage.srec ++ $(OBJCOPY) -O binary $(images)/zImage $(images)/zImage.bin + -+cflags-$(CONFIG_CPU_RM9000) += \ -+ $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 ++zImage.flash: zImage ++ ( \ ++ flash=${FLASH_LOAD_ADDR} ; \ ++ ram=${RAM_RUN_ADDR} ; \ ++ adjust=$$[ $$flash - $$ram ] ; \ ++ $(OBJCOPY) -O srec --adjust-vma `printf '0x%08x' $$adjust` \ ++ $(images)/zImage $(images)/zImage.flash.srec ; \ ++ ) +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/au1k_uart.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/au1k_uart.c +--- linux-2.6.16.7/arch/mips/boot/compressed/common/au1k_uart.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/au1k_uart.c 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,103 @@ ++/* ++ * BRIEF MODULE DESCRIPTION ++ * Simple Au1000 uart routines. ++ * ++ * Copyright 2001 MontaVista Software Inc. ++ * Author: MontaVista Software, Inc. ++ * ppopov@mvista.com or source@mvista.com ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED ++ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN ++ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF ++ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ++ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ ++#include ++#include ++#include ++#include "ns16550.h" + ++typedef unsigned char uint8; ++typedef unsigned int uint32; + -+cflags-$(CONFIG_CPU_SB1) += \ -+ $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 ++#define UART16550_BAUD_2400 2400 ++#define UART16550_BAUD_4800 4800 ++#define UART16550_BAUD_9600 9600 ++#define UART16550_BAUD_19200 19200 ++#define UART16550_BAUD_38400 38400 ++#define UART16550_BAUD_57600 57600 ++#define UART16550_BAUD_115200 115200 + -+cflags-$(CONFIG_CPU_R8000) += \ -+ $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 ++#define UART16550_PARITY_NONE 0 ++#define UART16550_PARITY_ODD 0x08 ++#define UART16550_PARITY_EVEN 0x18 ++#define UART16550_PARITY_MARK 0x28 ++#define UART16550_PARITY_SPACE 0x38 + -+cflags-$(CONFIG_CPU_R10000) += \ -+ $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \ -+ -Wa,--trap -+CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 ++#define UART16550_DATA_5BIT 0x0 ++#define UART16550_DATA_6BIT 0x1 ++#define UART16550_DATA_7BIT 0x2 ++#define UART16550_DATA_8BIT 0x3 + -+ifdef CONFIG_CPU_SB1 -+ifdef CONFIG_SB1_PASS_1_WORKAROUNDS -+MODFLAGS += -msb1-pass1-workarounds -+endif -+endif ++#define UART16550_STOP_1BIT 0x0 ++#define UART16550_STOP_2BIT 0x4 + -+# -+# Firmware support -+# -+libs-$(CONFIG_ARC) += arch/mips/arc/ -+libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/ ++/* It would be nice if we had a better way to do this. ++ * It could be a variable defined in one of the board specific files. ++ */ ++#undef UART_BASE ++#ifdef CONFIG_COGENT_CSB250 ++#define UART_BASE UART3_ADDR ++#else ++#define UART_BASE UART0_ADDR ++#endif + -+# -+# Board-dependent options and extra files -+# ++/* memory-mapped read/write of the port */ ++#define UART16550_READ(y) (au_readl(UART_BASE + y) & 0xff) ++#define UART16550_WRITE(y,z) (au_writel(z&0xff, UART_BASE + y)) + -+# -+# Acer PICA 61, Mips Magnum 4000 and Olivetti M700. -+# -+core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ -+cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz -+load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000 ++/* ++ * We use uart 0, which is already initialized by ++ * yamon. ++ */ ++volatile struct NS16550 * ++serial_init(int chan) ++{ ++ volatile struct NS16550 *com_port; ++ com_port = (struct NS16550 *) UART_BASE; ++ return (com_port); ++} + -+# -+# Common Alchemy Au1x00 stuff -+# -+core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/ -+cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00 ++void ++serial_putc(volatile struct NS16550 *com_port, unsigned char c) ++{ ++ while ((UART16550_READ(UART_LSR)&0x40) == 0); ++ UART16550_WRITE(UART_TX, c); ++} + -+# -+# AMD Alchemy Pb1000 eval board -+# -+libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/ -+cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00 -+load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000 ++unsigned char ++serial_getc(volatile struct NS16550 *com_port) ++{ ++ while((UART16550_READ(UART_LSR) & 0x1) == 0); ++ return UART16550_READ(UART_RX); ++} + ++int ++serial_tstc(volatile struct NS16550 *com_port) ++{ ++ return((UART16550_READ(UART_LSR) & LSR_DR) != 0); ++} +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/dummy.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/dummy.c +--- linux-2.6.16.7/arch/mips/boot/compressed/common/dummy.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/dummy.c 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,4 @@ ++int main(void) ++{ ++ return 0; ++} +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/common/Makefile +--- linux-2.6.16.7/arch/mips/boot/compressed/common/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/Makefile 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,14 @@ +# -+# AMD Alchemy Pb1100 eval board -+# -+libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/ -+cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00 -+load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000 -+ ++# arch/mips/boot/compressed/common/Makefile +# -+# AMD Alchemy Pb1500 eval board ++# This file is subject to the terms and conditions of the GNU General Public ++# License. See the file "COPYING" in the main directory of this archive ++# for more details. +# -+libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/ -+cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00 -+load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000 -+ ++# Tom Rini January 2001 +# -+# AMD Alchemy Pb1550 eval board ++# Pete Popov, 2004 +# -+libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/ -+cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00 -+load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000 + -+# -+# AMD Alchemy Pb1200 eval board -+# -+libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/ -+cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00 -+load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000 ++lib-y := misc-common.o no_initrd.o dummy.o ++lib-$(CONFIG_SOC_AU1X00) += au1k_uart.o +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/misc-common.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-common.c +--- linux-2.6.16.7/arch/mips/boot/compressed/common/misc-common.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-common.c 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,434 @@ ++/* ++ * arch/mips/boot/compressed/common/misc-common.c ++ * ++ * Misc. bootloader code (almost) all platforms can use ++ * ++ * Author: Johnnie Peters ++ * Editor: Tom Rini ++ * ++ * Derived from arch/ppc/boot/prep/misc.c ++ * ++ * Ported by Pete Popov to ++ * support mips board(s). I also got rid of the vga console ++ * code. ++ * ++ * Copyright 2000-2001 MontaVista Software Inc. ++ * ++ * Ported to MIPS 2.6 by Pete Popov, ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ * ++ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED ++ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN ++ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, ++ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT ++ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF ++ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ++ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF ++ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ * ++ * You should have received a copy of the GNU General Public License along ++ * with this program; if not, write to the Free Software Foundation, Inc., ++ * 675 Mass Ave, Cambridge, MA 02139, USA. ++ */ + -+# -+# AMD Alchemy Db1000 eval board -+# -+libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/ -+cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00 -+load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000 ++#include /* for va_ bits */ ++#include ++#include ++#include + -+# -+# AMD Alchemy Db1100 eval board -+# -+libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/ -+cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00 -+load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000 ++extern char *avail_ram; ++extern char *end_avail; ++extern char _end[]; + -+# -+# AMD Alchemy Db1500 eval board -+# -+libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/ -+cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00 -+load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000 ++void puts(const char *); ++void putc(const char c); ++void puthex(unsigned long val); ++void _bcopy(char *src, char *dst, int len); ++void gunzip(void *, int, unsigned char *, int *); ++static int _cvt(unsigned long val, char *buf, long radix, char *digits); + -+# -+# AMD Alchemy Db1550 eval board -+# -+libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/ -+cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00 -+load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000 ++void _vprintk(void(*)(const char), const char *, va_list ap); + -+# -+# AMD Alchemy Db1200 eval board -+# -+libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/ -+cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00 -+load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000 ++struct NS16550 *com_port; + -+# -+# AMD Alchemy Bosporus eval board -+# -+libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/ -+cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00 -+load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000 ++int serial_tstc(volatile struct NS16550 *); ++unsigned char serial_getc(volatile struct NS16550 *); ++void serial_putc(volatile struct NS16550 *, unsigned char); + -+# -+# AMD Alchemy Mirage eval board -+# -+libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/ -+cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00 -+load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000 ++void pause(void) ++{ ++ puts("pause\n"); ++} + -+# -+# 4G-Systems eval board -+# -+libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/ -+load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000 ++void exit(void) ++{ ++ puts("exit\n"); ++ while(1); ++} + -+# -+# MyCable eval board -+# -+libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/ -+load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000 ++int tstc(void) ++{ ++ return (serial_tstc(com_port)); ++} + -+# -+# Cobalt Server -+# -+core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/ -+cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt -+load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000 ++int getc(void) ++{ ++ while (1) { ++ if (serial_tstc(com_port)) ++ return (serial_getc(com_port)); ++ } ++} + -+# -+# DECstation family -+# -+core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/ -+cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec -+libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/ -+load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000 -+CLEAN_FILES += drivers/tc/lk201-map.c ++void ++putc(const char c) ++{ ++ serial_putc(com_port, c); ++ if ( c == '\n' ) ++ serial_putc(com_port, '\r'); ++} + -+# -+# Galileo EV64120 Board -+# -+core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/ -+core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/ -+cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120 -+load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000 -+ -+# -+# Galileo EV96100 Board -+# -+core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/ -+cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100 -+load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000 -+ -+# -+# Globespan IVR eval board with QED 5231 CPU -+# -+core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/ -+core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/ -+load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000 -+ -+# -+# ITE 8172 eval board with QED 5231 CPU -+# -+core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/ -+load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000 -+ -+# -+# For all MIPS, Inc. eval boards -+# -+core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/ -+ -+# -+# MIPS Atlas board -+# -+core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/ -+cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas -+cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips -+load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000 -+ -+# -+# MIPS Malta board -+# -+core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/ -+cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips -+load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 -+ -+# -+# MIPS SEAD board -+# -+core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/ -+load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000 -+ -+# -+# MIPS SIM -+# -+core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/ -+cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim -+load-$(CONFIG_MIPS_SIM) += 0x80100000 ++void puts(const char *s) ++{ ++ char c; ++ while ( ( c = *s++ ) != '\0' ) { ++ serial_putc(com_port, c); ++ if ( c == '\n' ) serial_putc(com_port, '\r'); ++ } ++} + -+# -+# Momentum Ocelot board -+# -+# The Ocelot setup.o must be linked early - it does the ioremap() for the -+# mips_io_port_base. -+# -+core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \ -+ arch/mips/gt64120/momenco_ocelot/ -+cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot -+load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000 ++void error(char *x) ++{ ++ puts("\n\n"); ++ puts(x); ++ puts("\n\n -- System halted"); + -+# -+# Momentum Ocelot-G board -+# -+# The Ocelot-G setup.o must be linked early - it does the ioremap() for the -+# mips_io_port_base. -+# -+core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/ -+load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000 ++ while(1); /* Halt */ ++} + -+# -+# Momentum Ocelot-C and -CS boards -+# -+# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the -+# mips_io_port_base. -+core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/ -+load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000 ++static void *zalloc(unsigned size) ++{ ++ void *p = avail_ram; + -+# -+# PMC-Sierra Yosemite -+# -+core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/ -+cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite -+load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 ++ size = (size + 7) & -8; ++ avail_ram += size; ++ if (avail_ram > end_avail) { ++ puts("oops... out of memory\n"); ++ pause(); ++ } ++ return p; ++} + -+# Qemu simulating MIPS32 4Kc -+# -+core-$(CONFIG_QEMU) += arch/mips/qemu/ -+cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu -+load-$(CONFIG_QEMU) += 0xffffffff80010000 + -+# -+# Momentum Ocelot-3 -+# -+core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/ -+cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3 -+load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000 ++#define HEAD_CRC 2 ++#define EXTRA_FIELD 4 ++#define ORIG_NAME 8 ++#define COMMENT 0x10 ++#define RESERVED 0xe0 + -+# -+# Momentum Jaguar ATX -+# -+core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/ -+cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja -+#ifdef CONFIG_JAGUAR_DMALOW -+#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000 -+#else -+load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000 -+#endif ++#define DEFLATED 8 + -+# -+# NEC DDB -+# -+core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/ ++void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp) ++{ ++ z_stream s; ++ int r, i, flags; + -+# -+# NEC DDB Vrc-5074 -+# -+core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/ -+load-$(CONFIG_DDB5074) += 0xffffffff80080000 ++ /* skip header */ ++ i = 10; ++ flags = src[3]; ++ if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) { ++ puts("bad gzipped data\n"); ++ exit(); ++ } ++ if ((flags & EXTRA_FIELD) != 0) ++ i = 12 + src[10] + (src[11] << 8); ++ if ((flags & ORIG_NAME) != 0) ++ while (src[i++] != 0) ++ ; ++ if ((flags & COMMENT) != 0) ++ while (src[i++] != 0) ++ ; ++ if ((flags & HEAD_CRC) != 0) ++ i += 2; ++ if (i >= *lenp) { ++ puts("gunzip: ran out of data in header\n"); ++ exit(); ++ } + -+# -+# NEC DDB Vrc-5476 -+# -+core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/ -+load-$(CONFIG_DDB5476) += 0xffffffff80080000 ++ /* Initialize ourself. */ ++ s.workspace = zalloc(zlib_inflate_workspacesize()); ++ r = zlib_inflateInit2(&s, -MAX_WBITS); ++ if (r != Z_OK) { ++ puts("zlib_inflateInit2 returned "); puthex(r); puts("\n"); ++ exit(); ++ } ++ s.next_in = src + i; ++ s.avail_in = *lenp - i; ++ s.next_out = dst; ++ s.avail_out = dstlen; ++ r = zlib_inflate(&s, Z_FINISH); ++ if (r != Z_OK && r != Z_STREAM_END) { ++ puts("inflate returned "); puthex(r); puts("\n"); ++ exit(); ++ } ++ *lenp = s.next_out - (unsigned char *) dst; ++ zlib_inflateEnd(&s); ++} + -+# -+# NEC DDB Vrc-5477 -+# -+core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/ -+load-$(CONFIG_DDB5477) += 0xffffffff80100000 ++void ++puthex(unsigned long val) ++{ + -+core-$(CONFIG_LASAT) += arch/mips/lasat/ -+cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat -+load-$(CONFIG_LASAT) += 0xffffffff80000000 ++ unsigned char buf[10]; ++ int i; ++ for (i = 7; i >= 0; i--) ++ { ++ buf[i] = "0123456789ABCDEF"[val & 0x0F]; ++ val >>= 4; ++ } ++ buf[8] = '\0'; ++ puts(buf); ++} + -+# -+# Common VR41xx -+# -+core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/ -+cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx ++#define FALSE 0 ++#define TRUE 1 + -+# -+# NEC VR4133 -+# -+core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/ -+load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000 ++void ++_printk(char const *fmt, ...) ++{ ++ va_list ap; + -+# -+# ZAO Networks Capcella (VR4131) -+# -+load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000 ++ va_start(ap, fmt); ++ _vprintk(putc, fmt, ap); ++ va_end(ap); ++ return; ++} + -+# -+# Victor MP-C303/304 (VR4122) -+# -+load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000 ++#define is_digit(c) ((c >= '0') && (c <= '9')) + -+# -+# IBM WorkPad z50 (VR4121) -+# -+core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/ -+load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000 ++void ++_vprintk(void(*putc)(const char), const char *fmt0, va_list ap) ++{ ++ char c, sign, *cp = 0; ++ int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right; ++ char buf[32]; ++ long val; ++ while ((c = *fmt0++)) ++ { ++ if (c == '%') ++ { ++ c = *fmt0++; ++ left_prec = right_prec = pad_on_right = 0; ++ if (c == '-') ++ { ++ c = *fmt0++; ++ pad_on_right++; ++ } ++ if (c == '0') ++ { ++ zero_fill = TRUE; ++ c = *fmt0++; ++ } else ++ { ++ zero_fill = FALSE; ++ } ++ while (is_digit(c)) ++ { ++ left_prec = (left_prec * 10) + (c - '0'); ++ c = *fmt0++; ++ } ++ if (c == '.') ++ { ++ c = *fmt0++; ++ zero_fill++; ++ while (is_digit(c)) ++ { ++ right_prec = (right_prec * 10) + (c - '0'); ++ c = *fmt0++; ++ } ++ } else ++ { ++ right_prec = left_prec; ++ } ++ sign = '\0'; ++ switch (c) ++ { ++ case 'd': ++ case 'x': ++ case 'X': ++ val = va_arg(ap, long); ++ switch (c) ++ { ++ case 'd': ++ if (val < 0) ++ { ++ sign = '-'; ++ val = -val; ++ } ++ length = _cvt(val, buf, 10, "0123456789"); ++ break; ++ case 'x': ++ length = _cvt(val, buf, 16, "0123456789abcdef"); ++ break; ++ case 'X': ++ length = _cvt(val, buf, 16, "0123456789ABCDEF"); ++ break; ++ } ++ cp = buf; ++ break; ++ case 's': ++ cp = va_arg(ap, char *); ++ length = strlen(cp); ++ break; ++ case 'c': ++ c = va_arg(ap, long /*char*/); ++ (*putc)(c); ++ continue; ++ default: ++ (*putc)('?'); ++ } ++ pad = left_prec - length; ++ if (sign != '\0') ++ { ++ pad--; ++ } ++ if (zero_fill) ++ { ++ c = '0'; ++ if (sign != '\0') ++ { ++ (*putc)(sign); ++ sign = '\0'; ++ } ++ } else ++ { ++ c = ' '; ++ } ++ if (!pad_on_right) ++ { ++ while (pad-- > 0) ++ { ++ (*putc)(c); ++ } ++ } ++ if (sign != '\0') ++ { ++ (*putc)(sign); ++ } ++ while (length-- > 0) ++ { ++ (*putc)(c = *cp++); ++ if (c == '\n') ++ { ++ (*putc)('\r'); ++ } ++ } ++ if (pad_on_right) ++ { ++ while (pad-- > 0) ++ { ++ (*putc)(c); ++ } ++ } ++ } else ++ { ++ (*putc)(c); ++ if (c == '\n') ++ { ++ (*putc)('\r'); ++ } ++ } ++ } ++} + -+# -+# CASIO CASSIPEIA E-55/65 (VR4111) -+# -+core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/ -+load-$(CONFIG_CASIO_E55) += 0xffffffff80004000 ++int ++_cvt(unsigned long val, char *buf, long radix, char *digits) ++{ ++ char temp[80]; ++ char *cp = temp; ++ int length = 0; ++ if (val == 0) ++ { /* Special case */ ++ *cp++ = '0'; ++ } else ++ while (val) ++ { ++ *cp++ = digits[val % radix]; ++ val /= radix; ++ } ++ while (cp != temp) ++ { ++ *buf++ = *--cp; ++ length++; ++ } ++ *buf = '\0'; ++ return (length); ++} + -+# -+# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131) -+# -+load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000 ++void ++_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base) ++{ ++ int i, c; ++ if ((unsigned int)s > (unsigned int)p) ++ { ++ s = (unsigned int)s - (unsigned int)p; ++ } ++ while (s > 0) ++ { ++ if (base) ++ { ++ _printk("%06X: ", (int)p - (int)base); ++ } else ++ { ++ _printk("%06X: ", p); ++ } ++ for (i = 0; i < 16; i++) ++ { ++ if (i < s) ++ { ++ _printk("%02X", p[i] & 0xFF); ++ } else ++ { ++ _printk(" "); ++ } ++ if ((i % 2) == 1) _printk(" "); ++ if ((i % 8) == 7) _printk(" "); ++ } ++ _printk(" |"); ++ for (i = 0; i < 16; i++) ++ { ++ if (i < s) ++ { ++ c = p[i] & 0xFF; ++ if ((c < 0x20) || (c >= 0x7F)) c = '.'; ++ } else ++ { ++ c = ' '; ++ } ++ _printk("%c", c); ++ } ++ _printk("|\n"); ++ s -= 16; ++ p += 16; ++ } ++} + -+# -+# Common Philips PNX8550 -+# -+core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/ -+cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550 ++void ++_dump_buf(unsigned char *p, int s) ++{ ++ _printk("\n"); ++ _dump_buf_with_offset(p, s, 0); ++} + -+# -+# Philips PNX8550 JBS board -+# -+libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/ -+#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550 -+load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000 ++/* ++ * Local variables: ++ * c-indent-level: 8 ++ * c-basic-offset: 8 ++ * tab-width: 8 ++ * End: ++ */ +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/misc-simple.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-simple.c +--- linux-2.6.16.7/arch/mips/boot/compressed/common/misc-simple.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-simple.c 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,122 @@ ++/* ++ * arch/mips/zboot/common/misc-simple.c ++ * ++ * Misc. bootloader code for many machines. This assumes you have are using ++ * a 6xx/7xx/74xx CPU in your machine. This assumes the chunk of memory ++ * below 8MB is free. Finally, it assumes you have a NS16550-style uart for ++ * your serial console. If a machine meets these requirements, it can quite ++ * likely use this code during boot. ++ * ++ * Author: Matt Porter ++ * Derived from arch/ppc/boot/prep/misc.c ++ * ++ * Copyright 2001 MontaVista Software Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ + -+# -+# SGI IP22 (Indy/Indigo2) -+# -+# Set the load address to >= 0xffffffff88069000 if you want to leave space for -+# symmon, 0xffffffff80002000 for production kernels. Note that the value must -+# be aligned to a multiple of the kernel stack size or the handling of the -+# current variable will break so for 64-bit kernels we have to raise the start -+# address by 8kb. -+# -+core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/ -+cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22 -+ifdef CONFIG_32BIT -+load-$(CONFIG_SGI_IP22) += 0xffffffff88002000 -+endif -+ifdef CONFIG_64BIT -+load-$(CONFIG_SGI_IP22) += 0xffffffff88004000 -+endif ++#include ++#include ++#include + -+# -+# SGI-IP27 (Origin200/2000) -+# -+# Set the load address to >= 0xc000000000300000 if you want to leave space for -+# symmon, 0xc00000000001c000 for production kernels. Note that the value must -+# be 16kb aligned or the handling of the current variable will break. -+# -+ifdef CONFIG_SGI_IP27 -+core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/ -+cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27 -+ifdef CONFIG_BUILD_ELF64 -+ifdef CONFIG_MAPPED_KERNEL -+load-$(CONFIG_SGI_IP27) += 0xc00000004001c000 -+OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000 -+dataoffset-$(CONFIG_SGI_IP27) += 0x01000000 -+else -+load-$(CONFIG_SGI_IP27) += 0xa80000000001c000 -+OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000 -+endif -+else -+ifdef CONFIG_MAPPED_KERNEL -+load-$(CONFIG_SGI_IP27) += 0xffffffffc001c000 -+OBJCOPYFLAGS := --change-addresses=0xc000000080000000 -+dataoffset-$(CONFIG_SGI_IP27) += 0x01000000 -+else -+load-$(CONFIG_SGI_IP27) += 0xffffffff8001c000 -+OBJCOPYFLAGS := --change-addresses=0xa800000080000000 -+endif -+endif -+endif ++#include + -+# -+# SGI-IP32 (O2) -+# -+# Set the load address to >= 80069000 if you want to leave space for symmon, -+# 0xffffffff80004000 for production kernels. Note that the value must be aligned to -+# a multiple of the kernel stack size or the handling of the current variable -+# will break. -+# -+core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/ -+cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32 -+load-$(CONFIG_SGI_IP32) += 0xffffffff80004000 ++#include "linux/zlib.h" ++ ++extern struct NS16550 *com_port; ++ ++char *avail_ram; ++char *end_avail; ++extern char _end[]; ++char *zimage_start; ++ ++#ifdef CONFIG_CMDLINE ++#define CMDLINE CONFIG_CMDLINE ++#else ++#define CMDLINE "" ++#endif ++char cmd_preset[] = CMDLINE; ++char cmd_buf[256]; ++char *cmd_line = cmd_buf; ++ ++/* The linker tells us where the image is. ++*/ ++extern unsigned char __image_begin, __image_end; ++extern unsigned char __ramdisk_begin, __ramdisk_end; ++unsigned long initrd_size; ++ ++extern void puts(const char *); ++extern void putc(const char c); ++extern void puthex(unsigned long val); ++extern void *memcpy(void * __dest, __const void * __src, ++ __kernel_size_t __n); ++extern void gunzip(void *, int, unsigned char *, int *); ++extern void udelay(long delay); ++extern int tstc(void); ++extern int getc(void); ++extern volatile struct NS16550 *serial_init(int chan); ++ ++void ++decompress_kernel(unsigned long load_addr, int num_words, ++ unsigned long cksum, unsigned long *sp) ++{ ++ extern unsigned long start; ++ int zimage_size; ++ ++ com_port = (struct NS16550 *)serial_init(0); ++ ++ initrd_size = (unsigned long)(&__ramdisk_end) - ++ (unsigned long)(&__ramdisk_begin); ++ ++ /* ++ * Reveal where we were loaded at and where we ++ * were relocated to. ++ */ ++ puts("loaded at: "); puthex(load_addr); ++ puts(" "); puthex((unsigned long)(load_addr + (4*num_words))); puts("\n"); ++ if ( (unsigned long)load_addr != (unsigned long)&start ) ++ { ++ puts("relocated to: "); puthex((unsigned long)&start); ++ puts(" "); ++ puthex((unsigned long)((unsigned long)&start + (4*num_words))); ++ puts("\n"); ++ } ++ ++ /* ++ * We link ourself to an arbitrary low address. When we run, we ++ * relocate outself to that address. __image_being points to ++ * the part of the image where the zImage is. -- Tom ++ */ ++ zimage_start = (char *)(unsigned long)(&__image_begin); ++ zimage_size = (unsigned long)(&__image_end) - ++ (unsigned long)(&__image_begin); ++ ++ /* ++ * The zImage and initrd will be between start and _end, so they've ++ * already been moved once. We're good to go now. -- Tom ++ */ ++ puts("zimage at: "); puthex((unsigned long)zimage_start); ++ puts(" "); puthex((unsigned long)(zimage_size+zimage_start)); ++ puts("\n"); ++ ++ if ( initrd_size ) { ++ puts("initrd at: "); ++ puthex((unsigned long)(&__ramdisk_begin)); ++ puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n"); ++ } ++ ++ /* assume the chunk below 8M is free */ ++ avail_ram = (char *)AVAIL_RAM_START; ++ end_avail = (char *)AVAIL_RAM_END; ++ ++ /* Display standard Linux/MIPS boot prompt for kernel args */ ++ puts("Uncompressing Linux at load address "); ++ puthex(LOADADDR); ++ puts("\n"); ++ /* I don't like this hard coded gunzip size (fixme) */ ++ gunzip((void *)LOADADDR, 0x400000, zimage_start, &zimage_size); ++ puts("Now booting the kernel\n"); ++} +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/no_initrd.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/no_initrd.c +--- linux-2.6.16.7/arch/mips/boot/compressed/common/no_initrd.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/no_initrd.c 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,2 @@ ++char initrd_data[1]; ++int initrd_len = 0; +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/images/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/images/Makefile +--- linux-2.6.16.7/arch/mips/boot/compressed/images/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/images/Makefile 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,17 @@ + +# -+# Sibyte SB1250 SOC -+# -+# This is a LIB so that it links at the end, and initcalls are later -+# the sequence; but it is built as an object so that modules don't get -+# removed (as happens, even if they have __initcall/module_init) -+# -+core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/ -+cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \ -+ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL ++# This dir holds all of the images for MIPS machines. ++# Tom Rini January 2001 ++# Pete Popov 2004 ++ ++extra-y := vmlinux.bin vmlinux.gz ++ ++OBJCOPYFLAGS_vmlinux.bin := -O binary ++$(obj)/vmlinux.bin: vmlinux FORCE ++ $(call if_changed,objcopy) ++ ++$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE ++ $(call if_changed,gzip) ++ ++# Files generated that shall be removed upon make clean ++clean-files := vmlinux* zImage* +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/nonstdio.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/nonstdio.h +--- linux-2.6.16.7/arch/mips/boot/compressed/include/nonstdio.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/nonstdio.h 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,18 @@ ++/* ++ * Copyright (C) Paul Mackerras 1997. ++ * ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License ++ * as published by the Free Software Foundation; either version ++ * 2 of the License, or (at your option) any later version. ++ */ ++typedef int FILE; ++extern FILE *stdin, *stdout; ++#define NULL ((void *)0) ++#define EOF (-1) ++#define fopen(n, m) NULL ++#define fflush(f) 0 ++#define fclose(f) 0 ++extern char *fgets(); ++ ++#define perror(s) printf("%s: no files!\n", (s)) +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/ns16550.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/ns16550.h +--- linux-2.6.16.7/arch/mips/boot/compressed/include/ns16550.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/ns16550.h 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,46 @@ ++/* ++ * NS16550 Serial Port ++ */ ++ ++/* ++ * Figure out which file will have the definitons of COMx ++ */ ++ ++/* Some machines have their uart registers 16 bytes apart. Most don't. ++ * TODO: Make this work like drivers/char/serial does - Tom */ ++#if !defined(UART_REG_PAD) ++#define UART_REG_PAD(x) ++#endif ++ ++struct NS16550 ++ { ++ unsigned char rbr; /* 0 */ ++ UART_REG_PAD(rbr) ++ unsigned char ier; /* 1 */ ++ UART_REG_PAD(ier) ++ unsigned char fcr; /* 2 */ ++ UART_REG_PAD(fcr) ++ unsigned char lcr; /* 3 */ ++ UART_REG_PAD(lcr) ++ unsigned char mcr; /* 4 */ ++ UART_REG_PAD(mcr) ++ unsigned char lsr; /* 5 */ ++ UART_REG_PAD(lsr) ++ unsigned char msr; /* 6 */ ++ UART_REG_PAD(msr) ++ unsigned char scr; /* 7 */ ++ }; + -+core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/ -+cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \ -+ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL ++#define thr rbr ++#define iir fcr ++#define dll rbr ++#define dlm ier + -+core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/ -+cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \ -+ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL ++#define LSR_DR 0x01 /* Data ready */ ++#define LSR_OE 0x02 /* Overrun */ ++#define LSR_PE 0x04 /* Parity error */ ++#define LSR_FE 0x08 /* Framing error */ ++#define LSR_BI 0x10 /* Break */ ++#define LSR_THRE 0x20 /* Xmit holding register empty */ ++#define LSR_TEMT 0x40 /* Xmitter empty */ ++#define LSR_ERR 0x80 /* Error */ +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/pb1000_serial.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/pb1000_serial.h +--- linux-2.6.16.7/arch/mips/boot/compressed/include/pb1000_serial.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/pb1000_serial.h 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,20 @@ ++/* ++ * arch/ppc/boot/include/sandpoint_serial.h ++ * ++ * Location of the COM ports on Motorola SPS Sandpoint machines ++ * ++ * Author: Mark A. Greer ++ * mgreer@mvista.com ++ * ++ * Copyright 2001 MontaVista Software Inc. ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License as published by the ++ * Free Software Foundation; either version 2 of the License, or (at your ++ * option) any later version. ++ */ + -+core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/ -+cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \ -+ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL ++#define COM1 0xfe0003f8 ++#define COM2 0xfe0002f8 ++#define COM3 0x00000000 /* No COM3 */ ++#define COM4 0x00000000 /* No COM4 */ +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/ld.script linux-2.6.16.7.new/arch/mips/boot/compressed/ld.script +--- linux-2.6.16.7/arch/mips/boot/compressed/ld.script 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/ld.script 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,151 @@ ++OUTPUT_ARCH(mips) ++ENTRY(start) ++SECTIONS ++{ ++ /* Read-only sections, merged into text segment: */ ++ /* . = 0x81000000; */ ++ .init : { *(.init) } =0 ++ .text : ++ { ++ _ftext = . ; ++ *(.text) ++ *(.rodata) *(.rodata.*) ++ *(.rodata1) ++ /* .gnu.warning sections are handled specially by elf32.em. */ ++ *(.gnu.warning) ++ } =0 ++ .kstrtab : { *(.kstrtab) } + -+# -+# Sibyte BCM91120x (Carmel) board -+# Sibyte BCM91120C (CRhine) board -+# Sibyte BCM91125C (CRhone) board -+# Sibyte BCM91125E (Rhone) board -+# Sibyte SWARM board -+# Sibyte BCM91x80 (BigSur) board -+# -+libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/ -+load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000 -+libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/ -+load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000 -+libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/ -+load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000 -+libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/ -+load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000 -+libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/ -+load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000 -+libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/ -+load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000 -+libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/ -+load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 ++ . = ALIGN(16); /* Exception table */ ++ __start___ex_table = .; ++ __ex_table : { *(__ex_table) } ++ __stop___ex_table = .; + -+# -+# SNI RM200 PCI -+# -+core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/ -+cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200 -+load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000 ++ __start___dbe_table = .; /* Exception table for data bus errors */ ++ __dbe_table : { *(__dbe_table) } ++ __stop___dbe_table = .; + -+# -+# Toshiba JMR-TX3927 board -+# -+core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \ -+ arch/mips/jmr3927/common/ -+cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927 -+load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000 ++ __start___ksymtab = .; /* Kernel symbol table */ ++ __ksymtab : { *(__ksymtab) } ++ __stop___ksymtab = .; + -+# -+# Toshiba RBTX4927 board or -+# Toshiba RBTX4937 board -+# -+core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/ -+core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/ -+load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000 ++ _etext = .; + -+# -+# Toshiba RBTX4938 board -+# -+core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/ -+core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/ -+load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000 ++ . = ALIGN(8192); ++ .data.init_task : { *(.data.init_task) } + -+cflags-y += -Iinclude/asm-mips/mach-generic -+drivers-$(CONFIG_PCI) += arch/mips/pci/ ++ /* Startup code */ ++ . = ALIGN(4096); ++ __init_begin = .; ++ .text.init : { *(.text.init) } ++ .data.init : { *(.data.init) } ++ . = ALIGN(16); ++ __setup_start = .; ++ .setup.init : { *(.setup.init) } ++ __setup_end = .; ++ __initcall_start = .; ++ .initcall.init : { *(.initcall.init) } ++ __initcall_end = .; ++ . = ALIGN(4096); /* Align double page for init_task_union */ ++ __init_end = .; + -+ifdef CONFIG_32BIT -+ifdef CONFIG_CPU_LITTLE_ENDIAN -+JIFFIES = jiffies_64 -+else -+JIFFIES = jiffies_64 + 4 -+endif -+else -+JIFFIES = jiffies_64 -+endif ++ . = ALIGN(4096); ++ .data.page_aligned : { *(.data.idt) } + -+AFLAGS += $(cflags-y) -+CFLAGS += $(cflags-y) ++ . = ALIGN(32); ++ .data.cacheline_aligned : { *(.data.cacheline_aligned) } + -+LDFLAGS += -m $(ld-emul) ++ .fini : { *(.fini) } =0 ++ .reginfo : { *(.reginfo) } ++ /* Adjust the address for the data segment. We want to adjust up to ++ the same address within the page on the next page up. It would ++ be more correct to do this: ++ . = .; ++ The current expression does not correctly handle the case of a ++ text segment ending precisely at the end of a page; it causes the ++ data segment to skip a page. The above expression does not have ++ this problem, but it will currently (2/95) cause BFD to allocate ++ a single segment, combining both text and data, for this case. ++ This will prevent the text segment from being shared among ++ multiple executions of the program; I think that is more ++ important than losing a page of the virtual address space (note ++ that no actual memory is lost; the page which is skipped can not ++ be referenced). */ ++ . = .; ++ .data : ++ { ++ _fdata = . ; ++ *(.data) + -+OBJCOPYFLAGS += --remove-section=.reginfo ++ /* Put the compressed image here, so bss is on the end. */ ++ __image_begin = .; ++ *(.image) ++ __image_end = .; ++ /* Align the initial ramdisk image (INITRD) on page boundaries. */ ++ . = ALIGN(4096); ++ __ramdisk_begin = .; ++ *(.initrd) ++ __ramdisk_end = .; ++ . = ALIGN(4096); + -+# -+# Choosing incompatible machines durings configuration will result in -+# error messages during linking. Select a default linkscript if -+# none has been choosen above. -+# ++ CONSTRUCTORS ++ } ++ .data1 : { *(.data1) } ++ _gp = . + 0x8000; ++ .lit8 : { *(.lit8) } ++ .lit4 : { *(.lit4) } ++ .ctors : { *(.ctors) } ++ .dtors : { *(.dtors) } ++ .got : { *(.got.plt) *(.got) } ++ .dynamic : { *(.dynamic) } ++ /* We want the small data sections together, so single-instruction offsets ++ can access them all, and initialized data all before uninitialized, so ++ we can shorten the on-disk segment size. */ ++ .sdata : { *(.sdata) } ++ . = ALIGN(4); ++ _edata = .; ++ PROVIDE (edata = .); + -+CPPFLAGS_vmlinux.lds := \ -+ $(CFLAGS) \ -+ -D"LOADADDR=$(load-y)" \ -+ -D"JIFFIES=$(JIFFIES)" \ -+ -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)" ++ __bss_start = .; ++ _fbss = .; ++ .sbss : { *(.sbss) *(.scommon) } ++ .bss : ++ { ++ *(.dynbss) ++ *(.bss) ++ *(COMMON) ++ . = ALIGN(4); ++ _end = . ; ++ PROVIDE (end = .); ++ } + -+head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o ++ /* Sections to be discarded */ ++ /DISCARD/ : ++ { ++ *(.text.exit) ++ *(.data.exit) ++ *(.exitcall.exit) ++ } ++ ++ /* This is the MIPS specific mdebug section. */ ++ .mdebug : { *(.mdebug) } ++ /* These are needed for ELF backends which have not yet been ++ converted to the new style linker. */ ++ .stab 0 : { *(.stab) } ++ .stabstr 0 : { *(.stabstr) } ++ /* DWARF debug sections. ++ Symbols in the .debug DWARF section are relative to the beginning of the ++ section so we begin .debug at 0. It's not clear yet what needs to happen ++ for the others. */ ++ .debug 0 : { *(.debug) } ++ .debug_srcinfo 0 : { *(.debug_srcinfo) } ++ .debug_aranges 0 : { *(.debug_aranges) } ++ .debug_pubnames 0 : { *(.debug_pubnames) } ++ .debug_sfnames 0 : { *(.debug_sfnames) } ++ .line 0 : { *(.line) } ++ /* These must appear regardless of . */ ++ .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } ++ .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } ++ .comment : { *(.comment) } ++ .note : { *(.note) } ++} +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/lib/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/lib/Makefile +--- linux-2.6.16.7/arch/mips/boot/compressed/lib/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/lib/Makefile 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,11 @@ + -+libs-y += arch/mips/lib/ -+libs-$(CONFIG_32BIT) += arch/mips/lib-32/ -+libs-$(CONFIG_64BIT) += arch/mips/lib-64/ ++# ++# Makefile for some libs needed by zImage. ++# + -+core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ ++lib-y := $(addprefix ../../../../../lib/zlib_inflate/, \ ++ infblock.o infcodes.o inffast.o inflate.o inftrees.o infutil.o) \ ++ $(addprefix ../../../../../lib/, ctype.o string.o) \ ++ $(addprefix ../../../../../arch/mips/lib/, memcpy.o) \ + -+drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/ + -+ifdef CONFIG_LASAT -+rom.bin rom.sw: vmlinux -+ $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@ -+endif +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/Makefile +--- linux-2.6.16.7/arch/mips/boot/compressed/Makefile 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/Makefile 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,32 @@ + +# -+# Some machines like the Indy need 32-bit ELF binaries for booting purposes. -+# Other need ECOFF, so we build a 32-bit ELF binary for them which we then -+# convert to ECOFF using elf2ecoff. ++# arch/mips/boot/compressed/Makefile +# -+vmlinux.32: vmlinux -+ $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@ -+ ++# This file is subject to the terms and conditions of the GNU General Public ++# License. See the file "COPYING" in the main directory of this archive ++# for more details. +# -+# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit -+# ELF files from 32-bit files by conversion. ++# Copyright (C) 1994 by Linus Torvalds ++# Adapted for PowerPC by Gary Thomas ++# modified by Cort (cort@cs.nmt.edu) ++# ++# Ported to MIPS by Pete Popov, ppopov@embeddedalley.com +# -+vmlinux.64: vmlinux -+ $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@ -+ -+makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1) -+ -+ifdef CONFIG_BOOT_ELF32 -+all: $(vmlinux-32) -+endif -+ -+ifdef CONFIG_BOOT_ELF64 -+all: $(vmlinux-64) -+endif + -+ifdef CONFIG_MIPS_ATLAS -+all: vmlinux.srec -+endif ++boot := arch/mips/boot ++compressed := arch/mips/boot/compressed + -+ifdef CONFIG_MIPS_MALTA -+all: vmlinux.srec -+endif ++CFLAGS += -fno-builtin -D__BOOTER__ -I$(compressed)/include + -+ifdef CONFIG_MIPS_SEAD -+all: vmlinux.srec -+endif ++BOOT_TARGETS = zImage zImage.flash + -+ifdef CONFIG_QEMU -+all: vmlinux.bin -+endif ++bootdir-$(CONFIG_SOC_AU1X00) := au1xxx ++subdir-y := common lib images + -+ifdef CONFIG_SNI_RM200_PCI -+all: vmlinux.ecoff -+endif ++.PHONY: $(BOOT_TARGETS) $(bootdir-y) + -+vmlinux.bin: $(vmlinux-32) -+ +@$(call makeboot,$@) ++$(BOOT_TARGETS): $(bootdir-y) + -+vmlinux.ecoff vmlinux.rm200: $(vmlinux-32) -+ +@$(call makeboot,$@) ++$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \ ++ $(addprefix $(obj)/,$(hostprogs-y)) ++ $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS) +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/entry linux-2.6.16.7.new/arch/mips/boot/compressed/utils/entry +--- linux-2.6.16.7/arch/mips/boot/compressed/utils/entry 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/entry 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,12 @@ ++#!/bin/sh + -+vmlinux.srec: $(vmlinux-32) -+ +@$(call makeboot,$@) ++# grab the kernel_entry address from the vmlinux elf image ++entry=`$1 $2 | grep kernel_entry` + -+zImage: vmlinux -+ +@$(call makeboot,$@) ++fs=`echo $entry | grep ffffffff` # check toolchain output + -+CLEAN_FILES += vmlinux.ecoff \ -+ vmlinux.srec \ -+ vmlinux.rm200.tmp \ -+ vmlinux.rm200 ++if [ -n "$fs" ]; then ++ echo "0x"`$1 $2 | grep kernel_entry | cut -c9- | awk '{print $1}'` ++else ++ echo "0x"`$1 $2 | grep kernel_entry | cut -c1- | awk '{print $1}'` ++fi +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/offset linux-2.6.16.7.new/arch/mips/boot/compressed/utils/offset +--- linux-2.6.16.7/arch/mips/boot/compressed/utils/offset 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/offset 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,3 @@ ++#!/bin/sh + -+archclean: -+ @$(MAKE) $(clean)=arch/mips/boot -+ @$(MAKE) $(clean)=arch/mips/lasat -+ @$(MAKE) $(clean)=arch/mips/boot/compressed ++echo "0x"`$1 -h $2 | grep $3 | grep -v zvmlinux| awk '{print $6}'` +diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/size linux-2.6.16.7.new/arch/mips/boot/compressed/utils/size +--- linux-2.6.16.7/arch/mips/boot/compressed/utils/size 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/size 2006-05-04 23:08:18.000000000 +0200 +@@ -0,0 +1,4 @@ ++#!/bin/sh + -+CLEAN_FILES += vmlinux.32 \ -+ vmlinux.64 \ -+ vmlinux.ecoff ++OFFSET=`$1 -h $2 | grep $3 | grep -v zvmlinux | awk '{print $3}'` ++echo "0x"$OFFSET diff -urN linux-2.6.16.7/arch/mips/boot/Makefile linux-2.6.16.7.new/arch/mips/boot/Makefile --- linux-2.6.16.7/arch/mips/boot/Makefile 2006-04-17 23:53:25.000000000 +0200 -+++ linux-2.6.16.7.new/arch/mips/boot/Makefile 2006-04-20 19:27:22.000000000 +0200 ++++ linux-2.6.16.7.new/arch/mips/boot/Makefile 2006-05-04 23:08:18.000000000 +0200 @@ -16,6 +16,7 @@ E2EFLAGS = endif @@ -921,7 +1329,7 @@ diff -urN linux-2.6.16.7/arch/mips/boot/Makefile linux-2.6.16.7.new/arch/mips/bo + $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS) diff -urN linux-2.6.16.7/arch/mips/boot/Makefile.orig linux-2.6.16.7.new/arch/mips/boot/Makefile.orig --- linux-2.6.16.7/arch/mips/boot/Makefile.orig 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/Makefile.orig 2006-04-17 23:53:25.000000000 +0200 ++++ linux-2.6.16.7.new/arch/mips/boot/Makefile.orig 2006-05-04 23:08:18.000000000 +0200 @@ -0,0 +1,53 @@ +# +# This file is subject to the terms and conditions of the GNU General Public @@ -973,1300 +1381,907 @@ diff -urN linux-2.6.16.7/arch/mips/boot/Makefile.orig linux-2.6.16.7.new/arch/mi + +clean-files += addinitrd \ + elf2ecoff \ -+ vmlinux.bin \ -+ vmlinux.ecoff \ -+ vmlinux.srec -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/Makefile ---- linux-2.6.16.7/arch/mips/boot/compressed/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/Makefile 2006-04-20 19:27:22.000000000 +0200 -@@ -0,0 +1,32 @@ -+ -+# -+# arch/mips/boot/compressed/Makefile -+# -+# This file is subject to the terms and conditions of the GNU General Public -+# License. See the file "COPYING" in the main directory of this archive -+# for more details. -+# -+# Copyright (C) 1994 by Linus Torvalds -+# Adapted for PowerPC by Gary Thomas -+# modified by Cort (cort@cs.nmt.edu) -+# -+# Ported to MIPS by Pete Popov, ppopov@embeddedalley.com -+# -+ -+boot := arch/mips/boot -+compressed := arch/mips/boot/compressed -+ -+CFLAGS += -fno-builtin -D__BOOTER__ -I$(compressed)/include -+ -+BOOT_TARGETS = zImage zImage.flash -+ -+bootdir-$(CONFIG_SOC_AU1X00) := au1xxx -+subdir-y := common lib images -+ -+.PHONY: $(BOOT_TARGETS) $(bootdir-y) -+ -+$(BOOT_TARGETS): $(bootdir-y) -+ -+$(bootdir-y): $(addprefix $(obj)/,$(subdir-y)) \ -+ $(addprefix $(obj)/,$(hostprogs-y)) -+ $(Q)$(MAKE) $(build)=$(obj)/$@ $(MAKECMDGOALS) -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/Makefile ---- linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/Makefile 2006-04-20 19:27:22.000000000 +0200 -@@ -0,0 +1,110 @@ -+# arch/mips/boot/compressed/au1xxx/Makefile -+# -+# Makefile for AMD Alchemy Semiconductor Au1x based boards. -+# All of the boot loader code was derived from the ppc -+# boot code. -+# -+# Copyright 2001,2002 MontaVista Software Inc. -+# -+# Author: Mark A. Greer -+# mgreer@mvista.com -+# -+# Copyright 2004 Embedded Alley Solutions, Inc -+# Ported and modified for mips 2.6 support by -+# Pete Popov -+# -+# This program is free software; you can redistribute it and/or modify it -+# under the terms of the GNU General Public License as published by the -+# Free Software Foundation; either version 2 of the License, or (at your -+# option) any later version. -+ -+boot := arch/mips/boot -+compressed := $(boot)/compressed -+utils := $(compressed)/utils -+lib := $(compressed)/lib -+images := $(compressed)/images -+common := $(compressed)/common -+ -+######################################################################### -+# START BOARD SPECIFIC VARIABLES -+ -+# These two variables control where the zImage is stored -+# in flash and loaded in memory. It only controls how the srec -+# file is generated, the code is the same. -+RAM_RUN_ADDR = 0x81000000 -+ -+ifdef CONFIG_MIPS_XXS1500 -+FLASH_LOAD_ADDR = 0xBF000000 -+else -+FLASH_LOAD_ADDR = 0xBFD00000 -+endif -+ -+# These two variables specify the free ram region -+# that can be used for temporary malloc area -+AVAIL_RAM_START=0x80500000 -+AVAIL_RAM_END=0x80900000 -+ -+# This one must match the LOADADDR in arch/mips/Makefile! -+LOADADDR=0x80100000 -+ -+# WARNING WARNING WARNING -+# Note that with a LOADADDR of 0x80100000 and AVAIL_RAM_START of -+# 0x80500000, the max decompressed kernel size can be 4MB. Else we -+# start overwriting ourselve. You can change these vars as needed; -+# it would be much better if we just figured everything out on the fly. -+ -+# END BOARD SPECIFIC VARIABLES -+######################################################################### -+ -+OBJECTS := $(obj)/head.o $(common)/misc-common.o $(common)/misc-simple.o \ -+ $(common)/au1k_uart.o -+LIBS := $(lib)/lib.a -+ -+ENTRY := $(utils)/entry -+OFFSET := $(utils)/offset -+SIZE := $(utils)/size -+ -+LD_ARGS := -T $(compressed)/ld.script -Ttext $(RAM_RUN_ADDR) -Bstatic -+ -+ifdef CONFIG_CPU_LITTLE_ENDIAN -+OBJCOPY_ARGS = -O elf32-tradlittlemips -+else -+OBJCOPY_ARGS = -O elf32-tradbigmips -+endif -+ -+$(obj)/head.o: $(obj)/head.S $(TOPDIR)/vmlinux -+ $(CC) -I $(TOPDIR)/include $(AFLAGS) \ -+ -DKERNEL_ENTRY=$(shell sh $(ENTRY) $(NM) $(TOPDIR)/vmlinux ) \ -+ -c -o $*.o $< -+ -+$(common)/misc-simple.o: -+ $(CC) -I $(TOPDIR)/include $(CFLAGS) -DINITRD_OFFSET=0 -DINITRD_SIZE=0 -DZIMAGE_OFFSET=0 \ -+ -DAVAIL_RAM_START=$(AVAIL_RAM_START) \ -+ -DAVAIL_RAM_END=$(AVAIL_RAM_END) \ -+ -DLOADADDR=$(LOADADDR) \ -+ -DZIMAGE_SIZE=0 -c -o $@ $*.c -+ -+$(obj)/zvmlinux: $(OBJECTS) $(LIBS) $(srctree)/$(compressed)/ld.script $(images)/vmlinux.gz $(common)/dummy.o -+ $(OBJCOPY) \ -+ --add-section=.image=$(images)/vmlinux.gz \ -+ --set-section-flags=.image=contents,alloc,load,readonly,data \ -+ $(common)/dummy.o $(common)/image.o -+ $(LD) $(LD_ARGS) -o $@ $(OBJECTS) $(common)/image.o $(LIBS) -+ $(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R __kcrctab -R __ksymtab_strings \ -+ -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap ++ vmlinux.bin \ ++ vmlinux.ecoff \ ++ vmlinux.srec +diff -urN linux-2.6.16.7/arch/mips/Makefile linux-2.6.16.7.new/arch/mips/Makefile +--- linux-2.6.16.7/arch/mips/Makefile 2006-04-17 23:53:25.000000000 +0200 ++++ linux-2.6.16.7.new/arch/mips/Makefile 2006-05-04 23:09:44.000000000 +0200 +@@ -831,6 +831,10 @@ + all: vmlinux.ecoff + endif + ++ifdef CONFIG_MIPS_MTX1 ++all: vmlinux.srec zImage zImage.flash ++endif + -+# Here we manipulate the image in order to get it the necessary -+# srecord file we need. -+zImage: $(obj)/zvmlinux -+ mv $(obj)/zvmlinux $(images)/zImage -+ $(OBJCOPY) -O srec $(images)/zImage $(images)/zImage.srec -+ $(OBJCOPY) -O binary $(images)/zImage $(images)/zImage.bin + vmlinux.bin: $(vmlinux-32) + +@$(call makeboot,$@) + +@@ -840,6 +844,12 @@ + vmlinux.srec: $(vmlinux-32) + +@$(call makeboot,$@) + ++zImage: vmlinux ++ +@$(call makeboot,$@) + -+zImage.flash: zImage -+ ( \ -+ flash=${FLASH_LOAD_ADDR} ; \ -+ ram=${RAM_RUN_ADDR} ; \ -+ adjust=$$[ $$flash - $$ram ] ; \ -+ $(OBJCOPY) -O srec --adjust-vma `printf '0x%08x' $$adjust` \ -+ $(images)/zImage $(images)/zImage.flash.srec ; \ -+ ) -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/head.S linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/head.S ---- linux-2.6.16.7/arch/mips/boot/compressed/au1xxx/head.S 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/au1xxx/head.S 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,119 @@ -+/* -+ * arch/mips/kernel/head.S -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 1994, 1995 Waldorf Electronics -+ * Written by Ralf Baechle and Andreas Busse -+ * Copyright (C) 1995 - 1999 Ralf Baechle -+ * Copyright (C) 1996 Paul M. Antoine -+ * Modified for DECStation and hence R3000 support by Paul M. Antoine -+ * Further modifications by David S. Miller and Harald Koerfgen -+ * Copyright (C) 1999 Silicon Graphics, Inc. -+ * -+ * Head.S contains the MIPS exception handler and startup code. -+ * -+ ************************************************************************** -+ * 9 Nov, 2000. -+ * Added Cache Error exception handler and SBDDP EJTAG debug exception. -+ * -+ * Kevin Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com -+ * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. -+ ************************************************************************** -+ */ -+#include -+#include ++zImage.flash: vmlinux ++ +@$(call makeboot,$@) + -+#include -+#include -+#include -+#include -+#include + CLEAN_FILES += vmlinux.ecoff \ + vmlinux.srec \ + vmlinux.rm200.tmp \ +@@ -848,6 +858,7 @@ + archclean: + @$(MAKE) $(clean)=arch/mips/boot + @$(MAKE) $(clean)=arch/mips/lasat ++ @$(MAKE) $(clean)=arch/mips/boot/compressed + + CLEAN_FILES += vmlinux.32 \ + vmlinux.64 \ +diff -urN linux-2.6.16.7/arch/mips/Makefile.orig linux-2.6.16.7.new/arch/mips/Makefile.orig +--- linux-2.6.16.7/arch/mips/Makefile.orig 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.16.7.new/arch/mips/Makefile.orig 2006-05-04 23:09:55.000000000 +0200 +@@ -0,0 +1,862 @@ ++# ++# This file is subject to the terms and conditions of the GNU General Public ++# License. See the file "COPYING" in the main directory of this archive ++# for more details. ++# ++# Copyright (C) 1994, 95, 96, 2003 by Ralf Baechle ++# DECStation modifications by Paul M. Antoine, 1996 ++# Copyright (C) 2002, 2003, 2004 Maciej W. Rozycki ++# ++# This file is included by the global makefile so that you can add your own ++# architecture-specific flags and dependencies. Remember to do have actions ++# for "archclean" cleaning up for this architecture. ++# + -+#define IndexInvalidate_I 0x00 -+#define IndexWriteBack_D 0x01 ++as-option = $(shell if $(CC) $(CFLAGS) $(1) -Wa,-Z -c -o /dev/null \ ++ -xassembler /dev/null > /dev/null 2>&1; then echo "$(1)"; \ ++ else echo "$(2)"; fi ;) + -+ .set noreorder -+ .cprestore -+ LEAF(start) -+start: -+ bal locate -+ nop -+locate: -+ subu s8, ra, 8 /* Where we were loaded */ -+ la sp, (.stack + 8192) ++cflags-y := + -+ move s0, a0 /* Save boot rom start args */ -+ move s1, a1 -+ move s2, a2 -+ move s3, a3 ++# ++# Select the object file format to substitute into the linker script. ++# ++ifdef CONFIG_CPU_LITTLE_ENDIAN ++32bit-tool-prefix = mipsel-linux- ++64bit-tool-prefix = mips64el-linux- ++32bit-bfd = elf32-tradlittlemips ++64bit-bfd = elf64-tradlittlemips ++32bit-emul = elf32ltsmip ++64bit-emul = elf64ltsmip ++else ++32bit-tool-prefix = mips-linux- ++64bit-tool-prefix = mips64-linux- ++32bit-bfd = elf32-tradbigmips ++64bit-bfd = elf64-tradbigmips ++32bit-emul = elf32btsmip ++64bit-emul = elf64btsmip ++endif + -+ la a0, start /* Where we were linked to run */ ++ifdef CONFIG_32BIT ++gcc-abi = 32 ++tool-prefix = $(32bit-tool-prefix) ++UTS_MACHINE := mips ++endif ++ifdef CONFIG_64BIT ++gcc-abi = 64 ++tool-prefix = $(64bit-tool-prefix) ++UTS_MACHINE := mips64 ++endif + -+ move a1, s8 -+ la a2, _edata -+ subu t1, a2, a0 -+ srl t1, t1, 2 ++ifdef CONFIG_CROSSCOMPILE ++CROSS_COMPILE := $(tool-prefix) ++endif + -+ /* copy text section */ -+ li t0, 0 -+1: lw v0, 0(a1) -+ nop -+ sw v0, 0(a0) -+ xor t0, t0, v0 -+ addu a0, 4 -+ bne a2, a0, 1b -+ addu a1, 4 ++CHECKFLAGS-y += -D__linux__ -D__mips__ \ ++ -D_MIPS_SZINT=32 \ ++ -D_ABIO32=1 \ ++ -D_ABIN32=2 \ ++ -D_ABI64=3 ++CHECKFLAGS-$(CONFIG_32BIT) += -D_MIPS_SIM=_ABIO32 \ ++ -D_MIPS_SZLONG=32 \ ++ -D_MIPS_SZPTR=32 \ ++ -D__PTRDIFF_TYPE__=int ++CHECKFLAGS-$(CONFIG_64BIT) += -m64 -D_MIPS_SIM=_ABI64 \ ++ -D_MIPS_SZLONG=64 \ ++ -D_MIPS_SZPTR=64 \ ++ -D__PTRDIFF_TYPE__="long int" ++CHECKFLAGS-$(CONFIG_CPU_BIG_ENDIAN) += -D__MIPSEB__ ++CHECKFLAGS-$(CONFIG_CPU_LITTLE_ENDIAN) += -D__MIPSEL__ + -+ /* Clear BSS */ -+ la a0, _edata -+ la a2, _end -+2: sw zero, 0(a0) -+ bne a2, a0, 2b -+ addu a0, 4 ++CHECKFLAGS = $(CHECKFLAGS-y) + -+ /* push the D-Cache and invalidate I-Cache */ -+ li k0, 0x80000000 # start address -+ li k1, 0x80004000 # end address (16KB I-Cache) -+ subu k1, 128 ++ifdef CONFIG_BUILD_ELF64 ++gas-abi = 64 ++ld-emul = $(64bit-emul) ++vmlinux-32 = vmlinux.32 ++vmlinux-64 = vmlinux ++else ++gas-abi = 32 ++ld-emul = $(32bit-emul) ++vmlinux-32 = vmlinux ++vmlinux-64 = vmlinux.64 + -+1: -+ .set mips3 -+ cache IndexWriteBack_D, 0(k0) -+ cache IndexWriteBack_D, 32(k0) -+ cache IndexWriteBack_D, 64(k0) -+ cache IndexWriteBack_D, 96(k0) -+ cache IndexInvalidate_I, 0(k0) -+ cache IndexInvalidate_I, 32(k0) -+ cache IndexInvalidate_I, 64(k0) -+ cache IndexInvalidate_I, 96(k0) -+ .set mips0 ++cflags-$(CONFIG_64BIT) += $(call cc-option,-mno-explicit-relocs) ++endif + -+ bne k0, k1, 1b -+ addu k0, k0, 128 -+ /* done */ ++# ++# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel ++# code since it only slows down the whole thing. At some point we might make ++# use of global pointer optimizations but their use of $28 conflicts with ++# the current pointer optimization. ++# ++# The DECStation requires an ECOFF kernel for remote booting, other MIPS ++# machines may also. Since BFD is incredibly buggy with respect to ++# crossformat linking we rely on the elf2ecoff tool for format conversion. ++# ++cflags-y += -G 0 -mno-abicalls -fno-pic -pipe ++cflags-y += -msoft-float ++LDFLAGS_vmlinux += -G 0 -static -n -nostdlib ++MODFLAGS += -mlong-calls + -+ move a0, s8 /* load address */ -+ move a1, t1 /* length in words */ -+ move a2, t0 /* checksum */ -+ move a3, sp ++# ++# We explicitly add the endianness specifier if needed, this allows ++# to compile kernels with a toolchain for the other endianness. We ++# carefully avoid to add it redundantly because gcc 3.3/3.4 complains ++# when fed the toolchain default! ++# ++cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB) ++cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL) + -+ la ra, 1f -+ la k0, decompress_kernel -+ jr k0 -+ nop -+1: ++cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ ++ -fno-omit-frame-pointer + -+ move a0, s0 -+ move a1, s1 -+ move a2, s2 -+ move a3, s3 -+ li k0, KERNEL_ENTRY -+ jr k0 -+ nop -+3: -+ b 3b -+ END(start) -+ .comm .stack,4096*2,4 -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/common/Makefile ---- linux-2.6.16.7/arch/mips/boot/compressed/common/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/Makefile 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,14 @@ +# -+# arch/mips/boot/compressed/common/Makefile ++# Use: $(call set_gccflags,,,,,) +# -+# This file is subject to the terms and conditions of the GNU General Public -+# License. See the file "COPYING" in the main directory of this archive -+# for more details. ++# , -- preferred CPU and ISA designations (may require ++# recent tools) ++# , -- fallback CPU and ISA designations (have to work ++# with up to the oldest supported tools) ++# -- an ISA designation used as an ABI selector for ++# gcc versions that do not support "-mabi=32" ++# (depending on the CPU type, either "mips1" or ++# "mips2") +# -+# Tom Rini January 2001 ++set_gccflags = $(shell \ ++while :; do \ ++ cpu=$(1); isa=-$(2); \ ++ for gcc_opt in -march= -mcpu=; do \ ++ $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \ ++ -xc /dev/null > /dev/null 2>&1 && \ ++ break 2; \ ++ done; \ ++ cpu=$(3); isa=-$(4); \ ++ for gcc_opt in -march= -mcpu=; do \ ++ $(CC) $$gcc_opt$$cpu $$isa -S -o /dev/null \ ++ -xc /dev/null > /dev/null 2>&1 && \ ++ break 2; \ ++ done; \ ++ break; \ ++done; \ ++gcc_abi=-mabi=$(gcc-abi); gcc_cpu=$$cpu; \ ++if $(CC) $$gcc_abi -S -o /dev/null -xc /dev/null > /dev/null 2>&1; then \ ++ gcc_isa=$$isa; \ ++else \ ++ gcc_abi=; gcc_isa=-$(5); \ ++fi; \ ++gas_abi=-Wa,-$(gcc-abi); gas_cpu=$$cpu; gas_isa=-Wa,$$isa; \ ++while :; do \ ++ for gas_opt in -Wa,-march= -Wa,-mcpu=; do \ ++ $(CC) $$gas_abi $$gas_opt$$cpu $$gas_isa -Wa,-Z -c \ ++ -o /dev/null -xassembler /dev/null > /dev/null 2>&1 && \ ++ break 2; \ ++ done; \ ++ gas_abi=; gas_opt=; gas_cpu=; gas_isa=; \ ++ break; \ ++done; \ ++if test "$(gcc-abi)" != "$(gas-abi)"; then \ ++ gas_abi="-Wa,-$(gas-abi) -Wa,-mgp$(gcc-abi)"; \ ++fi; \ ++if test "$$gcc_opt" = -march= && test -n "$$gcc_abi"; then \ ++ $(CC) $$gcc_abi $$gcc_opt$$gcc_cpu -S -o /dev/null \ ++ -xc /dev/null > /dev/null 2>&1 && \ ++ gcc_isa=; \ ++fi; \ ++echo $$gcc_abi $$gcc_opt$$gcc_cpu $$gcc_isa $$gas_abi $$gas_opt$$gas_cpu $$gas_isa) ++ +# -+# Pete Popov, 2004 ++# CPU-dependent compiler/assembler options for optimization. +# ++cflags-$(CONFIG_CPU_R3000) += \ ++ $(call set_gccflags,r3000,mips1,r3000,mips1,mips1) ++CHECKFLAGS-$(CONFIG_CPU_R3000) += -D_MIPS_ISA=_MIPS_ISA_MIPS1 + -+lib-y := misc-common.o no_initrd.o dummy.o -+lib-$(CONFIG_SOC_AU1X00) += au1k_uart.o -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/au1k_uart.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/au1k_uart.c ---- linux-2.6.16.7/arch/mips/boot/compressed/common/au1k_uart.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/au1k_uart.c 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,103 @@ -+/* -+ * BRIEF MODULE DESCRIPTION -+ * Simple Au1000 uart routines. -+ * -+ * Copyright 2001 MontaVista Software Inc. -+ * Author: MontaVista Software, Inc. -+ * ppopov@mvista.com or source@mvista.com -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ -+#include -+#include -+#include -+#include "ns16550.h" ++cflags-$(CONFIG_CPU_TX39XX) += \ ++ $(call set_gccflags,r3900,mips1,r3000,mips1,mips1) ++CHECKFLAGS-$(CONFIG_CPU_TX39XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS1 + -+typedef unsigned char uint8; -+typedef unsigned int uint32; ++cflags-$(CONFIG_CPU_R6000) += \ ++ $(call set_gccflags,r6000,mips2,r6000,mips2,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_R6000) += -D_MIPS_ISA=_MIPS_ISA_MIPS2 + -+#define UART16550_BAUD_2400 2400 -+#define UART16550_BAUD_4800 4800 -+#define UART16550_BAUD_9600 9600 -+#define UART16550_BAUD_19200 19200 -+#define UART16550_BAUD_38400 38400 -+#define UART16550_BAUD_57600 57600 -+#define UART16550_BAUD_115200 115200 ++cflags-$(CONFIG_CPU_R4300) += \ ++ $(call set_gccflags,r4300,mips3,r4300,mips3,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_R4300) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 + -+#define UART16550_PARITY_NONE 0 -+#define UART16550_PARITY_ODD 0x08 -+#define UART16550_PARITY_EVEN 0x18 -+#define UART16550_PARITY_MARK 0x28 -+#define UART16550_PARITY_SPACE 0x38 ++cflags-$(CONFIG_CPU_VR41XX) += \ ++ $(call set_gccflags,r4100,mips3,r4600,mips3,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_VR41XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 + -+#define UART16550_DATA_5BIT 0x0 -+#define UART16550_DATA_6BIT 0x1 -+#define UART16550_DATA_7BIT 0x2 -+#define UART16550_DATA_8BIT 0x3 ++cflags-$(CONFIG_CPU_R4X00) += \ ++ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_R4X00) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 + -+#define UART16550_STOP_1BIT 0x0 -+#define UART16550_STOP_2BIT 0x4 ++cflags-$(CONFIG_CPU_TX49XX) += \ ++ $(call set_gccflags,r4600,mips3,r4600,mips3,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_TX49XX) += -D_MIPS_ISA=_MIPS_ISA_MIPS3 + -+/* It would be nice if we had a better way to do this. -+ * It could be a variable defined in one of the board specific files. -+ */ -+#undef UART_BASE -+#ifdef CONFIG_COGENT_CSB250 -+#define UART_BASE UART3_ADDR -+#else -+#define UART_BASE UART0_ADDR -+#endif ++cflags-$(CONFIG_CPU_MIPS32_R1) += \ ++ $(call set_gccflags,mips32,mips32,r4600,mips3,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_MIPS32_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS32 + -+/* memory-mapped read/write of the port */ -+#define UART16550_READ(y) (au_readl(UART_BASE + y) & 0xff) -+#define UART16550_WRITE(y,z) (au_writel(z&0xff, UART_BASE + y)) ++cflags-$(CONFIG_CPU_MIPS32_R2) += \ ++ $(call set_gccflags,mips32r2,mips32r2,r4600,mips3,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_MIPS32_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS32 + -+/* -+ * We use uart 0, which is already initialized by -+ * yamon. -+ */ -+volatile struct NS16550 * -+serial_init(int chan) -+{ -+ volatile struct NS16550 *com_port; -+ com_port = (struct NS16550 *) UART_BASE; -+ return (com_port); -+} ++cflags-$(CONFIG_CPU_MIPS64_R1) += \ ++ $(call set_gccflags,mips64,mips64,r4600,mips3,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_MIPS64_R1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 + -+void -+serial_putc(volatile struct NS16550 *com_port, unsigned char c) -+{ -+ while ((UART16550_READ(UART_LSR)&0x40) == 0); -+ UART16550_WRITE(UART_TX, c); -+} ++cflags-$(CONFIG_CPU_MIPS64_R2) += \ ++ $(call set_gccflags,mips64r2,mips64r2,r4600,mips3,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_MIPS64_R2) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 + -+unsigned char -+serial_getc(volatile struct NS16550 *com_port) -+{ -+ while((UART16550_READ(UART_LSR) & 0x1) == 0); -+ return UART16550_READ(UART_RX); -+} ++cflags-$(CONFIG_CPU_R5000) += \ ++ $(call set_gccflags,r5000,mips4,r5000,mips4,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_R5000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 + -+int -+serial_tstc(volatile struct NS16550 *com_port) -+{ -+ return((UART16550_READ(UART_LSR) & LSR_DR) != 0); -+} -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/dummy.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/dummy.c ---- linux-2.6.16.7/arch/mips/boot/compressed/common/dummy.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/dummy.c 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,4 @@ -+int main(void) -+{ -+ return 0; -+} -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/misc-common.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-common.c ---- linux-2.6.16.7/arch/mips/boot/compressed/common/misc-common.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-common.c 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,434 @@ -+/* -+ * arch/mips/boot/compressed/common/misc-common.c -+ * -+ * Misc. bootloader code (almost) all platforms can use -+ * -+ * Author: Johnnie Peters -+ * Editor: Tom Rini -+ * -+ * Derived from arch/ppc/boot/prep/misc.c -+ * -+ * Ported by Pete Popov to -+ * support mips board(s). I also got rid of the vga console -+ * code. -+ * -+ * Copyright 2000-2001 MontaVista Software Inc. -+ * -+ * Ported to MIPS 2.6 by Pete Popov, -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED -+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF -+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN -+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF -+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON -+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -+ * -+ * You should have received a copy of the GNU General Public License along -+ * with this program; if not, write to the Free Software Foundation, Inc., -+ * 675 Mass Ave, Cambridge, MA 02139, USA. -+ */ ++cflags-$(CONFIG_CPU_R5432) += \ ++ $(call set_gccflags,r5400,mips4,r5000,mips4,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_R5432) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 + -+#include /* for va_ bits */ -+#include -+#include -+#include ++cflags-$(CONFIG_CPU_NEVADA) += \ ++ $(call set_gccflags,rm5200,mips4,r5000,mips4,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_NEVADA) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 + -+extern char *avail_ram; -+extern char *end_avail; -+extern char _end[]; ++cflags-$(CONFIG_CPU_RM7000) += \ ++ $(call set_gccflags,rm7000,mips4,r5000,mips4,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_RM7000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 + -+void puts(const char *); -+void putc(const char c); -+void puthex(unsigned long val); -+void _bcopy(char *src, char *dst, int len); -+void gunzip(void *, int, unsigned char *, int *); -+static int _cvt(unsigned long val, char *buf, long radix, char *digits); ++cflags-$(CONFIG_CPU_RM9000) += \ ++ $(call set_gccflags,rm9000,mips4,r5000,mips4,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_RM9000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 + -+void _vprintk(void(*)(const char), const char *, va_list ap); + -+struct NS16550 *com_port; ++cflags-$(CONFIG_CPU_SB1) += \ ++ $(call set_gccflags,sb1,mips64,r5000,mips4,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_SB1) += -D_MIPS_ISA=_MIPS_ISA_MIPS64 + -+int serial_tstc(volatile struct NS16550 *); -+unsigned char serial_getc(volatile struct NS16550 *); -+void serial_putc(volatile struct NS16550 *, unsigned char); ++cflags-$(CONFIG_CPU_R8000) += \ ++ $(call set_gccflags,r8000,mips4,r8000,mips4,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_R8000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 + -+void pause(void) -+{ -+ puts("pause\n"); -+} ++cflags-$(CONFIG_CPU_R10000) += \ ++ $(call set_gccflags,r10000,mips4,r8000,mips4,mips2) \ ++ -Wa,--trap ++CHECKFLAGS-$(CONFIG_CPU_R10000) += -D_MIPS_ISA=_MIPS_ISA_MIPS4 + -+void exit(void) -+{ -+ puts("exit\n"); -+ while(1); -+} ++ifdef CONFIG_CPU_SB1 ++ifdef CONFIG_SB1_PASS_1_WORKAROUNDS ++MODFLAGS += -msb1-pass1-workarounds ++endif ++endif + -+int tstc(void) -+{ -+ return (serial_tstc(com_port)); -+} ++# ++# Firmware support ++# ++libs-$(CONFIG_ARC) += arch/mips/arc/ ++libs-$(CONFIG_SIBYTE_CFE) += arch/mips/sibyte/cfe/ + -+int getc(void) -+{ -+ while (1) { -+ if (serial_tstc(com_port)) -+ return (serial_getc(com_port)); -+ } -+} ++# ++# Board-dependent options and extra files ++# + -+void -+putc(const char c) -+{ -+ serial_putc(com_port, c); -+ if ( c == '\n' ) -+ serial_putc(com_port, '\r'); -+} ++# ++# Acer PICA 61, Mips Magnum 4000 and Olivetti M700. ++# ++core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ ++cflags-$(CONFIG_MACH_JAZZ) += -Iinclude/asm-mips/mach-jazz ++load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000 + -+void puts(const char *s) -+{ -+ char c; -+ while ( ( c = *s++ ) != '\0' ) { -+ serial_putc(com_port, c); -+ if ( c == '\n' ) serial_putc(com_port, '\r'); -+ } -+} ++# ++# Common Alchemy Au1x00 stuff ++# ++core-$(CONFIG_SOC_AU1X00) += arch/mips/au1000/common/ ++cflags-$(CONFIG_SOC_AU1X00) += -Iinclude/asm-mips/mach-au1x00 + -+void error(char *x) -+{ -+ puts("\n\n"); -+ puts(x); -+ puts("\n\n -- System halted"); ++# ++# AMD Alchemy Pb1000 eval board ++# ++libs-$(CONFIG_MIPS_PB1000) += arch/mips/au1000/pb1000/ ++cflags-$(CONFIG_MIPS_PB1000) += -Iinclude/asm-mips/mach-pb1x00 ++load-$(CONFIG_MIPS_PB1000) += 0xffffffff80100000 + -+ while(1); /* Halt */ -+} ++# ++# AMD Alchemy Pb1100 eval board ++# ++libs-$(CONFIG_MIPS_PB1100) += arch/mips/au1000/pb1100/ ++cflags-$(CONFIG_MIPS_PB1100) += -Iinclude/asm-mips/mach-pb1x00 ++load-$(CONFIG_MIPS_PB1100) += 0xffffffff80100000 + -+static void *zalloc(unsigned size) -+{ -+ void *p = avail_ram; ++# ++# AMD Alchemy Pb1500 eval board ++# ++libs-$(CONFIG_MIPS_PB1500) += arch/mips/au1000/pb1500/ ++cflags-$(CONFIG_MIPS_PB1500) += -Iinclude/asm-mips/mach-pb1x00 ++load-$(CONFIG_MIPS_PB1500) += 0xffffffff80100000 + -+ size = (size + 7) & -8; -+ avail_ram += size; -+ if (avail_ram > end_avail) { -+ puts("oops... out of memory\n"); -+ pause(); -+ } -+ return p; -+} ++# ++# AMD Alchemy Pb1550 eval board ++# ++libs-$(CONFIG_MIPS_PB1550) += arch/mips/au1000/pb1550/ ++cflags-$(CONFIG_MIPS_PB1550) += -Iinclude/asm-mips/mach-pb1x00 ++load-$(CONFIG_MIPS_PB1550) += 0xffffffff80100000 + ++# ++# AMD Alchemy Pb1200 eval board ++# ++libs-$(CONFIG_MIPS_PB1200) += arch/mips/au1000/pb1200/ ++cflags-$(CONFIG_MIPS_PB1200) += -Iinclude/asm-mips/mach-pb1x00 ++load-$(CONFIG_MIPS_PB1200) += 0xffffffff80100000 + -+#define HEAD_CRC 2 -+#define EXTRA_FIELD 4 -+#define ORIG_NAME 8 -+#define COMMENT 0x10 -+#define RESERVED 0xe0 ++# ++# AMD Alchemy Db1000 eval board ++# ++libs-$(CONFIG_MIPS_DB1000) += arch/mips/au1000/db1x00/ ++cflags-$(CONFIG_MIPS_DB1000) += -Iinclude/asm-mips/mach-db1x00 ++load-$(CONFIG_MIPS_DB1000) += 0xffffffff80100000 + -+#define DEFLATED 8 ++# ++# AMD Alchemy Db1100 eval board ++# ++libs-$(CONFIG_MIPS_DB1100) += arch/mips/au1000/db1x00/ ++cflags-$(CONFIG_MIPS_DB1100) += -Iinclude/asm-mips/mach-db1x00 ++load-$(CONFIG_MIPS_DB1100) += 0xffffffff80100000 + -+void gunzip(void *dst, int dstlen, unsigned char *src, int *lenp) -+{ -+ z_stream s; -+ int r, i, flags; ++# ++# AMD Alchemy Db1500 eval board ++# ++libs-$(CONFIG_MIPS_DB1500) += arch/mips/au1000/db1x00/ ++cflags-$(CONFIG_MIPS_DB1500) += -Iinclude/asm-mips/mach-db1x00 ++load-$(CONFIG_MIPS_DB1500) += 0xffffffff80100000 + -+ /* skip header */ -+ i = 10; -+ flags = src[3]; -+ if (src[2] != Z_DEFLATED || (flags & RESERVED) != 0) { -+ puts("bad gzipped data\n"); -+ exit(); -+ } -+ if ((flags & EXTRA_FIELD) != 0) -+ i = 12 + src[10] + (src[11] << 8); -+ if ((flags & ORIG_NAME) != 0) -+ while (src[i++] != 0) -+ ; -+ if ((flags & COMMENT) != 0) -+ while (src[i++] != 0) -+ ; -+ if ((flags & HEAD_CRC) != 0) -+ i += 2; -+ if (i >= *lenp) { -+ puts("gunzip: ran out of data in header\n"); -+ exit(); -+ } ++# ++# AMD Alchemy Db1550 eval board ++# ++libs-$(CONFIG_MIPS_DB1550) += arch/mips/au1000/db1x00/ ++cflags-$(CONFIG_MIPS_DB1550) += -Iinclude/asm-mips/mach-db1x00 ++load-$(CONFIG_MIPS_DB1550) += 0xffffffff80100000 + -+ /* Initialize ourself. */ -+ s.workspace = zalloc(zlib_inflate_workspacesize()); -+ r = zlib_inflateInit2(&s, -MAX_WBITS); -+ if (r != Z_OK) { -+ puts("zlib_inflateInit2 returned "); puthex(r); puts("\n"); -+ exit(); -+ } -+ s.next_in = src + i; -+ s.avail_in = *lenp - i; -+ s.next_out = dst; -+ s.avail_out = dstlen; -+ r = zlib_inflate(&s, Z_FINISH); -+ if (r != Z_OK && r != Z_STREAM_END) { -+ puts("inflate returned "); puthex(r); puts("\n"); -+ exit(); -+ } -+ *lenp = s.next_out - (unsigned char *) dst; -+ zlib_inflateEnd(&s); -+} ++# ++# AMD Alchemy Db1200 eval board ++# ++libs-$(CONFIG_MIPS_DB1200) += arch/mips/au1000/pb1200/ ++cflags-$(CONFIG_MIPS_DB1200) += -Iinclude/asm-mips/mach-db1x00 ++load-$(CONFIG_MIPS_DB1200) += 0xffffffff80100000 + -+void -+puthex(unsigned long val) -+{ ++# ++# AMD Alchemy Bosporus eval board ++# ++libs-$(CONFIG_MIPS_BOSPORUS) += arch/mips/au1000/db1x00/ ++cflags-$(CONFIG_MIPS_BOSPORUS) += -Iinclude/asm-mips/mach-db1x00 ++load-$(CONFIG_MIPS_BOSPORUS) += 0xffffffff80100000 + -+ unsigned char buf[10]; -+ int i; -+ for (i = 7; i >= 0; i--) -+ { -+ buf[i] = "0123456789ABCDEF"[val & 0x0F]; -+ val >>= 4; -+ } -+ buf[8] = '\0'; -+ puts(buf); -+} ++# ++# AMD Alchemy Mirage eval board ++# ++libs-$(CONFIG_MIPS_MIRAGE) += arch/mips/au1000/db1x00/ ++cflags-$(CONFIG_MIPS_MIRAGE) += -Iinclude/asm-mips/mach-db1x00 ++load-$(CONFIG_MIPS_MIRAGE) += 0xffffffff80100000 + -+#define FALSE 0 -+#define TRUE 1 ++# ++# 4G-Systems eval board ++# ++libs-$(CONFIG_MIPS_MTX1) += arch/mips/au1000/mtx-1/ ++load-$(CONFIG_MIPS_MTX1) += 0xffffffff80100000 + -+void -+_printk(char const *fmt, ...) -+{ -+ va_list ap; ++# ++# MyCable eval board ++# ++libs-$(CONFIG_MIPS_XXS1500) += arch/mips/au1000/xxs1500/ ++load-$(CONFIG_MIPS_XXS1500) += 0xffffffff80100000 + -+ va_start(ap, fmt); -+ _vprintk(putc, fmt, ap); -+ va_end(ap); -+ return; -+} ++# ++# Cobalt Server ++# ++core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/ ++cflags-$(CONFIG_MIPS_COBALT) += -Iinclude/asm-mips/mach-cobalt ++load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000 + -+#define is_digit(c) ((c >= '0') && (c <= '9')) ++# ++# DECstation family ++# ++core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/ ++cflags-$(CONFIG_MACH_DECSTATION)+= -Iinclude/asm-mips/mach-dec ++libs-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/prom/ ++load-$(CONFIG_MACH_DECSTATION) += 0xffffffff80040000 ++CLEAN_FILES += drivers/tc/lk201-map.c + -+void -+_vprintk(void(*putc)(const char), const char *fmt0, va_list ap) -+{ -+ char c, sign, *cp = 0; -+ int left_prec, right_prec, zero_fill, length = 0, pad, pad_on_right; -+ char buf[32]; -+ long val; -+ while ((c = *fmt0++)) -+ { -+ if (c == '%') -+ { -+ c = *fmt0++; -+ left_prec = right_prec = pad_on_right = 0; -+ if (c == '-') -+ { -+ c = *fmt0++; -+ pad_on_right++; -+ } -+ if (c == '0') -+ { -+ zero_fill = TRUE; -+ c = *fmt0++; -+ } else -+ { -+ zero_fill = FALSE; -+ } -+ while (is_digit(c)) -+ { -+ left_prec = (left_prec * 10) + (c - '0'); -+ c = *fmt0++; -+ } -+ if (c == '.') -+ { -+ c = *fmt0++; -+ zero_fill++; -+ while (is_digit(c)) -+ { -+ right_prec = (right_prec * 10) + (c - '0'); -+ c = *fmt0++; -+ } -+ } else -+ { -+ right_prec = left_prec; -+ } -+ sign = '\0'; -+ switch (c) -+ { -+ case 'd': -+ case 'x': -+ case 'X': -+ val = va_arg(ap, long); -+ switch (c) -+ { -+ case 'd': -+ if (val < 0) -+ { -+ sign = '-'; -+ val = -val; -+ } -+ length = _cvt(val, buf, 10, "0123456789"); -+ break; -+ case 'x': -+ length = _cvt(val, buf, 16, "0123456789abcdef"); -+ break; -+ case 'X': -+ length = _cvt(val, buf, 16, "0123456789ABCDEF"); -+ break; -+ } -+ cp = buf; -+ break; -+ case 's': -+ cp = va_arg(ap, char *); -+ length = strlen(cp); -+ break; -+ case 'c': -+ c = va_arg(ap, long /*char*/); -+ (*putc)(c); -+ continue; -+ default: -+ (*putc)('?'); -+ } -+ pad = left_prec - length; -+ if (sign != '\0') -+ { -+ pad--; -+ } -+ if (zero_fill) -+ { -+ c = '0'; -+ if (sign != '\0') -+ { -+ (*putc)(sign); -+ sign = '\0'; -+ } -+ } else -+ { -+ c = ' '; -+ } -+ if (!pad_on_right) -+ { -+ while (pad-- > 0) -+ { -+ (*putc)(c); -+ } -+ } -+ if (sign != '\0') -+ { -+ (*putc)(sign); -+ } -+ while (length-- > 0) -+ { -+ (*putc)(c = *cp++); -+ if (c == '\n') -+ { -+ (*putc)('\r'); -+ } -+ } -+ if (pad_on_right) -+ { -+ while (pad-- > 0) -+ { -+ (*putc)(c); -+ } -+ } -+ } else -+ { -+ (*putc)(c); -+ if (c == '\n') -+ { -+ (*putc)('\r'); -+ } -+ } -+ } -+} ++# ++# Galileo EV64120 Board ++# ++core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/ev64120/ ++core-$(CONFIG_MIPS_EV64120) += arch/mips/gt64120/common/ ++cflags-$(CONFIG_MIPS_EV64120) += -Iinclude/asm-mips/mach-ev64120 ++load-$(CONFIG_MIPS_EV64120) += 0xffffffff80100000 + -+int -+_cvt(unsigned long val, char *buf, long radix, char *digits) -+{ -+ char temp[80]; -+ char *cp = temp; -+ int length = 0; -+ if (val == 0) -+ { /* Special case */ -+ *cp++ = '0'; -+ } else -+ while (val) -+ { -+ *cp++ = digits[val % radix]; -+ val /= radix; -+ } -+ while (cp != temp) -+ { -+ *buf++ = *--cp; -+ length++; -+ } -+ *buf = '\0'; -+ return (length); -+} ++# ++# Galileo EV96100 Board ++# ++core-$(CONFIG_MIPS_EV96100) += arch/mips/galileo-boards/ev96100/ ++cflags-$(CONFIG_MIPS_EV96100) += -Iinclude/asm-mips/mach-ev96100 ++load-$(CONFIG_MIPS_EV96100) += 0xffffffff80100000 + -+void -+_dump_buf_with_offset(unsigned char *p, int s, unsigned char *base) -+{ -+ int i, c; -+ if ((unsigned int)s > (unsigned int)p) -+ { -+ s = (unsigned int)s - (unsigned int)p; -+ } -+ while (s > 0) -+ { -+ if (base) -+ { -+ _printk("%06X: ", (int)p - (int)base); -+ } else -+ { -+ _printk("%06X: ", p); -+ } -+ for (i = 0; i < 16; i++) -+ { -+ if (i < s) -+ { -+ _printk("%02X", p[i] & 0xFF); -+ } else -+ { -+ _printk(" "); -+ } -+ if ((i % 2) == 1) _printk(" "); -+ if ((i % 8) == 7) _printk(" "); -+ } -+ _printk(" |"); -+ for (i = 0; i < 16; i++) -+ { -+ if (i < s) -+ { -+ c = p[i] & 0xFF; -+ if ((c < 0x20) || (c >= 0x7F)) c = '.'; -+ } else -+ { -+ c = ' '; -+ } -+ _printk("%c", c); -+ } -+ _printk("|\n"); -+ s -= 16; -+ p += 16; -+ } -+} ++# ++# Globespan IVR eval board with QED 5231 CPU ++# ++core-$(CONFIG_ITE_BOARD_GEN) += arch/mips/ite-boards/generic/ ++core-$(CONFIG_MIPS_IVR) += arch/mips/ite-boards/ivr/ ++load-$(CONFIG_MIPS_IVR) += 0xffffffff80100000 ++ ++# ++# ITE 8172 eval board with QED 5231 CPU ++# ++core-$(CONFIG_MIPS_ITE8172) += arch/mips/ite-boards/qed-4n-s01b/ ++load-$(CONFIG_MIPS_ITE8172) += 0xffffffff80100000 + -+void -+_dump_buf(unsigned char *p, int s) -+{ -+ _printk("\n"); -+ _dump_buf_with_offset(p, s, 0); -+} ++# ++# For all MIPS, Inc. eval boards ++# ++core-$(CONFIG_MIPS_BOARDS_GEN) += arch/mips/mips-boards/generic/ + -+/* -+ * Local variables: -+ * c-indent-level: 8 -+ * c-basic-offset: 8 -+ * tab-width: 8 -+ * End: -+ */ -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/misc-simple.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-simple.c ---- linux-2.6.16.7/arch/mips/boot/compressed/common/misc-simple.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/misc-simple.c 2006-04-20 19:27:22.000000000 +0200 -@@ -0,0 +1,122 @@ -+/* -+ * arch/mips/zboot/common/misc-simple.c -+ * -+ * Misc. bootloader code for many machines. This assumes you have are using -+ * a 6xx/7xx/74xx CPU in your machine. This assumes the chunk of memory -+ * below 8MB is free. Finally, it assumes you have a NS16550-style uart for -+ * your serial console. If a machine meets these requirements, it can quite -+ * likely use this code during boot. -+ * -+ * Author: Matt Porter -+ * Derived from arch/ppc/boot/prep/misc.c -+ * -+ * Copyright 2001 MontaVista Software Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ */ ++# ++# MIPS Atlas board ++# ++core-$(CONFIG_MIPS_ATLAS) += arch/mips/mips-boards/atlas/ ++cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-atlas ++cflags-$(CONFIG_MIPS_ATLAS) += -Iinclude/asm-mips/mach-mips ++load-$(CONFIG_MIPS_ATLAS) += 0xffffffff80100000 + -+#include -+#include -+#include ++# ++# MIPS Malta board ++# ++core-$(CONFIG_MIPS_MALTA) += arch/mips/mips-boards/malta/ ++cflags-$(CONFIG_MIPS_MALTA) += -Iinclude/asm-mips/mach-mips ++load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 + -+#include ++# ++# MIPS SEAD board ++# ++core-$(CONFIG_MIPS_SEAD) += arch/mips/mips-boards/sead/ ++load-$(CONFIG_MIPS_SEAD) += 0xffffffff80100000 + -+#include "linux/zlib.h" ++# ++# MIPS SIM ++# ++core-$(CONFIG_MIPS_SIM) += arch/mips/mips-boards/sim/ ++cflags-$(CONFIG_MIPS_SIM) += -Iinclude/asm-mips/mach-sim ++load-$(CONFIG_MIPS_SIM) += 0x80100000 + -+extern struct NS16550 *com_port; ++# ++# Momentum Ocelot board ++# ++# The Ocelot setup.o must be linked early - it does the ioremap() for the ++# mips_io_port_base. ++# ++core-$(CONFIG_MOMENCO_OCELOT) += arch/mips/gt64120/common/ \ ++ arch/mips/gt64120/momenco_ocelot/ ++cflags-$(CONFIG_MOMENCO_OCELOT) += -Iinclude/asm-mips/mach-ocelot ++load-$(CONFIG_MOMENCO_OCELOT) += 0xffffffff80100000 + -+char *avail_ram; -+char *end_avail; -+extern char _end[]; -+char *zimage_start; ++# ++# Momentum Ocelot-G board ++# ++# The Ocelot-G setup.o must be linked early - it does the ioremap() for the ++# mips_io_port_base. ++# ++core-$(CONFIG_MOMENCO_OCELOT_G) += arch/mips/momentum/ocelot_g/ ++load-$(CONFIG_MOMENCO_OCELOT_G) += 0xffffffff80100000 + -+#ifdef CONFIG_CMDLINE -+#define CMDLINE CONFIG_CMDLINE ++# ++# Momentum Ocelot-C and -CS boards ++# ++# The Ocelot-C[S] setup.o must be linked early - it does the ioremap() for the ++# mips_io_port_base. ++core-$(CONFIG_MOMENCO_OCELOT_C) += arch/mips/momentum/ocelot_c/ ++load-$(CONFIG_MOMENCO_OCELOT_C) += 0xffffffff80100000 ++ ++# ++# PMC-Sierra Yosemite ++# ++core-$(CONFIG_PMC_YOSEMITE) += arch/mips/pmc-sierra/yosemite/ ++cflags-$(CONFIG_PMC_YOSEMITE) += -Iinclude/asm-mips/mach-yosemite ++load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 ++ ++# Qemu simulating MIPS32 4Kc ++# ++core-$(CONFIG_QEMU) += arch/mips/qemu/ ++cflags-$(CONFIG_QEMU) += -Iinclude/asm-mips/mach-qemu ++load-$(CONFIG_QEMU) += 0xffffffff80010000 ++ ++# ++# Momentum Ocelot-3 ++# ++core-$(CONFIG_MOMENCO_OCELOT_3) += arch/mips/momentum/ocelot_3/ ++cflags-$(CONFIG_MOMENCO_OCELOT_3) += -Iinclude/asm-mips/mach-ocelot3 ++load-$(CONFIG_MOMENCO_OCELOT_3) += 0xffffffff80100000 ++ ++# ++# Momentum Jaguar ATX ++# ++core-$(CONFIG_MOMENCO_JAGUAR_ATX) += arch/mips/momentum/jaguar_atx/ ++cflags-$(CONFIG_MOMENCO_JAGUAR_ATX) += -Iinclude/asm-mips/mach-ja ++#ifdef CONFIG_JAGUAR_DMALOW ++#load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff88000000 +#else -+#define CMDLINE "" ++load-$(CONFIG_MOMENCO_JAGUAR_ATX) += 0xffffffff80100000 +#endif -+char cmd_preset[] = CMDLINE; -+char cmd_buf[256]; -+char *cmd_line = cmd_buf; -+ -+/* The linker tells us where the image is. -+*/ -+extern unsigned char __image_begin, __image_end; -+extern unsigned char __ramdisk_begin, __ramdisk_end; -+unsigned long initrd_size; + -+extern void puts(const char *); -+extern void putc(const char c); -+extern void puthex(unsigned long val); -+extern void *memcpy(void * __dest, __const void * __src, -+ __kernel_size_t __n); -+extern void gunzip(void *, int, unsigned char *, int *); -+extern void udelay(long delay); -+extern int tstc(void); -+extern int getc(void); -+extern volatile struct NS16550 *serial_init(int chan); ++# ++# NEC DDB ++# ++core-$(CONFIG_DDB5XXX_COMMON) += arch/mips/ddb5xxx/common/ + -+void -+decompress_kernel(unsigned long load_addr, int num_words, -+ unsigned long cksum, unsigned long *sp) -+{ -+ extern unsigned long start; -+ int zimage_size; ++# ++# NEC DDB Vrc-5074 ++# ++core-$(CONFIG_DDB5074) += arch/mips/ddb5xxx/ddb5074/ ++load-$(CONFIG_DDB5074) += 0xffffffff80080000 + -+ com_port = (struct NS16550 *)serial_init(0); ++# ++# NEC DDB Vrc-5476 ++# ++core-$(CONFIG_DDB5476) += arch/mips/ddb5xxx/ddb5476/ ++load-$(CONFIG_DDB5476) += 0xffffffff80080000 + -+ initrd_size = (unsigned long)(&__ramdisk_end) - -+ (unsigned long)(&__ramdisk_begin); ++# ++# NEC DDB Vrc-5477 ++# ++core-$(CONFIG_DDB5477) += arch/mips/ddb5xxx/ddb5477/ ++load-$(CONFIG_DDB5477) += 0xffffffff80100000 + -+ /* -+ * Reveal where we were loaded at and where we -+ * were relocated to. -+ */ -+ puts("loaded at: "); puthex(load_addr); -+ puts(" "); puthex((unsigned long)(load_addr + (4*num_words))); puts("\n"); -+ if ( (unsigned long)load_addr != (unsigned long)&start ) -+ { -+ puts("relocated to: "); puthex((unsigned long)&start); -+ puts(" "); -+ puthex((unsigned long)((unsigned long)&start + (4*num_words))); -+ puts("\n"); -+ } ++core-$(CONFIG_LASAT) += arch/mips/lasat/ ++cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat ++load-$(CONFIG_LASAT) += 0xffffffff80000000 + -+ /* -+ * We link ourself to an arbitrary low address. When we run, we -+ * relocate outself to that address. __image_being points to -+ * the part of the image where the zImage is. -- Tom -+ */ -+ zimage_start = (char *)(unsigned long)(&__image_begin); -+ zimage_size = (unsigned long)(&__image_end) - -+ (unsigned long)(&__image_begin); ++# ++# Common VR41xx ++# ++core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/ ++cflags-$(CONFIG_MACH_VR41XX) += -Iinclude/asm-mips/mach-vr41xx + -+ /* -+ * The zImage and initrd will be between start and _end, so they've -+ * already been moved once. We're good to go now. -- Tom -+ */ -+ puts("zimage at: "); puthex((unsigned long)zimage_start); -+ puts(" "); puthex((unsigned long)(zimage_size+zimage_start)); -+ puts("\n"); ++# ++# NEC VR4133 ++# ++core-$(CONFIG_NEC_CMBVR4133) += arch/mips/vr41xx/nec-cmbvr4133/ ++load-$(CONFIG_NEC_CMBVR4133) += 0xffffffff80100000 + -+ if ( initrd_size ) { -+ puts("initrd at: "); -+ puthex((unsigned long)(&__ramdisk_begin)); -+ puts(" "); puthex((unsigned long)(&__ramdisk_end));puts("\n"); -+ } ++# ++# ZAO Networks Capcella (VR4131) ++# ++load-$(CONFIG_ZAO_CAPCELLA) += 0xffffffff80000000 + -+ /* assume the chunk below 8M is free */ -+ avail_ram = (char *)AVAIL_RAM_START; -+ end_avail = (char *)AVAIL_RAM_END; ++# ++# Victor MP-C303/304 (VR4122) ++# ++load-$(CONFIG_VICTOR_MPC30X) += 0xffffffff80001000 + -+ /* Display standard Linux/MIPS boot prompt for kernel args */ -+ puts("Uncompressing Linux at load address "); -+ puthex(LOADADDR); -+ puts("\n"); -+ /* I don't like this hard coded gunzip size (fixme) */ -+ gunzip((void *)LOADADDR, 0x400000, zimage_start, &zimage_size); -+ puts("Now booting the kernel\n"); -+} -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/common/no_initrd.c linux-2.6.16.7.new/arch/mips/boot/compressed/common/no_initrd.c ---- linux-2.6.16.7/arch/mips/boot/compressed/common/no_initrd.c 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/common/no_initrd.c 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,2 @@ -+char initrd_data[1]; -+int initrd_len = 0; -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/images/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/images/Makefile ---- linux-2.6.16.7/arch/mips/boot/compressed/images/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/images/Makefile 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,17 @@ ++# ++# IBM WorkPad z50 (VR4121) ++# ++core-$(CONFIG_IBM_WORKPAD) += arch/mips/vr41xx/ibm-workpad/ ++load-$(CONFIG_IBM_WORKPAD) += 0xffffffff80004000 + +# -+# This dir holds all of the images for MIPS machines. -+# Tom Rini January 2001 -+# Pete Popov 2004 ++# CASIO CASSIPEIA E-55/65 (VR4111) ++# ++core-$(CONFIG_CASIO_E55) += arch/mips/vr41xx/casio-e55/ ++load-$(CONFIG_CASIO_E55) += 0xffffffff80004000 + -+extra-y := vmlinux.bin vmlinux.gz ++# ++# TANBAC VR4131 multichip module(TB0225) and TANBAC VR4131DIMM(TB0229) (VR4131) ++# ++load-$(CONFIG_TANBAC_TB022X) += 0xffffffff80000000 + -+OBJCOPYFLAGS_vmlinux.bin := -O binary -+$(obj)/vmlinux.bin: vmlinux FORCE -+ $(call if_changed,objcopy) ++# ++# Common Philips PNX8550 ++# ++core-$(CONFIG_SOC_PNX8550) += arch/mips/philips/pnx8550/common/ ++cflags-$(CONFIG_SOC_PNX8550) += -Iinclude/asm-mips/mach-pnx8550 + -+$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE -+ $(call if_changed,gzip) ++# ++# Philips PNX8550 JBS board ++# ++libs-$(CONFIG_PNX8550_JBS) += arch/mips/philips/pnx8550/jbs/ ++#cflags-$(CONFIG_PNX8550_JBS) += -Iinclude/asm-mips/mach-pnx8550 ++load-$(CONFIG_PNX8550_JBS) += 0xffffffff80060000 + -+# Files generated that shall be removed upon make clean -+clean-files := vmlinux* zImage* -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/nonstdio.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/nonstdio.h ---- linux-2.6.16.7/arch/mips/boot/compressed/include/nonstdio.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/nonstdio.h 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,18 @@ -+/* -+ * Copyright (C) Paul Mackerras 1997. -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ */ -+typedef int FILE; -+extern FILE *stdin, *stdout; -+#define NULL ((void *)0) -+#define EOF (-1) -+#define fopen(n, m) NULL -+#define fflush(f) 0 -+#define fclose(f) 0 -+extern char *fgets(); ++# ++# SGI IP22 (Indy/Indigo2) ++# ++# Set the load address to >= 0xffffffff88069000 if you want to leave space for ++# symmon, 0xffffffff80002000 for production kernels. Note that the value must ++# be aligned to a multiple of the kernel stack size or the handling of the ++# current variable will break so for 64-bit kernels we have to raise the start ++# address by 8kb. ++# ++core-$(CONFIG_SGI_IP22) += arch/mips/sgi-ip22/ ++cflags-$(CONFIG_SGI_IP22) += -Iinclude/asm-mips/mach-ip22 ++ifdef CONFIG_32BIT ++load-$(CONFIG_SGI_IP22) += 0xffffffff88002000 ++endif ++ifdef CONFIG_64BIT ++load-$(CONFIG_SGI_IP22) += 0xffffffff88004000 ++endif + -+#define perror(s) printf("%s: no files!\n", (s)) -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/ns16550.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/ns16550.h ---- linux-2.6.16.7/arch/mips/boot/compressed/include/ns16550.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/ns16550.h 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,46 @@ -+/* -+ * NS16550 Serial Port -+ */ ++# ++# SGI-IP27 (Origin200/2000) ++# ++# Set the load address to >= 0xc000000000300000 if you want to leave space for ++# symmon, 0xc00000000001c000 for production kernels. Note that the value must ++# be 16kb aligned or the handling of the current variable will break. ++# ++ifdef CONFIG_SGI_IP27 ++core-$(CONFIG_SGI_IP27) += arch/mips/sgi-ip27/ ++cflags-$(CONFIG_SGI_IP27) += -Iinclude/asm-mips/mach-ip27 ++ifdef CONFIG_BUILD_ELF64 ++ifdef CONFIG_MAPPED_KERNEL ++load-$(CONFIG_SGI_IP27) += 0xc00000004001c000 ++OBJCOPYFLAGS := --change-addresses=0x3fffffff80000000 ++dataoffset-$(CONFIG_SGI_IP27) += 0x01000000 ++else ++load-$(CONFIG_SGI_IP27) += 0xa80000000001c000 ++OBJCOPYFLAGS := --change-addresses=0x57ffffff80000000 ++endif ++else ++ifdef CONFIG_MAPPED_KERNEL ++load-$(CONFIG_SGI_IP27) += 0xffffffffc001c000 ++OBJCOPYFLAGS := --change-addresses=0xc000000080000000 ++dataoffset-$(CONFIG_SGI_IP27) += 0x01000000 ++else ++load-$(CONFIG_SGI_IP27) += 0xffffffff8001c000 ++OBJCOPYFLAGS := --change-addresses=0xa800000080000000 ++endif ++endif ++endif + -+/* -+ * Figure out which file will have the definitons of COMx -+ */ ++# ++# SGI-IP32 (O2) ++# ++# Set the load address to >= 80069000 if you want to leave space for symmon, ++# 0xffffffff80004000 for production kernels. Note that the value must be aligned to ++# a multiple of the kernel stack size or the handling of the current variable ++# will break. ++# ++core-$(CONFIG_SGI_IP32) += arch/mips/sgi-ip32/ ++cflags-$(CONFIG_SGI_IP32) += -Iinclude/asm-mips/mach-ip32 ++load-$(CONFIG_SGI_IP32) += 0xffffffff80004000 + -+/* Some machines have their uart registers 16 bytes apart. Most don't. -+ * TODO: Make this work like drivers/char/serial does - Tom */ -+#if !defined(UART_REG_PAD) -+#define UART_REG_PAD(x) -+#endif ++# ++# Sibyte SB1250 SOC ++# ++# This is a LIB so that it links at the end, and initcalls are later ++# the sequence; but it is built as an object so that modules don't get ++# removed (as happens, even if they have __initcall/module_init) ++# ++core-$(CONFIG_SIBYTE_BCM112X) += arch/mips/sibyte/sb1250/ ++cflags-$(CONFIG_SIBYTE_BCM112X) += -Iinclude/asm-mips/mach-sibyte \ ++ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL + -+struct NS16550 -+ { -+ unsigned char rbr; /* 0 */ -+ UART_REG_PAD(rbr) -+ unsigned char ier; /* 1 */ -+ UART_REG_PAD(ier) -+ unsigned char fcr; /* 2 */ -+ UART_REG_PAD(fcr) -+ unsigned char lcr; /* 3 */ -+ UART_REG_PAD(lcr) -+ unsigned char mcr; /* 4 */ -+ UART_REG_PAD(mcr) -+ unsigned char lsr; /* 5 */ -+ UART_REG_PAD(lsr) -+ unsigned char msr; /* 6 */ -+ UART_REG_PAD(msr) -+ unsigned char scr; /* 7 */ -+ }; ++core-$(CONFIG_SIBYTE_SB1250) += arch/mips/sibyte/sb1250/ ++cflags-$(CONFIG_SIBYTE_SB1250) += -Iinclude/asm-mips/mach-sibyte \ ++ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1250_112x_ALL + -+#define thr rbr -+#define iir fcr -+#define dll rbr -+#define dlm ier ++core-$(CONFIG_SIBYTE_BCM1x55) += arch/mips/sibyte/bcm1480/ ++cflags-$(CONFIG_SIBYTE_BCM1x55) += -Iinclude/asm-mips/mach-sibyte \ ++ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL + -+#define LSR_DR 0x01 /* Data ready */ -+#define LSR_OE 0x02 /* Overrun */ -+#define LSR_PE 0x04 /* Parity error */ -+#define LSR_FE 0x08 /* Framing error */ -+#define LSR_BI 0x10 /* Break */ -+#define LSR_THRE 0x20 /* Xmit holding register empty */ -+#define LSR_TEMT 0x40 /* Xmitter empty */ -+#define LSR_ERR 0x80 /* Error */ -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/include/pb1000_serial.h linux-2.6.16.7.new/arch/mips/boot/compressed/include/pb1000_serial.h ---- linux-2.6.16.7/arch/mips/boot/compressed/include/pb1000_serial.h 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/include/pb1000_serial.h 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,20 @@ -+/* -+ * arch/ppc/boot/include/sandpoint_serial.h -+ * -+ * Location of the COM ports on Motorola SPS Sandpoint machines -+ * -+ * Author: Mark A. Greer -+ * mgreer@mvista.com -+ * -+ * Copyright 2001 MontaVista Software Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ */ ++core-$(CONFIG_SIBYTE_BCM1x80) += arch/mips/sibyte/bcm1480/ ++cflags-$(CONFIG_SIBYTE_BCM1x80) += -Iinclude/asm-mips/mach-sibyte \ ++ -DSIBYTE_HDR_FEATURES=SIBYTE_HDR_FMASK_1480_ALL + -+#define COM1 0xfe0003f8 -+#define COM2 0xfe0002f8 -+#define COM3 0x00000000 /* No COM3 */ -+#define COM4 0x00000000 /* No COM4 */ -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/ld.script linux-2.6.16.7.new/arch/mips/boot/compressed/ld.script ---- linux-2.6.16.7/arch/mips/boot/compressed/ld.script 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/ld.script 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,151 @@ -+OUTPUT_ARCH(mips) -+ENTRY(start) -+SECTIONS -+{ -+ /* Read-only sections, merged into text segment: */ -+ /* . = 0x81000000; */ -+ .init : { *(.init) } =0 -+ .text : -+ { -+ _ftext = . ; -+ *(.text) -+ *(.rodata) *(.rodata.*) -+ *(.rodata1) -+ /* .gnu.warning sections are handled specially by elf32.em. */ -+ *(.gnu.warning) -+ } =0 -+ .kstrtab : { *(.kstrtab) } ++# ++# Sibyte BCM91120x (Carmel) board ++# Sibyte BCM91120C (CRhine) board ++# Sibyte BCM91125C (CRhone) board ++# Sibyte BCM91125E (Rhone) board ++# Sibyte SWARM board ++# Sibyte BCM91x80 (BigSur) board ++# ++libs-$(CONFIG_SIBYTE_CARMEL) += arch/mips/sibyte/swarm/ ++load-$(CONFIG_SIBYTE_CARMEL) := 0xffffffff80100000 ++libs-$(CONFIG_SIBYTE_CRHINE) += arch/mips/sibyte/swarm/ ++load-$(CONFIG_SIBYTE_CRHINE) := 0xffffffff80100000 ++libs-$(CONFIG_SIBYTE_CRHONE) += arch/mips/sibyte/swarm/ ++load-$(CONFIG_SIBYTE_CRHONE) := 0xffffffff80100000 ++libs-$(CONFIG_SIBYTE_RHONE) += arch/mips/sibyte/swarm/ ++load-$(CONFIG_SIBYTE_RHONE) := 0xffffffff80100000 ++libs-$(CONFIG_SIBYTE_SENTOSA) += arch/mips/sibyte/swarm/ ++load-$(CONFIG_SIBYTE_SENTOSA) := 0xffffffff80100000 ++libs-$(CONFIG_SIBYTE_SWARM) += arch/mips/sibyte/swarm/ ++load-$(CONFIG_SIBYTE_SWARM) := 0xffffffff80100000 ++libs-$(CONFIG_SIBYTE_BIGSUR) += arch/mips/sibyte/swarm/ ++load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000 ++ ++# ++# SNI RM200 PCI ++# ++core-$(CONFIG_SNI_RM200_PCI) += arch/mips/sni/ ++cflags-$(CONFIG_SNI_RM200_PCI) += -Iinclude/asm-mips/mach-rm200 ++load-$(CONFIG_SNI_RM200_PCI) += 0xffffffff80600000 ++ ++# ++# Toshiba JMR-TX3927 board ++# ++core-$(CONFIG_TOSHIBA_JMR3927) += arch/mips/jmr3927/rbhma3100/ \ ++ arch/mips/jmr3927/common/ ++cflags-$(CONFIG_TOSHIBA_JMR3927) += -Iinclude/asm-mips/mach-jmr3927 ++load-$(CONFIG_TOSHIBA_JMR3927) += 0xffffffff80050000 ++ ++# ++# Toshiba RBTX4927 board or ++# Toshiba RBTX4937 board ++# ++core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/toshiba_rbtx4927/ ++core-$(CONFIG_TOSHIBA_RBTX4927) += arch/mips/tx4927/common/ ++load-$(CONFIG_TOSHIBA_RBTX4927) += 0xffffffff80020000 + -+ . = ALIGN(16); /* Exception table */ -+ __start___ex_table = .; -+ __ex_table : { *(__ex_table) } -+ __stop___ex_table = .; ++# ++# Toshiba RBTX4938 board ++# ++core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/toshiba_rbtx4938/ ++core-$(CONFIG_TOSHIBA_RBTX4938) += arch/mips/tx4938/common/ ++load-$(CONFIG_TOSHIBA_RBTX4938) += 0xffffffff80100000 + -+ __start___dbe_table = .; /* Exception table for data bus errors */ -+ __dbe_table : { *(__dbe_table) } -+ __stop___dbe_table = .; ++cflags-y += -Iinclude/asm-mips/mach-generic ++drivers-$(CONFIG_PCI) += arch/mips/pci/ + -+ __start___ksymtab = .; /* Kernel symbol table */ -+ __ksymtab : { *(__ksymtab) } -+ __stop___ksymtab = .; ++ifdef CONFIG_32BIT ++ifdef CONFIG_CPU_LITTLE_ENDIAN ++JIFFIES = jiffies_64 ++else ++JIFFIES = jiffies_64 + 4 ++endif ++else ++JIFFIES = jiffies_64 ++endif + -+ _etext = .; ++AFLAGS += $(cflags-y) ++CFLAGS += $(cflags-y) + -+ . = ALIGN(8192); -+ .data.init_task : { *(.data.init_task) } ++LDFLAGS += -m $(ld-emul) + -+ /* Startup code */ -+ . = ALIGN(4096); -+ __init_begin = .; -+ .text.init : { *(.text.init) } -+ .data.init : { *(.data.init) } -+ . = ALIGN(16); -+ __setup_start = .; -+ .setup.init : { *(.setup.init) } -+ __setup_end = .; -+ __initcall_start = .; -+ .initcall.init : { *(.initcall.init) } -+ __initcall_end = .; -+ . = ALIGN(4096); /* Align double page for init_task_union */ -+ __init_end = .; ++OBJCOPYFLAGS += --remove-section=.reginfo + -+ . = ALIGN(4096); -+ .data.page_aligned : { *(.data.idt) } ++# ++# Choosing incompatible machines durings configuration will result in ++# error messages during linking. Select a default linkscript if ++# none has been choosen above. ++# + -+ . = ALIGN(32); -+ .data.cacheline_aligned : { *(.data.cacheline_aligned) } ++CPPFLAGS_vmlinux.lds := \ ++ $(CFLAGS) \ ++ -D"LOADADDR=$(load-y)" \ ++ -D"JIFFIES=$(JIFFIES)" \ ++ -D"DATAOFFSET=$(if $(dataoffset-y),$(dataoffset-y),0)" + -+ .fini : { *(.fini) } =0 -+ .reginfo : { *(.reginfo) } -+ /* Adjust the address for the data segment. We want to adjust up to -+ the same address within the page on the next page up. It would -+ be more correct to do this: -+ . = .; -+ The current expression does not correctly handle the case of a -+ text segment ending precisely at the end of a page; it causes the -+ data segment to skip a page. The above expression does not have -+ this problem, but it will currently (2/95) cause BFD to allocate -+ a single segment, combining both text and data, for this case. -+ This will prevent the text segment from being shared among -+ multiple executions of the program; I think that is more -+ important than losing a page of the virtual address space (note -+ that no actual memory is lost; the page which is skipped can not -+ be referenced). */ -+ . = .; -+ .data : -+ { -+ _fdata = . ; -+ *(.data) ++head-y := arch/mips/kernel/head.o arch/mips/kernel/init_task.o + -+ /* Put the compressed image here, so bss is on the end. */ -+ __image_begin = .; -+ *(.image) -+ __image_end = .; -+ /* Align the initial ramdisk image (INITRD) on page boundaries. */ -+ . = ALIGN(4096); -+ __ramdisk_begin = .; -+ *(.initrd) -+ __ramdisk_end = .; -+ . = ALIGN(4096); ++libs-y += arch/mips/lib/ ++libs-$(CONFIG_32BIT) += arch/mips/lib-32/ ++libs-$(CONFIG_64BIT) += arch/mips/lib-64/ + -+ CONSTRUCTORS -+ } -+ .data1 : { *(.data1) } -+ _gp = . + 0x8000; -+ .lit8 : { *(.lit8) } -+ .lit4 : { *(.lit4) } -+ .ctors : { *(.ctors) } -+ .dtors : { *(.dtors) } -+ .got : { *(.got.plt) *(.got) } -+ .dynamic : { *(.dynamic) } -+ /* We want the small data sections together, so single-instruction offsets -+ can access them all, and initialized data all before uninitialized, so -+ we can shorten the on-disk segment size. */ -+ .sdata : { *(.sdata) } -+ . = ALIGN(4); -+ _edata = .; -+ PROVIDE (edata = .); ++core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/ + -+ __bss_start = .; -+ _fbss = .; -+ .sbss : { *(.sbss) *(.scommon) } -+ .bss : -+ { -+ *(.dynbss) -+ *(.bss) -+ *(COMMON) -+ . = ALIGN(4); -+ _end = . ; -+ PROVIDE (end = .); -+ } ++drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/ + -+ /* Sections to be discarded */ -+ /DISCARD/ : -+ { -+ *(.text.exit) -+ *(.data.exit) -+ *(.exitcall.exit) -+ } ++ifdef CONFIG_LASAT ++rom.bin rom.sw: vmlinux ++ $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@ ++endif + -+ /* This is the MIPS specific mdebug section. */ -+ .mdebug : { *(.mdebug) } -+ /* These are needed for ELF backends which have not yet been -+ converted to the new style linker. */ -+ .stab 0 : { *(.stab) } -+ .stabstr 0 : { *(.stabstr) } -+ /* DWARF debug sections. -+ Symbols in the .debug DWARF section are relative to the beginning of the -+ section so we begin .debug at 0. It's not clear yet what needs to happen -+ for the others. */ -+ .debug 0 : { *(.debug) } -+ .debug_srcinfo 0 : { *(.debug_srcinfo) } -+ .debug_aranges 0 : { *(.debug_aranges) } -+ .debug_pubnames 0 : { *(.debug_pubnames) } -+ .debug_sfnames 0 : { *(.debug_sfnames) } -+ .line 0 : { *(.line) } -+ /* These must appear regardless of . */ -+ .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } -+ .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } -+ .comment : { *(.comment) } -+ .note : { *(.note) } -+} -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/lib/Makefile linux-2.6.16.7.new/arch/mips/boot/compressed/lib/Makefile ---- linux-2.6.16.7/arch/mips/boot/compressed/lib/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/lib/Makefile 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,11 @@ ++# ++# Some machines like the Indy need 32-bit ELF binaries for booting purposes. ++# Other need ECOFF, so we build a 32-bit ELF binary for them which we then ++# convert to ECOFF using elf2ecoff. ++# ++vmlinux.32: vmlinux ++ $(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@ + +# -+# Makefile for some libs needed by zImage. ++# The 64-bit ELF tools are pretty broken so at this time we generate 64-bit ++# ELF files from 32-bit files by conversion. +# ++vmlinux.64: vmlinux ++ $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@ + -+lib-y := $(addprefix ../../../../../lib/zlib_inflate/, \ -+ infblock.o infcodes.o inffast.o inflate.o inftrees.o infutil.o) \ -+ $(addprefix ../../../../../lib/, ctype.o string.o) \ -+ $(addprefix ../../../../../arch/mips/lib/, memcpy.o) \ ++makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1) + ++ifdef CONFIG_BOOT_ELF32 ++all: $(vmlinux-32) ++endif + -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/entry linux-2.6.16.7.new/arch/mips/boot/compressed/utils/entry ---- linux-2.6.16.7/arch/mips/boot/compressed/utils/entry 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/entry 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,12 @@ -+#!/bin/sh ++ifdef CONFIG_BOOT_ELF64 ++all: $(vmlinux-64) ++endif + -+# grab the kernel_entry address from the vmlinux elf image -+entry=`$1 $2 | grep kernel_entry` ++ifdef CONFIG_MIPS_ATLAS ++all: vmlinux.srec ++endif + -+fs=`echo $entry | grep ffffffff` # check toolchain output ++ifdef CONFIG_MIPS_MALTA ++all: vmlinux.srec ++endif + -+if [ -n "$fs" ]; then -+ echo "0x"`$1 $2 | grep kernel_entry | cut -c9- | awk '{print $1}'` -+else -+ echo "0x"`$1 $2 | grep kernel_entry | cut -c1- | awk '{print $1}'` -+fi -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/offset linux-2.6.16.7.new/arch/mips/boot/compressed/utils/offset ---- linux-2.6.16.7/arch/mips/boot/compressed/utils/offset 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/offset 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,3 @@ -+#!/bin/sh ++ifdef CONFIG_MIPS_SEAD ++all: vmlinux.srec ++endif + -+echo "0x"`$1 -h $2 | grep $3 | grep -v zvmlinux| awk '{print $6}'` -diff -urN linux-2.6.16.7/arch/mips/boot/compressed/utils/size linux-2.6.16.7.new/arch/mips/boot/compressed/utils/size ---- linux-2.6.16.7/arch/mips/boot/compressed/utils/size 1970-01-01 01:00:00.000000000 +0100 -+++ linux-2.6.16.7.new/arch/mips/boot/compressed/utils/size 2006-04-20 19:27:12.000000000 +0200 -@@ -0,0 +1,4 @@ -+#!/bin/sh ++ifdef CONFIG_QEMU ++all: vmlinux.bin ++endif + -+OFFSET=`$1 -h $2 | grep $3 | grep -v zvmlinux | awk '{print $3}'` -+echo "0x"$OFFSET ++ifdef CONFIG_SNI_RM200_PCI ++all: vmlinux.ecoff ++endif ++ ++ifdef CONFIG_MIPS_MTX1 ++all: vmlinux.srec zImage zImage.flash ++endif ++ ++vmlinux.bin: $(vmlinux-32) ++ +@$(call makeboot,$@) ++ ++vmlinux.ecoff vmlinux.rm200: $(vmlinux-32) ++ +@$(call makeboot,$@) ++ ++vmlinux.srec: $(vmlinux-32) ++ +@$(call makeboot,$@) ++ ++zImage: vmlinux ++ +@$(call makeboot,$@) ++ ++CLEAN_FILES += vmlinux.ecoff \ ++ vmlinux.srec \ ++ vmlinux.rm200.tmp \ ++ vmlinux.rm200 ++ ++archclean: ++ @$(MAKE) $(clean)=arch/mips/boot ++ @$(MAKE) $(clean)=arch/mips/lasat ++ @$(MAKE) $(clean)=arch/mips/boot/compressed ++ ++CLEAN_FILES += vmlinux.32 \ ++ vmlinux.64 \ ++ vmlinux.ecoff -- 2.25.1