From be96765a2ae9330c8db47d5e3eebd890283a2057 Mon Sep 17 00:00:00 2001 From: Piotr Dymacz Date: Mon, 14 Mar 2016 01:09:38 +0100 Subject: [PATCH] Setup AHB master tout in QCA95xx low level init, as it's done for AR933x --- u-boot/cpu/mips/ar7240/qca95xx_pll_init.S | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/u-boot/cpu/mips/ar7240/qca95xx_pll_init.S b/u-boot/cpu/mips/ar7240/qca95xx_pll_init.S index cdab8a7..31a66f1 100755 --- a/u-boot/cpu/mips/ar7240/qca95xx_pll_init.S +++ b/u-boot/cpu/mips/ar7240/qca95xx_pll_init.S @@ -54,12 +54,19 @@ lowlevel_init: bgtz t9, set_xtal_40mhz nop - b rtc_reset + b ahb_max_timeout nop set_xtal_40mhz: li reg_ref_clk_val, 40 +/* AHB max master timeout */ +ahb_max_timeout: + li t8, QCA_AHB_MASTER_TOUT_MAX_REG + lw t9, 0(t8) + or t9, t9, 0xFFFFF + sw t9, 0(t8) + /* * Reset RTC: * 1. First reset RTC submodule using RST_RESET register -- 2.25.1