From ae4c38a5384033c7f5584e33cce1adc511fff333 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 23 Oct 2018 12:25:16 +0200 Subject: [PATCH] arm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGA The new board version has the 2nd FPGA connected via CS# 0 instead of 2 on SPI bus 1. Change this setup in the DT accordingly. Please note that this change does still work on the old board version because the CS signal is not used on this board. Signed-off-by: Stefan Roese --- arch/arm/dts/armada-xp-theadorable.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/armada-xp-theadorable.dts b/arch/arm/dts/armada-xp-theadorable.dts index 065e443417..965c38426c 100644 --- a/arch/arm/dts/armada-xp-theadorable.dts +++ b/arch/arm/dts/armada-xp-theadorable.dts @@ -151,11 +151,11 @@ spi1: spi@10680 { status = "okay"; - fpga@2 { + fpga@0 { #address-cells = <1>; #size-cells = <1>; compatible = "spi-generic-device"; - reg = <2>; /* Chip select 2 */ + reg = <0>; /* Chip select 0 */ spi-max-frequency = <27777777>; }; }; -- 2.25.1