From a83d7bb109266706bf06e1984e16cd0c470c090f Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Sat, 26 Jan 2013 20:33:23 +0000 Subject: [PATCH] brcm47xx: add gpio to irq function again SVN-Revision: 35321 --- .../250-bcma-add-gpio_to_irq.patch | 50 ++++++++++++++ .../patches-3.6/251-ssb-add-gpio_to_irq.patch | 66 +++++++++++++++++++ 2 files changed, 116 insertions(+) create mode 100644 target/linux/brcm47xx/patches-3.6/250-bcma-add-gpio_to_irq.patch create mode 100644 target/linux/brcm47xx/patches-3.6/251-ssb-add-gpio_to_irq.patch diff --git a/target/linux/brcm47xx/patches-3.6/250-bcma-add-gpio_to_irq.patch b/target/linux/brcm47xx/patches-3.6/250-bcma-add-gpio_to_irq.patch new file mode 100644 index 0000000000..f29c4ed136 --- /dev/null +++ b/target/linux/brcm47xx/patches-3.6/250-bcma-add-gpio_to_irq.patch @@ -0,0 +1,50 @@ +--- a/drivers/bcma/driver_gpio.c ++++ b/drivers/bcma/driver_gpio.c +@@ -73,6 +73,16 @@ static void bcma_gpio_free(struct gpio_c + bcma_chipco_gpio_pullup(cc, 1 << gpio, 0); + } + ++static int bcma_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ struct bcma_drv_cc *cc = bcma_gpio_get_cc(chip); ++ ++ if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) ++ return bcma_core_irq(cc->core); ++ else ++ return -EINVAL; ++} ++ + int bcma_gpio_init(struct bcma_drv_cc *cc) + { + struct gpio_chip *chip = &cc->gpio; +@@ -85,6 +95,7 @@ int bcma_gpio_init(struct bcma_drv_cc *c + chip->set = bcma_gpio_set_value; + chip->direction_input = bcma_gpio_direction_input; + chip->direction_output = bcma_gpio_direction_output; ++ chip->to_irq = bcma_gpio_to_irq; + chip->ngpio = 16; + /* There is just one SoC in one device and its GPIO addresses should be + * deterministic to address them more easily. The other buses could get +--- a/include/linux/bcma/bcma_driver_mips.h ++++ b/include/linux/bcma/bcma_driver_mips.h +@@ -42,13 +42,18 @@ struct bcma_drv_mips { + #ifdef CONFIG_BCMA_DRIVER_MIPS + extern void bcma_core_mips_init(struct bcma_drv_mips *mcore); + extern void bcma_core_mips_early_init(struct bcma_drv_mips *mcore); ++ ++extern unsigned int bcma_core_irq(struct bcma_device *core); + #else + static inline void bcma_core_mips_init(struct bcma_drv_mips *mcore) { } + static inline void bcma_core_mips_early_init(struct bcma_drv_mips *mcore) { } ++ ++static inline unsigned int bcma_core_irq(struct bcma_device *core) ++{ ++ return 0; ++} + #endif + + extern u32 bcma_cpu_clock(struct bcma_drv_mips *mcore); + +-extern unsigned int bcma_core_irq(struct bcma_device *core); +- + #endif /* LINUX_BCMA_DRIVER_MIPS_H_ */ diff --git a/target/linux/brcm47xx/patches-3.6/251-ssb-add-gpio_to_irq.patch b/target/linux/brcm47xx/patches-3.6/251-ssb-add-gpio_to_irq.patch new file mode 100644 index 0000000000..788d4b1d2c --- /dev/null +++ b/target/linux/brcm47xx/patches-3.6/251-ssb-add-gpio_to_irq.patch @@ -0,0 +1,66 @@ +--- a/drivers/ssb/driver_gpio.c ++++ b/drivers/ssb/driver_gpio.c +@@ -74,6 +74,16 @@ static void ssb_gpio_chipco_free(struct + ssb_chipco_gpio_pullup(&bus->chipco, 1 << gpio, 0); + } + ++static int ssb_gpio_chipco_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ struct ssb_bus *bus = ssb_gpio_get_bus(chip); ++ ++ if (bus->bustype == SSB_BUSTYPE_SSB) ++ return ssb_mips_irq(bus->chipco.dev) + 2; ++ else ++ return -EINVAL; ++} ++ + static int ssb_gpio_chipco_init(struct ssb_bus *bus) + { + struct gpio_chip *chip = &bus->gpio; +@@ -86,6 +96,7 @@ static int ssb_gpio_chipco_init(struct s + chip->set = ssb_gpio_chipco_set_value; + chip->direction_input = ssb_gpio_chipco_direction_input; + chip->direction_output = ssb_gpio_chipco_direction_output; ++ chip->to_irq = ssb_gpio_chipco_to_irq; + chip->ngpio = 16; + /* There is just one SoC in one device and its GPIO addresses should be + * deterministic to address them more easily. The other buses could get +@@ -134,6 +145,16 @@ static int ssb_gpio_extif_direction_outp + return 0; + } + ++static int ssb_gpio_extif_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ struct ssb_bus *bus = ssb_gpio_get_bus(chip); ++ ++ if (bus->bustype == SSB_BUSTYPE_SSB) ++ return ssb_mips_irq(bus->extif.dev) + 2; ++ else ++ return -EINVAL; ++} ++ + static int ssb_gpio_extif_init(struct ssb_bus *bus) + { + struct gpio_chip *chip = &bus->gpio; +@@ -144,6 +165,7 @@ static int ssb_gpio_extif_init(struct ss + chip->set = ssb_gpio_extif_set_value; + chip->direction_input = ssb_gpio_extif_direction_input; + chip->direction_output = ssb_gpio_extif_direction_output; ++ chip->to_irq = ssb_gpio_extif_to_irq; + chip->ngpio = 5; + /* There is just one SoC in one device and its GPIO addresses should be + * deterministic to address them more easily. The other buses could get +--- a/include/linux/ssb/ssb_driver_mips.h ++++ b/include/linux/ssb/ssb_driver_mips.h +@@ -45,6 +45,11 @@ void ssb_mipscore_init(struct ssb_mipsco + { + } + ++static inline unsigned int ssb_mips_irq(struct ssb_device *dev) ++{ ++ return 0; ++} ++ + #endif /* CONFIG_SSB_DRIVER_MIPS */ + + #endif /* LINUX_SSB_MIPSCORE_H_ */ -- 2.25.1