From 9f35688349cf019ce4f85c81d7ec1a34d865dcc4 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 23 Aug 2017 13:31:08 +0200 Subject: [PATCH] sunxi: usb_phy: invert the USB phy_ctl condition All the new SoCs from Allwinner since the A33 have had the phy_ctl offset at 0x410 instead of 0x404 that was used on the previous SoCs. Instead of adding more and more special cases as the number of SoCs grow, let's invert the test to have 0x410 by default, and the (hopefully) fixed number of old SoCs being the exception. Suggested-by: Siarhei Siamashka Suggested-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard Reviewed-by: Jagan Teki --- arch/arm/mach-sunxi/usb_phy.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-sunxi/usb_phy.c b/arch/arm/mach-sunxi/usb_phy.c index 9bf0b5633d..2f1cad1aad 100644 --- a/arch/arm/mach-sunxi/usb_phy.c +++ b/arch/arm/mach-sunxi/usb_phy.c @@ -18,12 +18,18 @@ #include #include -#define SUNXI_USB_PMU_IRQ_ENABLE 0x800 -#ifdef CONFIG_MACH_SUN8I_A33 -#define SUNXI_USB_CSR 0x410 -#else +#if defined(CONFIG_MACH_SUN4I) || \ + defined(CONFIG_MACH_SUN5I) || \ + defined(CONFIG_MACH_SUN6I) || \ + defined(CONFIG_MACH_SUN7I) || \ + defined(CONFIG_MACH_SUN8I_A23) || \ + defined(CONFIG_MACH_SUN9I) #define SUNXI_USB_CSR 0x404 +#else +#define SUNXI_USB_CSR 0x410 #endif + +#define SUNXI_USB_PMU_IRQ_ENABLE 0x800 #define SUNXI_USB_PASSBY_EN 1 #define SUNXI_EHCI_AHB_ICHR8_EN (1 << 10) -- 2.25.1