From 9cb5eaf2cfb7ceb267fc10c743b69a57a1141bf7 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Sat, 20 May 2017 05:49:27 +0530 Subject: [PATCH] ARM: k2g: Fix passing main pll info for higher speeds Main pll is marked as arm plls for higher speeds. Fix this. Signed-off-by: Lokesh Vutla --- board/ti/ks2_evm/board_k2g.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/board/ti/ks2_evm/board_k2g.c b/board/ti/ks2_evm/board_k2g.c index 21aec8f065..f0bd31d6f7 100644 --- a/board/ti/ks2_evm/board_k2g.c +++ b/board/ti/ks2_evm/board_k2g.c @@ -79,29 +79,29 @@ static struct pll_init_data main_pll_config[MAX_SYSCLK][NUM_SPDS] = { [SPD400] = {MAIN_PLL, 125, 3, 2}, [SPD600] = {MAIN_PLL, 125, 2, 2}, [SPD800] = {MAIN_PLL, 250, 3, 2}, - [SPD900] = {TETRIS_PLL, 187, 2, 2}, - [SPD1000] = {TETRIS_PLL, 104, 1, 2}, + [SPD900] = {MAIN_PLL, 187, 2, 2}, + [SPD1000] = {MAIN_PLL, 104, 1, 2}, }, [SYSCLK_24MHz] = { [SPD400] = {MAIN_PLL, 100, 3, 2}, [SPD600] = {MAIN_PLL, 300, 6, 2}, [SPD800] = {MAIN_PLL, 200, 3, 2}, - [SPD900] = {TETRIS_PLL, 75, 1, 2}, - [SPD1000] = {TETRIS_PLL, 250, 3, 2}, + [SPD900] = {MAIN_PLL, 75, 1, 2}, + [SPD1000] = {MAIN_PLL, 250, 3, 2}, }, [SYSCLK_25MHz] = { [SPD400] = {MAIN_PLL, 32, 1, 2}, [SPD600] = {MAIN_PLL, 48, 1, 2}, [SPD800] = {MAIN_PLL, 64, 1, 2}, - [SPD900] = {TETRIS_PLL, 72, 1, 2}, - [SPD1000] = {TETRIS_PLL, 80, 1, 2}, + [SPD900] = {MAIN_PLL, 72, 1, 2}, + [SPD1000] = {MAIN_PLL, 80, 1, 2}, }, [SYSCLK_26MHz] = { [SPD400] = {MAIN_PLL, 400, 13, 2}, [SPD600] = {MAIN_PLL, 230, 5, 2}, [SPD800] = {MAIN_PLL, 123, 2, 2}, - [SPD900] = {TETRIS_PLL, 69, 1, 2}, - [SPD1000] = {TETRIS_PLL, 384, 5, 2}, + [SPD900] = {MAIN_PLL, 69, 1, 2}, + [SPD1000] = {MAIN_PLL, 384, 5, 2}, }, }; -- 2.25.1