From 9b48d9a61ab55de594d49eab0f4d8b0d9686cb4d Mon Sep 17 00:00:00 2001 From: Piotr Dymacz Date: Mon, 3 Feb 2014 23:41:36 +0100 Subject: [PATCH] Info about Dragino 2 in README --- README.md | 2 ++ READMEPL.md | 2 ++ 2 files changed, 4 insertions(+) diff --git a/README.md b/README.md index 097520b..2079bbb 100644 --- a/README.md +++ b/README.md @@ -63,6 +63,7 @@ Currently supported devices: - TP-Link TL-WR740N v4 (and similar, like TL-WR741ND v4) - TP-Link TL-MR3220 v2 - GS-Oolite/Elink EL-M150 module with dev board ([photos in my gallery](http://galeria.tech-blog.pl/Elink_EL-M150_Development-Board/)) + - Dragino 2 (MS14) - **Atheros AR1311 (similar to AR9331)** - D-Link DIR-505 H/W ver. A1 ([photos in my gallery](http://galeria.tech-blog.pl/D-Link_DIR-505/)) @@ -95,6 +96,7 @@ More information about supported devices: | [TP-Link TL-WR740N v4](http://wiki.openwrt.org/toh/tp-link/tl-wr740n) | AR9331 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | | [TP-Link TL-MR3220 v2](http://wiki.openwrt.org/toh/tp-link/tl-mr3420) | AR9331 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | | GS-Oolite/Elink EL-M150 module | AR9331 | 4/8/16 MiB | 64 MiB DDR2 | 64 KiB, LZMA | RO | +| [Dragino 2 (MS14)](http://wiki.openwrt.org/toh/dragino/ms14) | AR9331 | 16 MiB | 64 MiB DDR1 | 192 KiB | R/W | | [TP-Link TL-MR3420 v2](http://wikidevi.com/wiki/TP-LINK_TL-MR3420_v2) | AR9341 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | | [TP-Link TL-WR841N/D v8](http://wiki.openwrt.org/toh/tp-link/tl-wr841nd) | AR9341 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | | [TP-Link TL-WA830RE v2](http://wikidevi.com/wiki/TP-LINK_TL-WA830RE_v2) | AR9341 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | diff --git a/READMEPL.md b/READMEPL.md index e24a800..d8ccf62 100644 --- a/READMEPL.md +++ b/READMEPL.md @@ -61,6 +61,7 @@ Lista obecnie wspieranych urządzeń: - TP-Link TL-WR740N v4 (i podobne, jak na przykład TL-WR741ND v4) - TP-Link TL-MR3220 v2 - Moduł GS-Oolite/Elink EL-M150 na płytce developerskiej ([zdjęcia w mojej galerii](http://galeria.tech-blog.pl/Elink_EL-M150_Development-Board/)) + - Dragino 2 (MS14) - **Atheros AR1311 (bliźniaczy układ AR9331)** - D-Link DIR-505 H/W ver. A1 ([zdjęcia w mojej galerii](http://galeria.tech-blog.pl/D-Link_DIR-505/)) @@ -93,6 +94,7 @@ Dodatkowe informacje o wspieranych urządzeniach: | [TP-Link TL-WR740N v4](http://wiki.openwrt.org/toh/tp-link/tl-wr740n) | AR9331 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | | [TP-Link TL-MR3220 v2](http://wiki.openwrt.org/toh/tp-link/tl-mr3420) | AR9331 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | | GS-Oolite/Elink EL-M150 module | AR9331 | 4/8/16 MiB | 64 MiB DDR2 | 64 KiB, LZMA | RO | +| [Dragino 2 (MS14)](http://wiki.openwrt.org/toh/dragino/ms14) | AR9331 | 16 MiB | 64 MiB DDR1 | 192 KiB | R/W | | [TP-Link TL-MR3420 v2](http://wikidevi.com/wiki/TP-LINK_TL-MR3420_v2) | AR9341 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | | [TP-Link TL-WR841N/D v8](http://wiki.openwrt.org/toh/tp-link/tl-wr841nd) | AR9341 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | | [TP-Link TL-WA830RE v2](http://wikidevi.com/wiki/TP-LINK_TL-WA830RE_v2) | AR9341 | 4 MiB | 32 MiB DDR1 | 64 KiB, LZMA | RO | -- 2.25.1