From 96aaa780922fe95aec5c882fdb15bad776bad0d3 Mon Sep 17 00:00:00 2001 From: Piotr Dymacz Date: Tue, 28 Apr 2015 15:10:57 +0200 Subject: [PATCH] Remove unused, old UART driver and clean Makefile in cpu/mips/ar7240 --- u-boot/cpu/mips/ar7240/Makefile | 2 - u-boot/cpu/mips/ar7240/hornet_serial.c | 172 ------------------------- 2 files changed, 174 deletions(-) delete mode 100644 u-boot/cpu/mips/ar7240/hornet_serial.c diff --git a/u-boot/cpu/mips/ar7240/Makefile b/u-boot/cpu/mips/ar7240/Makefile index c231c74..2b121bc 100644 --- a/u-boot/cpu/mips/ar7240/Makefile +++ b/u-boot/cpu/mips/ar7240/Makefile @@ -3,12 +3,10 @@ include $(TOPDIR)/config.mk LIB = lib$(SOC).a START = -#OBJS = ar7240_serial.o ag7240.o ar7240_flash.o meminit.o OBJS = meminit.o ifeq ($(BOARD), ap121) -#OBJS += hornet_serial.o OBJS += ar933x_serial.o OBJS += ar933x_clocks.o SOBJS += hornet_ddr_init.o diff --git a/u-boot/cpu/mips/ar7240/hornet_serial.c b/u-boot/cpu/mips/ar7240/hornet_serial.c deleted file mode 100644 index 436ee07..0000000 --- a/u-boot/cpu/mips/ar7240/hornet_serial.c +++ /dev/null @@ -1,172 +0,0 @@ -#include -#include -#include -#include - -#define uart_reg_read(x) ar7240_reg_rd( (AR7240_UART_BASE+x) ) -#define uart_reg_write(x, y) ar7240_reg_wr( (AR7240_UART_BASE+x), y) - -static int AthrUartGet(char *__ch_data){ - u32 rdata; - - rdata = uart_reg_read(UARTDATA_ADDRESS); - - if(UARTDATA_UARTRXCSR_GET(rdata)){ - *__ch_data = (char)UARTDATA_UARTTXRXDATA_GET(rdata); - rdata = UARTDATA_UARTRXCSR_SET(1); - uart_reg_write(UARTDATA_ADDRESS, rdata); - return(1); - } else { - return(0); - } -} - -static void AthrUartPut(char __ch_data){ - u32 rdata; - - do { - rdata = uart_reg_read(UARTDATA_ADDRESS); - } while(UARTDATA_UARTTXCSR_GET(rdata) == 0); - - rdata = UARTDATA_UARTTXRXDATA_SET((u32)__ch_data); - rdata |= UARTDATA_UARTTXCSR_SET(1); - - uart_reg_write(UARTDATA_ADDRESS, rdata); -} - -/* - * Get CPU, RAM and AHB clocks - * Based on: Linux/arch/mips/ath79/clock.c - */ -void ar7240_sys_frequency(u32 *cpu_freq, u32 *ddr_freq, u32 *ahb_freq){ - u32 ref_rate, clock_ctrl, cpu_config, pll, temp; - - // determine reference clock (25 or 40 MHz) - temp = ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS); - - if(temp & HORNET_BOOTSTRAP_SEL_25M_40M_MASK){ - ref_rate = 40000000; - } else { - ref_rate = 25000000; - } - - // read CPU CLock Control Register (CLOCK_CONTROL) value - clock_ctrl = ar7240_reg_rd(AR7240_CPU_CLOCK_CONTROL); - - if(clock_ctrl & HORNET_CLOCK_CONTROL_BYPASS_MASK){ - // PLL is bypassed, so all clocks are == reference clock - *cpu_freq = ref_rate; - *ddr_freq = ref_rate; - *ahb_freq = ref_rate; - } else { - // read CPU PLL Configuration register (CPU_PLL_CONFIG) value - cpu_config = ar7240_reg_rd(AR7240_CPU_PLL_CONFIG); - - // REFDIV - temp = (cpu_config & HORNET_PLL_CONFIG_REFDIV_MASK) >> HORNET_PLL_CONFIG_REFDIV_SHIFT; - pll = ref_rate / temp; - - // DIV_INT (multiplier) - temp = (cpu_config & HORNET_PLL_CONFIG_NINT_MASK) >> HORNET_PLL_CONFIG_NINT_SHIFT; - pll *= temp; - - // OUTDIV - temp = (cpu_config & HORNET_PLL_CONFIG_OUTDIV_MASK) >> HORNET_PLL_CONFIG_OUTDIV_SHIFT; - - if(temp == 0){ // value 0 is not allowed - temp = 1; - } - - pll >>= temp; - - // CPU clock divider - temp = ((clock_ctrl & HORNET_CLOCK_CONTROL_CPU_POST_DIV_MASK) >> HORNET_CLOCK_CONTROL_CPU_POST_DIV_SHIFT) + 1; - *cpu_freq = pll / temp; - - // DDR clock divider - temp = ((clock_ctrl & HORNET_CLOCK_CONTROL_DDR_POST_DIV_MASK) >> HORNET_CLOCK_CONTROL_DDR_POST_DIV_SFIFT) + 1; - *ddr_freq = pll / temp; - - // AHB clock divider - temp = ((clock_ctrl & HORNET_CLOCK_CONTROL_AHB_POST_DIV_MASK) >> HORNET_CLOCK_CONTROL_AHB_POST_DIV_SFIFT) + 1; - *ahb_freq = pll / temp; - } -} - -int serial_init(void){ - u32 rdata; - u32 baudRateDivisor, clock_step; - u32 fcEnable = 0; - - /* GPIO Configuration */ - ar7240_reg_wr(AR7240_GPIO_OE, 0xcff); - rdata = ar7240_reg_rd(AR7240_GPIO_OUT); - rdata |= 0x400; // GPIO 10 (UART_SOUT) must output 1 - ar7240_reg_wr(AR7240_GPIO_OUT, rdata); - - rdata = ar7240_reg_rd(AR7240_GPIO_FUNC); - /* GPIO_FUN, bit1/UART_EN, bit2/UART_RTS_CTS_EN, bit15(disable_s26_uart) */ - rdata |= (0x3 << 1) | (0x1 << 15); - ar7240_reg_wr(AR7240_GPIO_FUNC, rdata); - - /* Get reference clock rate, then set baud rate to 115200 */ - rdata = ar7240_reg_rd(HORNET_BOOTSTRAP_STATUS); - rdata &= HORNET_BOOTSTRAP_SEL_25M_40M_MASK; - - if(rdata){ - baudRateDivisor = (40000000 / (16 * 115200)) - 1; // 40 MHz clock is taken as UART clock - } else { - baudRateDivisor = (25000000 / (16 * 115200)) - 1; // 25 MHz clock is taken as UART clock - } - - clock_step = 8192; - - rdata = UARTCLOCK_UARTCLOCKSCALE_SET(baudRateDivisor) | UARTCLOCK_UARTCLOCKSTEP_SET(clock_step); - uart_reg_write(UARTCLOCK_ADDRESS, rdata); - - /* Config Uart Controller */ - /* No interrupt */ - rdata = UARTCS_UARTDMAEN_SET(0) | UARTCS_UARTHOSTINTEN_SET(0) | UARTCS_UARTHOSTINT_SET(0) | UARTCS_UARTSERIATXREADY_SET(0) | UARTCS_UARTTXREADYORIDE_SET(~fcEnable) | UARTCS_UARTRXREADYORIDE_SET(~fcEnable) | UARTCS_UARTHOSTINTEN_SET(0); - - /* is_dte == 1 */ - rdata = rdata | UARTCS_UARTINTERFACEMODE_SET(2); - - if (fcEnable) { - rdata = rdata | UARTCS_UARTFLOWCONTROLMODE_SET(2); - } - - /* invert_fc ==0 (Inverted Flow Control) */ - //rdata = rdata | UARTCS_UARTFLOWCONTROLMODE_SET(3); - /* parityEnable == 0 */ - //rdata = rdata | UARTCS_UARTPARITYMODE_SET(2); -->Parity Odd - //rdata = rdata | UARTCS_UARTPARITYMODE_SET(3); -->Parity Even - uart_reg_write(UARTCS_ADDRESS, rdata); - - return 0; -} - -int serial_tstc(void){ - return(UARTDATA_UARTRXCSR_GET(uart_reg_read(UARTDATA_ADDRESS))); -} - -u8 serial_getc(void){ - char ch_data; - - while(!AthrUartGet(&ch_data)); - - return((u8)ch_data); -} - -void serial_putc(u8 byte){ - if (byte == '\n'){ - AthrUartPut('\r'); - } - - AthrUartPut((char)byte); -} - -void serial_puts(const char *s){ - while(*s){ - serial_putc(*s++); - } -} -- 2.25.1