From 96782c63d3bd4067623895b8691ed2823c715f1d Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 9 Oct 2005 00:22:48 +0200 Subject: [PATCH] Cleanup warnings for cpu/arm720t & cpu/arm1136 files. sed the linker scripts, rather than pre-process them. Patch by Peter Pearse, 07 Oct 2005 --- CHANGELOG | 4 + MAINTAINERS | 2 +- Makefile | 6 +- board/integratorap/lowlevel_init.S | 56 ++++----- board/integratorap/split_by_variant.sh | 112 ++++++++++-------- .../{u-boot.lds.S => u-boot.lds.template} | 8 +- board/integratorcp/lowlevel_init.S | 62 +++++----- board/integratorcp/split_by_variant.sh | 45 +++---- .../{u-boot.lds.S => u-boot.lds.template} | 8 +- board/versatile/split_by_variant.sh | 23 ++-- cpu/arm1136/cpu.c | 2 + cpu/arm1136/interrupts.c | 9 +- cpu/arm1136/start.S | 3 +- cpu/arm720t/interrupts.c | 6 +- 14 files changed, 182 insertions(+), 164 deletions(-) rename board/integratorap/{u-boot.lds.S => u-boot.lds.template} (89%) rename board/integratorcp/{u-boot.lds.S => u-boot.lds.template} (89%) diff --git a/CHANGELOG b/CHANGELOG index ce0a51f1e1..c340fc92c0 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,10 @@ Changes for U-Boot 1.1.4: ====================================================================== +* Cleanup warnings for cpu/arm720t & cpu/arm1136 files. + sed the linker scripts, rather than pre-process them. + Patch by Peter Pearse, 07 Oct 2005 + * Update make target for ARM supported boards. Use lowlevel_init() instead of platformsetup() [rename]. Patch by Peter Pearse, 06 Oct 2005 diff --git a/MAINTAINERS b/MAINTAINERS index a9d433d8b8..b889195b9f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -250,7 +250,7 @@ Frank Panno Peter Pearse integratorcp All current ARM supplied & - supported core modules + supported core modules - see http://www.arm.com /products/DevTools /Hardware_Platforms.html diff --git a/Makefile b/Makefile index a48a967626..86cb6a8052 100644 --- a/Makefile +++ b/Makefile @@ -1409,7 +1409,7 @@ ap720t_config \ ap920t_config \ ap926ejs_config \ ap946es_config: unconfig - @board/integratorap/split_by_variant.sh $@ $(CC) + @board/integratorap/split_by_variant.sh $@ integratorcp_config \ cp_config \ @@ -1421,7 +1421,7 @@ cp966_config \ cp922_config \ cp922_XA10_config \ cp1026_config: unconfig - @board/integratorcp/split_by_variant.sh $@ $(CC) + @board/integratorcp/split_by_variant.sh $@ kb9202_config : unconfig @./mkconfig $(@:_config=) arm arm920t kb9202 NULL at91rm9200 @@ -1520,7 +1520,7 @@ VCMA9_config : unconfig versatile_config \ versatileab_config \ versatilepb_config : unconfig - @board/versatile/split_by_variant.sh $@ $(CC) + @board/versatile/split_by_variant.sh $@ voiceblue_smallflash_config \ voiceblue_config: unconfig diff --git a/board/integratorap/lowlevel_init.S b/board/integratorap/lowlevel_init.S index 1aacbf4a7a..ab9589c95c 100644 --- a/board/integratorap/lowlevel_init.S +++ b/board/integratorap/lowlevel_init.S @@ -67,17 +67,17 @@ lowlevel_init: !defined (CONFIG_CM940T) #ifdef CONFIG_CM_MULTIPLE_SSRAM - /* set simple mapping */ + /* set simple mapping */ and r2,r2,#CMMASK_MAP_SIMPLE -#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */ +#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */ #ifdef CONFIG_CM_TCRAM - /* disable TCRAM */ + /* disable TCRAM */ and r2,r2,#CMMASK_TCRAM_DISABLE -#endif /* #ifdef CONFIG_CM_TCRAM */ +#endif /* #ifdef CONFIG_CM_TCRAM */ #if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \ - defined (CONFIG_CM1136JF_S) + defined (CONFIG_CM1136JF_S) and r2,r2,#CMMASK_LE @@ -89,7 +89,7 @@ lowlevel_init: #endif /* ARM102xxE value */ - /* read CM_INIT */ + /* read CM_INIT */ mov r0, #CM_BASE ldr r1, [r0, #OS_INIT] /* check against desired bit setting */ @@ -125,28 +125,28 @@ init_reg_OK: .globl dram_query dram_query: stmfd r13!,{r4-r6,lr} - /* set up SDRAM info */ + /* set up SDRAM info */ /* - based on example code from the CM User Guide */ mov r0, #CM_BASE readspdbit: - ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */ - and r1, r1, #0x20 /* mask SPD bit (5) */ - cmp r1, #0x20 /* test if set */ + ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */ + and r1, r1, #0x20 /* mask SPD bit (5) */ + cmp r1, #0x20 /* test if set */ bne readspdbit setupsdram: - add r0, r0, #OS_SPD /* address the copy of the SDP data */ - ldrb r1, [r0, #3] /* number of row address lines */ - ldrb r2, [r0, #4] /* number of column address lines */ - ldrb r3, [r0, #5] /* number of banks */ - ldrb r4, [r0, #31] /* module bank density */ - mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */ - mov r5, r5, ASL#2 /* size in MB */ - mov r0, #CM_BASE /* reload for later code */ - cmp r5, #0x10 /* is it 16MB? */ + add r0, r0, #OS_SPD /* address the copy of the SDP data */ + ldrb r1, [r0, #3] /* number of row address lines */ + ldrb r2, [r0, #4] /* number of column address lines */ + ldrb r3, [r0, #5] /* number of banks */ + ldrb r4, [r0, #31] /* module bank density */ + mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */ + mov r5, r5, ASL#2 /* size in MB */ + mov r0, #CM_BASE /* reload for later code */ + cmp r5, #0x10 /* is it 16MB? */ bne not16 - mov r6, #0x2 /* store size and CAS latency of 2 */ + mov r6, #0x2 /* store size and CAS latency of 2 */ b writesize not16: @@ -197,17 +197,17 @@ cm_remap: orr r1, r1, #CMMASK_REMAP /* set remap and led bits */ str r1, [r0, #OS_CTRL] - /* Now 0x00000000 is writeable, replace the vectors */ - ldr r0, =_start /* r0 <- start of vectors */ - ldr r2, =_armboot_start /* r2 <- past vectors */ - sub r1,r1,r1 /* destination 0x00000000 */ + /* Now 0x00000000 is writeable, replace the vectors */ + ldr r0, =_start /* r0 <- start of vectors */ + ldr r2, =_armboot_start /* r2 <- past vectors */ + sub r1,r1,r1 /* destination 0x00000000 */ copy_vec: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ + ldmia r0!, {r3-r10} /* copy from source address [r0] */ + stmia r1!, {r3-r10} /* copy to target address [r1] */ + cmp r0, r2 /* until source end address [r2] */ ble copy_vec - ldmfd r13!,{r4-r10,pc} /* back to caller */ + ldmfd r13!,{r4-r10,pc} /* back to caller */ #endif /* #ifdef CONFIG_CM_REMAP */ diff --git a/board/integratorap/split_by_variant.sh b/board/integratorap/split_by_variant.sh index 1c5f0974ed..9f71babf35 100755 --- a/board/integratorap/split_by_variant.sh +++ b/board/integratorap/split_by_variant.sh @@ -2,105 +2,115 @@ # --------------------------------------------------------- # Set the platform defines # --------------------------------------------------------- -echo -n "/* Integrator configuration implied " > tmp.fil -echo " by Makefile target */" >> tmp.fil -echo -n "#define CONFIG_INTEGRATOR" >> tmp.fil -echo " /* Integrator board */" >> tmp.fil -echo -n "#define CONFIG_ARCH_INTEGRATOR" >> tmp.fil -echo " 1 /* Integrator/AP */" >> tmp.fil +echo -n "/* Integrator configuration implied " > tmp.fil +echo " by Makefile target */" >> tmp.fil +echo -n "#define CONFIG_INTEGRATOR" >> tmp.fil +echo " /* Integrator board */" >> tmp.fil +echo -n "#define CONFIG_ARCH_INTEGRATOR" >> tmp.fil +echo " 1 /* Integrator/AP */" >> tmp.fil # --------------------------------------------------------- -# Set the core module defines according to Core Module +# Set the core module defines according to Core Module # --------------------------------------------------------- -CC=${CROSS_COMPILE}gcc cpu="arm_intcm" - -if [ "$2" == "" ] -then - echo "$0:: No preprocessor parameter - using ${CROSS_COMPILE}gcc" -else - CC=$2 -fi - +variant="unknown core module" if [ "$1" == "" ] then - echo "$0:: No parameters - using ${CROSS_COMPILE}gcc arm_intcm" + echo "$0:: No parameters - using arm_intcm" else case "$1" in - ap7_config | \ - ap966_config | \ - ap922_config | \ + ap7_config) + cpu="arm_intcm" + variant="unported core module CM7TDMI" + ;; + + ap966) + cpu="arm_intcm" + variant="unported core module CM966E-S" + ;; + + ap922_config) + cpu="arm_intcm" + variant="unported core module CM922T" + ;; + integratorap_config | \ ap_config) cpu="arm_intcm" + variant="unspecified core module" ;; ap720t_config) cpu="arm720t" - echo -n "#define CONFIG_CM720T" >> tmp.fil - echo " 1 /* CPU core is ARM720T */ " >> tmp.fil + echo -n "#define CONFIG_CM720T" >> tmp.fil + echo " 1 /* CPU core is ARM720T */ " >> tmp.fil + variant="Core module CM720T" ;; ap922_XA10_config) - echo -n "#define CONFIG_CM922T_XA10" >> tmp.fil - echo " 1 /* CPU core is ARM922T_XA10 */" >> tmp.fil cpu="arm_intcm" + variant="unported core module CM922T_XA10" + echo -n "#define CONFIG_CM922T_XA10" >> tmp.fil + echo " 1 /* CPU core is ARM922T_XA10 */" >> tmp.fil ;; ap920t_config) cpu="arm920t" - echo -n "#define CONFIG_CM920T" >> tmp.fil - echo " 1 /* CPU core is ARM920T */" >> tmp.fil + variant="Core module CM920T" + echo -n "#define CONFIG_CM920T" >> tmp.fil + echo " 1 /* CPU core is ARM920T */" >> tmp.fil ;; ap926ejs_config) cpu="arm926ejs" - echo -n "#define CONFIG_CM926EJ_S" >> tmp.fil - echo " 1 /* CPU core is ARM926EJ-S */ " >> tmp.fil + variant="Core module CM926EJ-S" + echo -n "#define CONFIG_CM926EJ_S" >> tmp.fil + echo " 1 /* CPU core is ARM926EJ-S */ " >> tmp.fil ;; - ap946es_config) cpu="arm946es" - echo -n "#define CONFIG_CM946E_S" >> tmp.fil - echo " 1 /* CPU core is ARM946E-S */ " >> tmp.fil + variant="Core module CM946E-S" + echo -n "#define CONFIG_CM946E_S" >> tmp.fil + echo " 1 /* CPU core is ARM946E-S */ " >> tmp.fil ;; *) - echo "$0:: Unrecognised target - using arm_intcm" + echo "$0:: Unknown core module" + variant="unknown core module" cpu="arm_intcm" ;; esac - fi if [ "$cpu" == "arm_intcm" ] then echo "/* Core module undefined/not ported */" >> tmp.fil - echo "#define CONFIG_ARM_INTCM 1" >> tmp.fil - echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> tmp.fil - echo -n " /* CM may not have " >> tmp.fil - echo "multiple SSRAM mapping */" >> tmp.fil - echo -n "#undef CONFIG_CM_SPD_DETECT " >> tmp.fil - echo -n " /* CM may not support SPD " >> tmp.fil - echo "query */" >> tmp.fil - echo -n "#undef CONFIG_CM_REMAP " >> tmp.fil - echo -n " /* CM may not support " >> tmp.fil - echo "remapping */" >> tmp.fil - echo -n "#undef CONFIG_CM_INIT " >> tmp.fil - echo -n " /* CM may not have " >> tmp.fil - echo "initialization reg */" >> tmp.fil - echo -n "#undef CONFIG_CM_TCRAM " >> tmp.fil - echo " /* CM may not have TCRAM */" >> tmp.fil + echo "#define CONFIG_ARM_INTCM 1" >> tmp.fil + echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> tmp.fil + echo -n " /* CM may not have " >> tmp.fil + echo "multiple SSRAM mapping */" >> tmp.fil + echo -n "#undef CONFIG_CM_SPD_DETECT " >> tmp.fil + echo -n " /* CM may not support SPD " >> tmp.fil + echo "query */" >> tmp.fil + echo -n "#undef CONFIG_CM_REMAP " >> tmp.fil + echo -n " /* CM may not support " >> tmp.fil + echo "remapping */" >> tmp.fil + echo -n "#undef CONFIG_CM_INIT " >> tmp.fil + echo -n " /* CM may not have " >> tmp.fil + echo "initialization reg */" >> tmp.fil + echo -n "#undef CONFIG_CM_TCRAM " >> tmp.fil + echo " /* CM may not have TCRAM */" >> tmp.fil fi mv tmp.fil ./include/config.h # --------------------------------------------------------- -# Ensure correct core object loaded first in U-Boot image +# Ensure correct core object loaded first in U-Boot image # --------------------------------------------------------- -$CC -E -P -C -D CPU_FILE=cpu/$cpu/start.o \ --o board/integratorap/u-boot.lds board/integratorap/u-boot.lds.S +sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' board/integratorap/u-boot.lds.template > board/integratorap/u-boot.lds # --------------------------------------------------------- # Complete the configuration # --------------------------------------------------------- ./mkconfig -a integratorap arm $cpu integratorap; +echo "Variant:: $variant with core $cpu" + diff --git a/board/integratorap/u-boot.lds.S b/board/integratorap/u-boot.lds.template similarity index 89% rename from board/integratorap/u-boot.lds.S rename to board/integratorap/u-boot.lds.template index 486b5da27b..0ec8087258 100644 --- a/board/integratorap/u-boot.lds.S +++ b/board/integratorap/u-boot.lds.template @@ -20,8 +20,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -/* Preprocessed during configuration to emsure the core module processor code, - from CPU_FILE, is placed at the start of the image */ +# Template used during configuration to emsure the core module processor code, +# from CPU_FILE, is placed at the start of the image */ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) @@ -32,8 +32,8 @@ SECTIONS . = ALIGN(4); .text : { - CPU_FILE (.text) - *(.text) + CPU_FILE (.text) + *(.text) } .rodata : { *(.rodata) } . = ALIGN(4); diff --git a/board/integratorcp/lowlevel_init.S b/board/integratorcp/lowlevel_init.S index e679215f3f..18f7d2eaeb 100644 --- a/board/integratorcp/lowlevel_init.S +++ b/board/integratorcp/lowlevel_init.S @@ -63,22 +63,22 @@ lowlevel_init: orr r2,r2,#CMMASK_INIT_102 #else -#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \ - !defined (CONFIG_CM940T) - /* CMxx6 code */ +#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \ + !defined (CONFIG_CM940T) + /* CMxx6 code */ #ifdef CONFIG_CM_MULTIPLE_SSRAM - /* set simple mapping */ + /* set simple mapping */ and r2,r2,#CMMASK_MAP_SIMPLE -#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */ +#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */ #ifdef CONFIG_CM_TCRAM - /* disable TCRAM */ + /* disable TCRAM */ and r2,r2,#CMMASK_TCRAM_DISABLE -#endif /* #ifdef CONFIG_CM_TCRAM */ +#endif /* #ifdef CONFIG_CM_TCRAM */ #if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \ - defined (CONFIG_CM1136JF_S) + defined (CONFIG_CM1136JF_S) and r2,r2,#CMMASK_LE @@ -90,7 +90,7 @@ lowlevel_init: #endif /* ARM102xxE value */ - /* read CM_INIT */ + /* read CM_INIT */ mov r0, #CM_BASE ldr r1, [r0, #OS_INIT] /* check against desired bit setting */ @@ -121,33 +121,33 @@ init_reg_OK: #ifdef CONFIG_CM_SPD_DETECT /* Fast memory is available for the DRAM data * - ensure it has been transferred, then summarize the data - * into a CM register + * into a CM register */ .globl dram_query dram_query: stmfd r13!,{r4-r6,lr} - /* set up SDRAM info */ + /* set up SDRAM info */ /* - based on example code from the CM User Guide */ mov r0, #CM_BASE readspdbit: ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */ - and r1, r1, #0x20 /* mask SPD bit (5) */ - cmp r1, #0x20 /* test if set */ + and r1, r1, #0x20 /* mask SPD bit (5) */ + cmp r1, #0x20 /* test if set */ bne readspdbit setupsdram: - add r0, r0, #OS_SPD /* address the copy of the SDP data */ - ldrb r1, [r0, #3] /* number of row address lines */ - ldrb r2, [r0, #4] /* number of column address lines */ - ldrb r3, [r0, #5] /* number of banks */ - ldrb r4, [r0, #31] /* module bank density */ - mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */ - mov r5, r5, ASL#2 /* size in MB */ - mov r0, #CM_BASE /* reload for later code */ - cmp r5, #0x10 /* is it 16MB? */ + add r0, r0, #OS_SPD /* address the copy of the SDP data */ + ldrb r1, [r0, #3] /* number of row address lines */ + ldrb r2, [r0, #4] /* number of column address lines */ + ldrb r3, [r0, #5] /* number of banks */ + ldrb r4, [r0, #31] /* module bank density */ + mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */ + mov r5, r5, ASL#2 /* size in MB */ + mov r0, #CM_BASE /* reload for later code */ + cmp r5, #0x10 /* is it 16MB? */ bne not16 - mov r6, #0x2 /* store size and CAS latency of 2 */ + mov r6, #0x2 /* store size and CAS latency of 2 */ b writesize not16: @@ -198,17 +198,17 @@ cm_remap: orr r1, r1, #CMMASK_REMAP /* set remap and led bits */ str r1, [r0, #OS_CTRL] - /* Now 0x00000000 is writeable, replace the vectors */ - ldr r0, =_start /* r0 <- start of vectors */ - ldr r2, =_armboot_start /* r2 <- past vectors */ - sub r1,r1,r1 /* destination 0x00000000 */ + /* Now 0x00000000 is writeable, replace the vectors */ + ldr r0, =_start /* r0 <- start of vectors */ + ldr r2, =_armboot_start /* r2 <- past vectors */ + sub r1,r1,r1 /* destination 0x00000000 */ copy_vec: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ + ldmia r0!, {r3-r10} /* copy from source address [r0] */ + stmia r1!, {r3-r10} /* copy to target address [r1] */ + cmp r0, r2 /* until source end address [r2] */ ble copy_vec - ldmfd r13!,{r4-r10,pc} /* back to caller */ + ldmfd r13!,{r4-r10,pc} /* back to caller */ #endif /* #ifdef CONFIG_CM_REMAP */ diff --git a/board/integratorcp/split_by_variant.sh b/board/integratorcp/split_by_variant.sh index 6e21b7df63..3a354339d7 100755 --- a/board/integratorcp/split_by_variant.sh +++ b/board/integratorcp/split_by_variant.sh @@ -8,47 +8,48 @@ echo -n "#define CONFIG_INTEGRATOR" >> tmp.fil echo " /* Integrator board */" >> tmp.fil echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> tmp.fil echo " 1 /* Integrator/CP */" >> tmp.fil -# --------------------------------------------------------- -# Set the core module defines according to Core Module -# --------------------------------------------------------- -CC=${CROSS_COMPILE}gcc -cpu="arm_intcm" - -if [ "$2" == "" ] -then - echo "$0:: No preprocessor parameter - using ${CROSS_COMPILE}gcc" -else - CC=$2 -fi +cpu="arm_intcm" +variant="unknown core module" if [ "$1" == "" ] then - echo "$0:: No parameters - using ${CROSS_COMPILE}gcc arm_intcm" + echo "$0:: No parameters - using arm_intcm" else case "$1" in - cp966_config | \ - cp922_config | \ - cp1026_config | \ + ap966) + cpu="arm_intcm" + variant="unported core module CM966E-S" + ;; + + ap922_config) + cpu="arm_intcm" + variant="unported core module CM922T" + ;; + integratorcp_config | \ cp_config) cpu="arm_intcm" + variant="unspecified core module" ;; cp922_XA10_config) + cpu="arm_intcm" + variant="unported core module CM922T_XA10" echo -n "#define CONFIG_CM922T_XA10" >> tmp.fil echo " 1 /* CPU core is ARM922T_XA10 */" >> tmp.fil - cpu="arm_intcm" ;; cp920t_config) cpu="arm920t" + variant="Core module CM920T" echo -n "#define CONFIG_CM920T" >> tmp.fil echo " 1 /* CPU core is ARM920T */" >> tmp.fil ;; cp926ejs_config) cpu="arm926ejs" + variant="Core module CM926EJ-S" echo -n "#define CONFIG_CM926EJ_S" >> tmp.fil echo " 1 /* CPU core is ARM926EJ-S */ " >> tmp.fil ;; @@ -56,18 +57,21 @@ else cp946es_config) cpu="arm946es" + variant="Core module CM946E-S" echo -n "#define CONFIG_CM946E_S" >> tmp.fil echo " 1 /* CPU core is ARM946E-S */ " >> tmp.fil ;; cp1136_config) cpu="arm1136" + variant="Core module CM1136EJF-S" echo -n "#define CONFIG_CM1136EJF_S" >> tmp.fil echo " 1 /* CPU core is ARM1136JF-S */ " >> tmp.fil ;; *) - echo "$0:: Unrecognised target - using arm_intcm" + echo "$0:: Unknown core module" + variant="unknown core module" cpu="arm_intcm" ;; @@ -98,9 +102,10 @@ mv tmp.fil ./include/config.h # --------------------------------------------------------- # Ensure correct core object loaded first in U-Boot image # --------------------------------------------------------- -$CC -E -P -C -D CPU_FILE=cpu/$cpu/start.o \ --o board/integratorcp/u-boot.lds board/integratorcp/u-boot.lds.S +sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' board/integratorcp/u-boot.lds.template > board/integratorcp/u-boot.lds # --------------------------------------------------------- # Complete the configuration # --------------------------------------------------------- ./mkconfig -a integratorcp arm $cpu integratorcp; +echo "Variant:: $variant with core $cpu" + diff --git a/board/integratorcp/u-boot.lds.S b/board/integratorcp/u-boot.lds.template similarity index 89% rename from board/integratorcp/u-boot.lds.S rename to board/integratorcp/u-boot.lds.template index 486b5da27b..0ec8087258 100644 --- a/board/integratorcp/u-boot.lds.S +++ b/board/integratorcp/u-boot.lds.template @@ -20,8 +20,8 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ -/* Preprocessed during configuration to emsure the core module processor code, - from CPU_FILE, is placed at the start of the image */ +# Template used during configuration to emsure the core module processor code, +# from CPU_FILE, is placed at the start of the image */ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) @@ -32,8 +32,8 @@ SECTIONS . = ALIGN(4); .text : { - CPU_FILE (.text) - *(.text) + CPU_FILE (.text) + *(.text) } .rodata : { *(.rodata) } . = ALIGN(4); diff --git a/board/versatile/split_by_variant.sh b/board/versatile/split_by_variant.sh index ea705da1c6..35c663e6a5 100755 --- a/board/versatile/split_by_variant.sh +++ b/board/versatile/split_by_variant.sh @@ -2,26 +2,17 @@ # --------------------------------------------------------- # Set the core module defines according to Core Module # --------------------------------------------------------- -CC=${CROSS_COMPILE}gcc -config="versatilepb_config" - -if [ "$2" == "" ] -then - echo "$0:: No preprocessor parameter - using ${CROSS_COMPILE}gcc" -else - CC=$2 -fi - - # --------------------------------------------------------- # Set up the Versatile type define # --------------------------------------------------------- +variant=PB926EJ-S if [ "$1" == "" ] then - echo "$0:: No parameters - using ${CROSS_COMPILE}gcc versatilepb_config" - + echo "$0:: No parameters - using versatilepb_config" + echo "#define CONFIG_ARCH_VERSATILE_PB" > ./include/config.h + variant=PB926EJ-S else - case "$config" in + case "$1" in versatilepb_config | \ versatile_config) echo "#define CONFIG_ARCH_VERSATILE_PB" > ./include/config.h @@ -29,11 +20,14 @@ else versatileab_config) echo "#define CONFIG_ARCH_VERSATILE_AB" > ./include/config.h + variant=AB926EJ-S ;; *) echo "$0:: Unrecognised config - using versatilepb_config" + echo "#define CONFIG_ARCH_VERSATILE_PB" > ./include/config.h + variant=PB926EJ-S ;; esac @@ -43,3 +37,4 @@ fi # Complete the configuration # --------------------------------------------------------- ./mkconfig -a versatile arm arm926ejs versatile +echo "Variant:: $variant" diff --git a/cpu/arm1136/cpu.c b/cpu/arm1136/cpu.c index 7fa5ddcac6..85a48491b3 100644 --- a/cpu/arm1136/cpu.c +++ b/cpu/arm1136/cpu.c @@ -33,7 +33,9 @@ #include #include +#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR) #include +#endif /* read co-processor 15, register #1 (control register) */ static unsigned long read_p15_c1 (void) diff --git a/cpu/arm1136/interrupts.c b/cpu/arm1136/interrupts.c index 6b1449e97a..1dc36d0344 100644 --- a/cpu/arm1136/interrupts.c +++ b/cpu/arm1136/interrupts.c @@ -33,7 +33,7 @@ #include #include -#if !defined(CONFIG_INTEGRATOR) || ! defined(CONFIG_ARCH_CINTEGRATOR) +#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR) # include #endif @@ -176,12 +176,13 @@ void do_irq (struct pt_regs *pt_regs) bad_mode (); } -static ulong timestamp; -static ulong lastinc; - #if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_CINTEGRATOR) /* Use the IntegratorCP function from board/integratorcp.c */ #else + +static ulong timestamp; +static ulong lastinc; + /* nothing really to do with interrupts, just starts up a counter. */ int interrupt_init (void) { diff --git a/cpu/arm1136/start.S b/cpu/arm1136/start.S index 05c9128d84..17c7a83491 100644 --- a/cpu/arm1136/start.S +++ b/cpu/arm1136/start.S @@ -30,8 +30,9 @@ #include #include +#if !defined(CONFIG_INTEGRATOR) && ! defined(CONFIG_ARCH_CINTEGRATOR) #include - +#endif .globl _start _start: b reset ldr pc, _undefined_instruction diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c index 575d923a37..da62502d61 100644 --- a/cpu/arm720t/interrupts.c +++ b/cpu/arm720t/interrupts.c @@ -218,13 +218,13 @@ static void timer_isr( void *data) { } #endif -static ulong timestamp; -static ulong lastdec; - #if defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR) /* Use IntegratorAP routines in board/integratorap.c */ #else +static ulong timestamp; +static ulong lastdec; + int interrupt_init (void) { -- 2.25.1