From 91139e913b25aa492d0b145ccbc2ace597bfc52e Mon Sep 17 00:00:00 2001 From: John Audia Date: Wed, 7 Dec 2022 04:02:49 -0500 Subject: [PATCH] kernel: add symbol in generic config for 5.10.157 Add CONFIG_INET_TABLE_PERTURB_ORDER=16 to generic config Signed-off-by: John Audia (cherry picked from commit f83a8329a33ee19060c9e28771434309ef55915d) --- .gitignore | 4 + include/version.mk | 2 +- package/boot/uboot-rockchip/Makefile | 13 +- .../patches/102-add-tpe-r1400.patch | 527 ++++++++++++++++++ .../of-platdata/tpe-r1400-rk3328/dt-decl.h | 23 + .../of-platdata/tpe-r1400-rk3328/dt-plat.c | 155 ++++++ .../tpe-r1400-rk3328/dt-structs-gen.h | 51 ++ .../dts/ar9330_thinkpenguin_tpe-r1100.dts | 150 +++++ .../dts/qca9531_thinkpenguin_tpe-r1300.dts | 15 + target/linux/ath79/image/generic.mk | 20 + target/linux/generic/config-5.10 | 1 + .../armv8/base-files/etc/board.d/01_leds | 3 +- .../armv8/base-files/etc/board.d/02_network | 4 +- target/linux/rockchip/image/armv8.mk | 10 + .../linux/rockchip/image/tpe-r1400.bootscript | 8 + .../patches-5.10/107-add-tpe-r1400.patch | 426 ++++++++++++++ 16 files changed, 1408 insertions(+), 4 deletions(-) create mode 100644 package/boot/uboot-rockchip/patches/102-add-tpe-r1400.patch create mode 100644 package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-decl.h create mode 100644 package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-plat.c create mode 100644 package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-structs-gen.h create mode 100644 target/linux/ath79/dts/ar9330_thinkpenguin_tpe-r1100.dts create mode 100644 target/linux/ath79/dts/qca9531_thinkpenguin_tpe-r1300.dts create mode 100644 target/linux/rockchip/image/tpe-r1400.bootscript create mode 100644 target/linux/rockchip/patches-5.10/107-add-tpe-r1400.patch diff --git a/.gitignore b/.gitignore index 7025757407..fb2b8e2715 100644 --- a/.gitignore +++ b/.gitignore @@ -32,3 +32,7 @@ git-src *.po~ /package/luci/modules/luci-base/src/po2lmo /package/luci/modules/luci-base/src/jsmin +/scripts/config/conf +/scripts/config/mconf +/scripts/config/mconf-cfg +/scripts/config/mconf_check diff --git a/include/version.mk b/include/version.mk index 441d669a55..0ee5c8a54e 100644 --- a/include/version.mk +++ b/include/version.mk @@ -23,7 +23,7 @@ PKG_CONFIG_DEPENDS += \ sanitize = $(call tolower,$(subst _,-,$(subst $(space),-,$(1)))) VERSION_NUMBER:=$(call qstrip,$(CONFIG_VERSION_NUMBER)) -VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),v6.0-BETA0) +VERSION_NUMBER:=$(if $(VERSION_NUMBER),$(VERSION_NUMBER),v6.0) VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE)) VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION)) diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index b52c3c4481..7fd4d74dae 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -35,6 +35,16 @@ define U-Boot/nanopi-r2s-rk3328 OF_PLATDATA:=$(1) endef +define U-Boot/tpe-r1400-rk3328 + BUILD_SUBTARGET:=armv8 + NAME:=TPE-R1400 + BUILD_DEVICES:= \ + thinkpenguin_tpe-r1400 + DEPENDS:=+PACKAGE_u-boot-tpe-r1400-rk3328:arm-trusted-firmware-rockchip + PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip + ATF:=rk3328_bl31.elf + OF_PLATDATA:=$(1) +endef # RK3399 boards @@ -72,7 +82,8 @@ UBOOT_TARGETS := \ nanopi-r4s-rk3399 \ rock-pi-4-rk3399 \ rockpro64-rk3399 \ - nanopi-r2s-rk3328 + nanopi-r2s-rk3328 \ + tpe-r1400-rk3328 UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes diff --git a/package/boot/uboot-rockchip/patches/102-add-tpe-r1400.patch b/package/boot/uboot-rockchip/patches/102-add-tpe-r1400.patch new file mode 100644 index 0000000000..a5f03844a8 --- /dev/null +++ b/package/boot/uboot-rockchip/patches/102-add-tpe-r1400.patch @@ -0,0 +1,527 @@ +--- a/arch/arm/dts/Makefile ++++ b/arch/arm/dts/Makefile +@@ -109,6 +109,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3308) += \ + dtb-$(CONFIG_ROCKCHIP_RK3328) += \ + rk3328-evb.dtb \ + rk3328-nanopi-r2s.dtb \ ++ rk3328-tpe-r1400.dtb \ + rk3328-roc-cc.dtb \ + rk3328-rock64.dtb \ + rk3328-rock-pi-e.dtb +--- /dev/null ++++ b/arch/arm/dts/rk3328-tpe-r1400-u-boot.dtsi +@@ -0,0 +1,40 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd ++ * (C) Copyright 2020 David Bauer ++ */ ++ ++#include "rk3328-u-boot.dtsi" ++#include "rk3328-sdram-ddr4-666.dtsi" ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; ++ }; ++}; ++ ++&gpio0 { ++ u-boot,dm-spl; ++}; ++ ++&pinctrl { ++ u-boot,dm-spl; ++}; ++ ++&sdmmc0m1_gpio { ++ u-boot,dm-spl; ++}; ++ ++&pcfg_pull_up_4ma { ++ u-boot,dm-spl; ++}; ++ ++/* Need this and all the pinctrl/gpio stuff above to set pinmux */ ++&vcc_sd { ++ u-boot,dm-spl; ++}; ++ ++&gmac2io { ++ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 10000 50000>; ++}; +--- /dev/null ++++ b/arch/arm/dts/rk3328-tpe-r1400.dts +@@ -0,0 +1,370 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 David Bauer ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328.dtsi" ++ ++/ { ++ model = "ThinkPenguin TPE-R1400"; ++ compatible = "thinkpenguin,tpe-r1400", "rockchip,rk3328"; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ pinctrl-0 = <&reset_button_pin>; ++ pinctrl-names = "default"; ++ ++ reset { ++ label = "reset"; ++ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ debounce-interval = <50>; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "tpe-r1400:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ label = "tpe-r1400:red:sys"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "tpe-r1400:green:wan"; ++ }; ++ }; ++ ++ vcc_io_sdio: sdmmcio-regulator { ++ compatible = "regulator-gpio"; ++ enable-active-high; ++ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&sdio_vcc_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_io_sdio"; ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-settling-time-us = <5000>; ++ regulator-type = "voltage"; ++ startup-delay-us = <2000>; ++ states = <1800000 0x1 ++ 3300000 0x0>; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_gpio>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ rx_delay = <0x18>; ++ snps,aal; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ compatible = "ethernet-phy-id001c.c915", ++ "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_sdio>; ++ vccio4-supply = <&vcc_18>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ button { ++ reset_button_pin: reset-button-pin { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ ethernet-phy { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sd { ++ sdio_vcc_pin: sdio-vcc-pin { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_sd>; ++ vqmmc-supply = <&vcc_io_sdio>; ++ status = "okay"; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; +--- /dev/null ++++ b/configs/tpe-r1400-rk3328_defconfig +@@ -0,0 +1,98 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SYS_TEXT_BASE=0x00200000 ++CONFIG_SPL_GPIO_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_OFFSET=0x3F8000 ++CONFIG_DEFAULT_DEVICE_TREE="rk3328-tpe-r1400" ++CONFIG_ROCKCHIP_RK3328=y ++CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y ++CONFIG_TPL_LIBCOMMON_SUPPORT=y ++CONFIG_TPL_LIBGENERIC_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_SPL_STACK_R_ADDR=0x600000 ++CONFIG_DEBUG_UART_BASE=0xFF130000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART=y ++CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 ++# CONFIG_ANDROID_BOOT_IMAGE is not set ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-tpe-r1400.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_DISPLAY_BOARDINFO_LATE=y ++CONFIG_MISC_INIT_R=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_TPL_SYS_MALLOC_SIMPLE=y ++CONFIG_SPL_STACK_R=y ++CONFIG_SPL_I2C_SUPPORT=y ++CONFIG_SPL_POWER_SUPPORT=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TIME=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_TPL_OF_CONTROL=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_TPL_OF_PLATDATA=y ++CONFIG_ENV_IS_IN_MMC=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_TPL_DM=y ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_TPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_TPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_FASTBOOT_BUF_ADDR=0x800800 ++CONFIG_FASTBOOT_CMD_OEM_FORMAT=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_DM_ETH=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_SPL_DM_REGULATOR=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_SPL_DM_REGULATOR_FIXED=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_DM_RESET=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYSINFO=y ++CONFIG_SYSRESET=y ++# CONFIG_TPL_SYSRESET is not set ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC2=y ++CONFIG_USB_DWC3=y ++# CONFIG_USB_DWC3_GADGET is not set ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_TPL_TINY_MEMSET=y ++CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-decl.h b/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-decl.h new file mode 100644 index 0000000000..0919e4ed53 --- /dev/null +++ b/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-decl.h @@ -0,0 +1,23 @@ +/* + * DO NOT MODIFY + * + * Declares externs for all device/uclass instances. + * This was generated by dtoc from a .dtb (device tree binary) file. + */ + +#include +#include + +/* driver declarations - these allow DM_DRIVER_GET() to be used */ +extern U_BOOT_DRIVER(rockchip_rk3328_cru); +extern U_BOOT_DRIVER(rockchip_rk3328_dmc); +extern U_BOOT_DRIVER(rockchip_rk3288_dw_mshc); +extern U_BOOT_DRIVER(ns16550_serial); +extern U_BOOT_DRIVER(rockchip_rk3328_grf); + +/* uclass driver declarations - needed for DM_UCLASS_DRIVER_REF() */ +extern UCLASS_DRIVER(clk); +extern UCLASS_DRIVER(mmc); +extern UCLASS_DRIVER(ram); +extern UCLASS_DRIVER(serial); +extern UCLASS_DRIVER(syscon); diff --git a/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-plat.c b/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-plat.c new file mode 100644 index 0000000000..e5b330c9d9 --- /dev/null +++ b/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-plat.c @@ -0,0 +1,155 @@ +/* + * DO NOT MODIFY + * + * Declares the U_BOOT_DRIVER() records and platform data. + * This was generated by dtoc from a .dtb (device tree binary) file. + */ + +/* Allow use of U_BOOT_DRVINFO() in this file */ +#define DT_PLAT_C + +#include +#include +#include + +/* + * driver_info declarations, ordered by 'struct driver_info' linker_list idx: + * + * idx driver_info driver + * --- -------------------- -------------------- + * 0: clock_controller_at_ff440000 rockchip_rk3328_cru + * 1: dmc rockchip_rk3328_dmc + * 2: mmc_at_ff500000 rockchip_rk3288_dw_mshc + * 3: serial_at_ff130000 ns16550_serial + * 4: syscon_at_ff100000 rockchip_rk3328_grf + * --- -------------------- -------------------- + */ + +/* + * Node /clock-controller@ff440000 index 0 + * driver rockchip_rk3328_cru parent None + */ +static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = { + .reg = {0xff440000, 0x1000}, + .rockchip_grf = 0x3a, +}; +U_BOOT_DRVINFO(clock_controller_at_ff440000) = { + .name = "rockchip_rk3328_cru", + .plat = &dtv_clock_controller_at_ff440000, + .plat_size = sizeof(dtv_clock_controller_at_ff440000), + .parent_idx = -1, +}; + +/* + * Node /dmc index 1 + * driver rockchip_rk3328_dmc parent None + */ +static struct dtd_rockchip_rk3328_dmc dtv_dmc = { + .reg = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000, + 0xff720000, 0x1000, 0xff798000, 0x1000}, + .rockchip_sdram_params = {0x1, 0xa, 0x2, 0x1, 0x0, 0x0, 0x11, 0x0, + 0x11, 0x0, 0x0, 0x94291288, 0x0, 0x27, 0x462, 0x15, + 0x242, 0xff, 0x14d, 0x0, 0x1, 0x0, 0x0, 0x0, + 0x43049010, 0x64, 0x28003b, 0xd0, 0x20053, 0xd4, 0x220000, 0xd8, + 0x100, 0xdc, 0x40000, 0xe0, 0x0, 0xe4, 0x110000, 0xe8, + 0x420, 0xec, 0x400, 0xf4, 0xf011f, 0x100, 0x9060b06, 0x104, + 0x20209, 0x108, 0x505040a, 0x10c, 0x40400c, 0x110, 0x5030206, 0x114, + 0x3030202, 0x120, 0x3030b03, 0x124, 0x20208, 0x180, 0x1000040, 0x184, + 0x0, 0x190, 0x7030003, 0x198, 0x5001100, 0x1a0, 0xc0400003, 0x240, + 0x6000604, 0x244, 0x201, 0x250, 0xf00, 0x490, 0x1, 0xffffffff, + 0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xc, 0x28, 0xa, 0x2c, + 0x0, 0x30, 0x9, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79, + 0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87, + 0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78, + 0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77, + 0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77, + 0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, + 0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77, + 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9, + 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, + 0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77, + 0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78, + 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69, + 0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77, + 0x77, 0x77, 0x79, 0x9}, +}; +U_BOOT_DRVINFO(dmc) = { + .name = "rockchip_rk3328_dmc", + .plat = &dtv_dmc, + .plat_size = sizeof(dtv_dmc), + .parent_idx = -1, +}; + +/* + * Node /mmc@ff500000 index 2 + * driver rockchip_rk3288_dw_mshc parent None + */ +static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = { + .bus_width = 0x4, + .cap_sd_highspeed = true, + .clocks = { + {0, {317}}, + {0, {33}}, + {0, {74}}, + {0, {78}},}, + .disable_wp = true, + .fifo_depth = 0x100, + .interrupts = {0x0, 0xc, 0x4}, + .max_frequency = 0x8f0d180, + .pinctrl_0 = {0x47, 0x48, 0x49, 0x4a}, + .pinctrl_names = "default", + .reg = {0xff500000, 0x4000}, + .sd_uhs_sdr104 = true, + .sd_uhs_sdr12 = true, + .sd_uhs_sdr25 = true, + .sd_uhs_sdr50 = true, + .u_boot_spl_fifo_mode = true, + .vmmc_supply = 0x4b, + .vqmmc_supply = 0x1e, +}; +U_BOOT_DRVINFO(mmc_at_ff500000) = { + .name = "rockchip_rk3288_dw_mshc", + .plat = &dtv_mmc_at_ff500000, + .plat_size = sizeof(dtv_mmc_at_ff500000), + .parent_idx = -1, +}; + +/* + * Node /serial@ff130000 index 3 + * driver ns16550_serial parent None + */ +static struct dtd_ns16550_serial dtv_serial_at_ff130000 = { + .clock_frequency = 0x16e3600, + .clocks = { + {0, {40}}, + {0, {212}},}, + .dma_names = {"tx", "rx"}, + .dmas = {0x10, 0x6, 0x10, 0x7}, + .interrupts = {0x0, 0x39, 0x4}, + .pinctrl_0 = 0x26, + .pinctrl_names = "default", + .reg = {0xff130000, 0x100}, + .reg_io_width = 0x4, + .reg_shift = 0x2, +}; +U_BOOT_DRVINFO(serial_at_ff130000) = { + .name = "ns16550_serial", + .plat = &dtv_serial_at_ff130000, + .plat_size = sizeof(dtv_serial_at_ff130000), + .parent_idx = -1, +}; + +/* + * Node /syscon@ff100000 index 4 + * driver rockchip_rk3328_grf parent None + */ +static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = { + .reg = {0xff100000, 0x1000}, +}; +U_BOOT_DRVINFO(syscon_at_ff100000) = { + .name = "rockchip_rk3328_grf", + .plat = &dtv_syscon_at_ff100000, + .plat_size = sizeof(dtv_syscon_at_ff100000), + .parent_idx = -1, +}; + diff --git a/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-structs-gen.h b/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-structs-gen.h new file mode 100644 index 0000000000..b1ff08a927 --- /dev/null +++ b/package/boot/uboot-rockchip/src/of-platdata/tpe-r1400-rk3328/dt-structs-gen.h @@ -0,0 +1,51 @@ +/* + * DO NOT MODIFY + * + * Defines the structs used to hold devicetree data. + * This was generated by dtoc from a .dtb (device tree binary) file. + */ + +#include +#include +struct dtd_ns16550_serial { + fdt32_t clock_frequency; + struct phandle_1_arg clocks[2]; + const char * dma_names[2]; + fdt32_t dmas[4]; + fdt32_t interrupts[3]; + fdt32_t pinctrl_0; + const char * pinctrl_names; + fdt64_t reg[2]; + fdt32_t reg_io_width; + fdt32_t reg_shift; +}; +struct dtd_rockchip_rk3288_dw_mshc { + fdt32_t bus_width; + bool cap_sd_highspeed; + struct phandle_1_arg clocks[4]; + bool disable_wp; + fdt32_t fifo_depth; + fdt32_t interrupts[3]; + fdt32_t max_frequency; + fdt32_t pinctrl_0[4]; + const char * pinctrl_names; + fdt64_t reg[2]; + bool sd_uhs_sdr104; + bool sd_uhs_sdr12; + bool sd_uhs_sdr25; + bool sd_uhs_sdr50; + bool u_boot_spl_fifo_mode; + fdt32_t vmmc_supply; + fdt32_t vqmmc_supply; +}; +struct dtd_rockchip_rk3328_cru { + fdt64_t reg[2]; + fdt32_t rockchip_grf; +}; +struct dtd_rockchip_rk3328_dmc { + fdt64_t reg[12]; + fdt32_t rockchip_sdram_params[196]; +}; +struct dtd_rockchip_rk3328_grf { + fdt64_t reg[2]; +}; diff --git a/target/linux/ath79/dts/ar9330_thinkpenguin_tpe-r1100.dts b/target/linux/ath79/dts/ar9330_thinkpenguin_tpe-r1100.dts new file mode 100644 index 0000000000..2be7d2dda7 --- /dev/null +++ b/target/linux/ath79/dts/ar9330_thinkpenguin_tpe-r1100.dts @@ -0,0 +1,150 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "ar9330.dtsi" + +#include +#include + +/ { + model = "ThinkPenguin TPE-R1100"; + compatible = "thinkpenguin,tpe-r1100", "qca,ar9330"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + label-mac-device = ð0; + }; + + leds { + compatible = "gpio-leds"; + + wlan { + label = "orange:wlan"; + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + configurable { + label = "green:configurable"; + gpios = <&gpio 13 GPIO_ACTIVE_HIGH>; + }; + + led_power: power { + label = "green:power"; + gpios = <&gpio 15 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + }; + + keys { + compatible = "gpio-keys"; + + manual { + label = "manual"; + linux,code = ; + gpios = <&gpio 7 GPIO_ACTIVE_HIGH>; + }; + + auto { + label = "auto"; + linux,code = ; + gpios = <&gpio 8 GPIO_ACTIVE_HIGH>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 11 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&usb { + dr_mode = "host"; + status = "okay"; +}; + +&usb_phy { + status = "okay"; + gpios = <&gpio 6 GPIO_ACTIVE_HIGH>; +}; + +&spi { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@1 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + }; + + partition@2 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x050000 0xfa0000>; + }; + + art: partition@3 { + label = "art"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +ð0 { + status = "okay"; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; +}; + +ð1 { + status = "okay"; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + + gmac-config { + device = <&gmac>; + + switch-phy-addr-swap = <0>; + switch-phy-swap = <0>; + }; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&art 0x1000>; + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; +}; + +&art { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; +}; diff --git a/target/linux/ath79/dts/qca9531_thinkpenguin_tpe-r1300.dts b/target/linux/ath79/dts/qca9531_thinkpenguin_tpe-r1300.dts new file mode 100644 index 0000000000..473a7e6b54 --- /dev/null +++ b/target/linux/ath79/dts/qca9531_thinkpenguin_tpe-r1300.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qca9531_glinet_gl-ar300m.dtsi" + +/ { + compatible = "thinkpenguin,tpe-r1300", "qca,qca9531"; + model = "ThinkPenguin TPE-R1300"; +}; + +/delete-node/ &nand_flash; + +&nor_firmware { + compatible = "denx,uimage"; + label = "firmware"; +}; diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk index db446bcf16..605c067946 100644 --- a/target/linux/ath79/image/generic.mk +++ b/target/linux/ath79/image/generic.mk @@ -1709,6 +1709,26 @@ define Device/teltonika_rut955-h7v3c0 endef TARGET_DEVICES += teltonika_rut955-h7v3c0 +define Device/thinkpenguin_tpe-r1100 + SOC := ar9330 + DEVICE_VENDOR := ThinkPenguin + DEVICE_MODEL := TPE-R1100 + DEVICE_PACKAGES := kmod-usb-chipidea2 + IMAGE_SIZE := 16000k + SUPPORTED_DEVICES += tpe-r1100 +endef +TARGET_DEVICES += thinkpenguin_tpe-r1100 + +define Device/thinkpenguin_tpe-r1300 + SOC := qca9531 + DEVICE_VENDOR := ThinkPenguin + DEVICE_PACKAGES := kmod-usb2 + IMAGE_SIZE := 16000k + SUPPORTED_DEVICES += tpe-r1300 + DEVICE_MODEL := TPE-R1300 +endef +TARGET_DEVICES += thinkpenguin_tpe-r1300 + define Device/wallys_dr531 SOC := qca9531 DEVICE_VENDOR := Wallys diff --git a/target/linux/generic/config-5.10 b/target/linux/generic/config-5.10 index 5a4f99f5a6..efc0861f1c 100644 --- a/target/linux/generic/config-5.10 +++ b/target/linux/generic/config-5.10 @@ -2532,6 +2532,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_INA2XX_ADC is not set # CONFIG_INDIRECT_PIO is not set CONFIG_INET=y +CONFIG_INET_TABLE_PERTURB_ORDER=16 # CONFIG_INET6_AH is not set # CONFIG_INET6_ESP is not set # CONFIG_INET6_ESPINTCP is not set diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index b10c43ba60..87a799266a 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -8,7 +8,8 @@ boardname="${board##*,}" board_config_update case $board in -friendlyarm,nanopi-r2s) +friendlyarm,nanopi-r2s|\ +thinkpenguin,tpe-r1400) ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0" ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth1" ;; diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index b0e6479947..d9feb03551 100644 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -8,6 +8,7 @@ rockchip_setup_interfaces() case "$board" in friendlyarm,nanopi-r2s|\ + thinkpenguin,tpe-r1400|\ friendlyarm,nanopi-r4s) ucidef_set_interfaces_lan_wan 'eth1' 'eth0' ;; @@ -55,7 +56,8 @@ rockchip_setup_macs() local label_mac="" case "$board" in - friendlyarm,nanopi-r2s) + friendlyarm,nanopi-r2s|\ + thinkpenguin,tpe-r1400) wan_mac=$(generate_mac_from_mmc_cid mmcblk0) lan_mac=$(macaddr_add "$wan_mac" 1) ;; diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index 6cc31f1d8c..2ee3930722 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -12,6 +12,16 @@ define Device/friendlyarm_nanopi-r2s endef TARGET_DEVICES += friendlyarm_nanopi-r2s +define Device/thinkpenguin_tpe-r1400 + DEVICE_VENDOR := ThinkPenguin + DEVICE_MODEL := TPE-R1400 + SOC := rk3328 + UBOOT_DEVICE_NAME := tpe-r1400-rk3328 + IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r2s | pine64-img | gzip | append-metadata + DEVICE_PACKAGES := kmod-usb-net-rtl8152 +endef +TARGET_DEVICES += thinkpenguin_tpe-r1400 + define Device/friendlyarm_nanopi-r4s DEVICE_VENDOR := FriendlyARM DEVICE_MODEL := NanoPi R4S diff --git a/target/linux/rockchip/image/tpe-r1400.bootscript b/target/linux/rockchip/image/tpe-r1400.bootscript new file mode 100644 index 0000000000..5198881a26 --- /dev/null +++ b/target/linux/rockchip/image/tpe-r1400.bootscript @@ -0,0 +1,8 @@ +part uuid mmc ${devnum}:2 uuid + +setenv bootargs "console=ttyS2,1500000 earlycon=uart8250,mmio32,0xff130000 root=PARTUUID=${uuid} rw rootwait" + +load mmc ${devnum}:1 ${fdt_addr_r} rockchip.dtb +load mmc ${devnum}:1 ${kernel_addr_r} kernel.img + +booti ${kernel_addr_r} - ${fdt_addr_r} diff --git a/target/linux/rockchip/patches-5.10/107-add-tpe-r1400.patch b/target/linux/rockchip/patches-5.10/107-add-tpe-r1400.patch new file mode 100644 index 0000000000..b5165536f0 --- /dev/null +++ b/target/linux/rockchip/patches-5.10/107-add-tpe-r1400.patch @@ -0,0 +1,426 @@ +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -7,6 +7,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-od + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-tpe-r1400.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3328-tpe-r1400.dts +@@ -0,0 +1,413 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 David Bauer ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include "rk3328.dtsi" ++ ++/ { ++ model = "ThinkPenguin TPE-R1400"; ++ compatible = "thinkpenguin,tpe-r1400", "rockchip,rk3328"; ++ ++ aliases { ++ led-boot = &sys_led; ++ led-failsafe = &sys_led; ++ led-running = &sys_led; ++ led-upgrade = &sys_led; ++ }; ++ ++ chosen { ++ stdout-path = "serial2:1500000n8"; ++ }; ++ ++ gmac_clk: gmac-clock { ++ compatible = "fixed-clock"; ++ clock-frequency = <125000000>; ++ clock-output-names = "gmac_clkin"; ++ #clock-cells = <0>; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ pinctrl-0 = <&reset_button_pin>; ++ pinctrl-names = "default"; ++ ++ reset { ++ label = "reset"; ++ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ debounce-interval = <50>; ++ }; ++ }; ++ ++ vcc_rtl8153: vcc-rtl8153-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&rtl8153_en_drv>; ++ regulator-always-on; ++ regulator-name = "vcc_rtl8153"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; ++ pinctrl-names = "default"; ++ ++ lan_led: led-0 { ++ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ label = "tpe-r1400:green:lan"; ++ }; ++ ++ sys_led: led-1 { ++ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ label = "tpe-r1400:red:sys"; ++ }; ++ ++ wan_led: led-2 { ++ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; ++ label = "tpe-r1400:green:wan"; ++ }; ++ }; ++ ++ vcc_io_sdio: sdmmcio-regulator { ++ compatible = "regulator-gpio"; ++ enable-active-high; ++ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; ++ pinctrl-0 = <&sdio_vcc_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_io_sdio"; ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-settling-time-us = <5000>; ++ regulator-type = "voltage"; ++ startup-delay-us = <2000>; ++ states = <1800000 0x1>, ++ <3300000 0x0>; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vcc_sd: sdmmc-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-0 = <&sdmmc0m1_pin>; ++ pinctrl-names = "default"; ++ regulator-name = "vcc_sd"; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc_io_33>; ++ }; ++ ++ vdd_5v: vdd-5v { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_5v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_arm>; ++}; ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&gmac2io { ++ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; ++ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; ++ clock_in_out = "input"; ++ phy-handle = <&rtl8211e>; ++ phy-mode = "rgmii"; ++ phy-supply = <&vcc_io_33>; ++ pinctrl-0 = <&rgmiim1_pins>; ++ pinctrl-names = "default"; ++ rx_delay = <0x18>; ++ snps,aal; ++ tx_delay = <0x24>; ++ status = "okay"; ++ ++ mdio { ++ compatible = "snps,dwmac-mdio"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ rtl8211e: ethernet-phy@1 { ++ reg = <1>; ++ pinctrl-0 = <ð_phy_reset_pin>; ++ pinctrl-names = "default"; ++ reset-assert-us = <10000>; ++ reset-deassert-us = <50000>; ++ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ ++ rk805: pmic@18 { ++ compatible = "rockchip,rk805"; ++ reg = <0x18>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; ++ #clock-cells = <1>; ++ clock-output-names = "xin32k", "rk805-clkout2"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ pinctrl-0 = <&pmic_int_l>; ++ pinctrl-names = "default"; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vdd_5v>; ++ vcc2-supply = <&vdd_5v>; ++ vcc3-supply = <&vdd_5v>; ++ vcc4-supply = <&vdd_5v>; ++ vcc5-supply = <&vcc_io_33>; ++ vcc6-supply = <&vdd_5v>; ++ ++ regulators { ++ vdd_log: DCDC_REG1 { ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ ++ vdd_arm: DCDC_REG2 { ++ regulator-name = "vdd_arm"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1450000>; ++ regulator-ramp-delay = <12500>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <950000>; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_io_33: DCDC_REG4 { ++ regulator-name = "vcc_io_33"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcc_18: LDO_REG1 { ++ regulator-name = "vcc_18"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcc18_emmc: LDO_REG2 { ++ regulator-name = "vcc18_emmc"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vdd_10: LDO_REG3 { ++ regulator-name = "vdd_10"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1000000>; ++ }; ++ }; ++ }; ++ }; ++ ++ usb { ++ rtl8153_en_drv: rtl8153-en-drv { ++ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&io_domains { ++ pmuio-supply = <&vcc_io_33>; ++ vccio1-supply = <&vcc_io_33>; ++ vccio2-supply = <&vcc18_emmc>; ++ vccio3-supply = <&vcc_io_sdio>; ++ vccio4-supply = <&vcc_18>; ++ vccio5-supply = <&vcc_io_33>; ++ vccio6-supply = <&vcc_io_33>; ++ status = "okay"; ++}; ++ ++&pinctrl { ++ button { ++ reset_button_pin: reset-button-pin { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ ethernet-phy { ++ eth_phy_reset_pin: eth-phy-reset-pin { ++ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ leds { ++ lan_led_pin: lan-led-pin { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ sys_led_pin: sys-led-pin { ++ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ wan_led_pin: wan-led-pin { ++ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sd { ++ sdio_vcc_pin: sdio-vcc-pin { ++ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++&sdmmc { ++ bus-width = <4>; ++ cap-sd-highspeed; ++ disable-wp; ++ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; ++ pinctrl-names = "default"; ++ sd-uhs-sdr12; ++ sd-uhs-sdr25; ++ sd-uhs-sdr50; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_sd>; ++ vqmmc-supply = <&vcc_io_sdio>; ++ status = "okay"; ++}; ++ ++&tsadc { ++ rockchip,hw-tshut-mode = <0>; ++ rockchip,hw-tshut-polarity = <0>; ++ status = "okay"; ++}; ++ ++&u2phy { ++ status = "okay"; ++}; ++ ++&u2phy_host { ++ status = "okay"; ++}; ++ ++&u2phy_otg { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&usb20_otg { ++ status = "okay"; ++ dr_mode = "host"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ status = "okay"; ++ ++ usb-eth@2 { ++ compatible = "realtek,rtl8153"; ++ reg = <2>; ++ ++ realtek,led-data = <0x87>; ++ }; ++}; -- 2.25.1