From 7b1dc26fae813fcf7650340803972feb8829853e Mon Sep 17 00:00:00 2001 From: Bo Shen Date: Fri, 1 Aug 2014 16:37:09 +0800 Subject: [PATCH] ARM: atmel: sama5d3: add timings register MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: Bo Shen Reviewed-by: Andreas Bießmann Signed-off-by: Andreas Bießmann --- arch/arm/include/asm/arch-at91/sama5d3_smc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-at91/sama5d3_smc.h b/arch/arm/include/asm/arch-at91/sama5d3_smc.h index 6caa9b6ed8..a859b6db9b 100644 --- a/arch/arm/include/asm/arch-at91/sama5d3_smc.h +++ b/arch/arm/include/asm/arch-at91/sama5d3_smc.h @@ -14,7 +14,8 @@ #define AT91_ASM_SMC_SETUP0 (ATMEL_BASE_SMC + 0x600) #define AT91_ASM_SMC_PULSE0 (ATMEL_BASE_SMC + 0x604) #define AT91_ASM_SMC_CYCLE0 (ATMEL_BASE_SMC + 0x608) -#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x60C) +#define AT91_ASM_SMC_TIMINGS0 (ATMEL_BASE_SMC + 0x60c) +#define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x610) #else struct at91_cs { u32 setup; /* 0x600 SMC Setup Register */ -- 2.25.1