From 68b49056e6b0574d04cb6aa69f7fa7a070aa1d30 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Sat, 18 Jan 2020 16:12:41 +0100 Subject: [PATCH] arm: dts: i.mx8x: add #cooling-cells properties Fix dtb building warnings: Warning (cooling_device_property): /thermal-zones/cpu-thermal0/cooling-maps/map0: Missing property '#cooling-cells' in node /cpus/cpu@0 or bad phandle (referred from cooling-device[0]) Signed-off-by: Anatolij Gustschin Reviewed-by: Stefano Babic Reviewed-by: Fabio Estevam --- arch/arm/dts/fsl-imx8-ca35.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/fsl-imx8-ca35.dtsi b/arch/arm/dts/fsl-imx8-ca35.dtsi index 28bc32c8b7..9af8b1511c 100644 --- a/arch/arm/dts/fsl-imx8-ca35.dtsi +++ b/arch/arm/dts/fsl-imx8-ca35.dtsi @@ -18,6 +18,7 @@ reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&A35_L2>; + #cooling-cells = <2>; }; A35_1: cpu@1 { @@ -26,6 +27,7 @@ reg = <0x0 0x1>; enable-method = "psci"; next-level-cache = <&A35_L2>; + #cooling-cells = <2>; }; A35_2: cpu@2 { @@ -34,6 +36,7 @@ reg = <0x0 0x2>; enable-method = "psci"; next-level-cache = <&A35_L2>; + #cooling-cells = <2>; }; A35_3: cpu@3 { @@ -42,6 +45,7 @@ reg = <0x0 0x3>; enable-method = "psci"; next-level-cache = <&A35_L2>; + #cooling-cells = <2>; }; A35_L2: l2-cache0 { -- 2.25.1