From 63e73c9a8ed5b32d9c4067ffaad953e9a8fe8f0a Mon Sep 17 00:00:00 2001 From: wdenk Date: Mon, 23 Feb 2004 22:22:28 +0000 Subject: [PATCH] * Patches by Reinhard Meyer, 14 Feb 2004: - update board/emk tree; use common flash driver - Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c [adapted for other PPC CPUs -- wd] - Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c * Patch by Jon Diekema, 13 Feb 2004: Call show_boot_progress() whenever POST "FAILED" is printed. * Patch by Nishant Kamat, 13 Feb 2004: Add support for TI OMAP1610 H2 Board Fixes for cpu/arm926ejs/interrupt.c (based on Richard Woodruff's patch for arm925, 16 Oct 03) Fix for a timer bug in OMAP1610 Innovator Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2 * Patches by Stephan Linz, 12 Feb 2004: - add support for NIOS timer with variable period preload counter value - prepare POST framework support for NIOS targets * Patch by Denis Peter, 11 Feb 2004: add POST support for the MIP405 board --- CHANGELOG | 23 ++ MAINTAINERS | 8 + MAKEALL | 2 +- Makefile | 18 +- README | 19 +- board/emk/common/flash.c | 65 +++- board/emk/top5200/Makefile | 2 +- board/emk/top5200/flash.c | 502 -------------------------- board/emk/top5200/top5200.c | 50 +-- board/emk/top860/Makefile | 2 +- board/emk/top860/flash.c | 489 ------------------------- board/emk/top860/top860.c | 63 +--- board/mpl/mip405/mip405.c | 12 + board/omap1610inn/omap1610innovator.c | 25 +- board/omap1610inn/platform.S | 49 +++ cpu/74xx_7xx/traps.c | 11 +- cpu/arm926ejs/interrupts.c | 107 +++--- cpu/mpc5xx/traps.c | 11 +- cpu/mpc5xxx/traps.c | 12 +- cpu/mpc824x/traps.c | 11 +- cpu/mpc8260/traps.c | 10 +- cpu/mpc85xx/traps.c | 11 +- cpu/mpc8xx/traps.c | 11 +- cpu/nios/interrupts.c | 4 + cpu/ppc4xx/Makefile | 2 +- cpu/ppc4xx/commproc.c | 69 ++++ cpu/ppc4xx/traps.c | 11 +- doc/README.nios | 3 + include/asm-nios/cache.h | 1 + include/asm-nios/global_data.h | 4 + include/configs/DK1C20.h | 47 ++- include/configs/DK1S10.h | 40 +- include/configs/MIP405.h | 53 ++- include/configs/TOP5200.h | 14 +- include/configs/omap1610h2.h | 178 +++++++++ include/configs/omap1610inn.h | 7 +- lib_ppc/board.c | 3 + post/post.c | 12 +- rtc/mk48t59.c | 12 + 39 files changed, 752 insertions(+), 1221 deletions(-) delete mode 100644 board/emk/top5200/flash.c delete mode 100644 board/emk/top860/flash.c create mode 100644 cpu/ppc4xx/commproc.c create mode 100644 include/asm-nios/cache.h create mode 100644 include/configs/omap1610h2.h diff --git a/CHANGELOG b/CHANGELOG index 13516dea51..c7b673dab9 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -2,6 +2,29 @@ Changes for U-Boot 1.0.2: ====================================================================== +* Patches by Reinhard Meyer, 14 Feb 2004: + - update board/emk tree; use common flash driver + - Corrected tested bits in machine check exception in cpu/mpc5xxx/traps.c + [adapted for other PPC CPUs -- wd] + - Added support for the M48T08 on the EVAL5200 board in rtc/mk48t59.c + +* Patch by Jon Diekema, 13 Feb 2004: + Call show_boot_progress() whenever POST "FAILED" is printed. + +* Patch by Nishant Kamat, 13 Feb 2004: + Add support for TI OMAP1610 H2 Board + Fixes for cpu/arm926ejs/interrupt.c + (based on Richard Woodruff's patch for arm925, 16 Oct 03) + Fix for a timer bug in OMAP1610 Innovator + Add support for CS0 (ROM)/CS3 (Flash) boot in OMAP1610 Innovator and H2 + +* Patches by Stephan Linz, 12 Feb 2004: + - add support for NIOS timer with variable period preload counter value + - prepare POST framework support for NIOS targets + +* Patch by Denis Peter, 11 Feb 2004: + add POST support for the MIP405 board + * Patch by Laurent Mohin, 10 Feb 2004: Fix buffer overflow in common/usb.c diff --git a/MAINTAINERS b/MAINTAINERS index 9e183f0892..f23d9e2f6d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -187,6 +187,9 @@ Scott McNutt EBONY PPC440GP +Tolunay Orkun + csb272 PPC4xx + Keith Outwater GEN860T MPC860T @@ -307,9 +310,14 @@ Gary Jennejohn trab ARM920T Kshitij Gupta + omap1510inn ARM925T omap1610inn ARM926EJS +Nishant Kamat + + omap1610h2 ARM926EJS + David Müller smdk2410 ARM920T diff --git a/MAKEALL b/MAKEALL index 0705488f9f..bcf890428c 100644 --- a/MAKEALL +++ b/MAKEALL @@ -135,7 +135,7 @@ LIST_ARM7="ep7312 impa7" ######################################################################### LIST_ARM9=" \ - at91rm9200dk omap1510inn omap1610inn \ + at91rm9200dk omap1510inn omap1610h2 omap1610inn \ smdk2400 smdk2410 trab \ VCMA9 \ " diff --git a/Makefile b/Makefile index 1520f57408..9eebf9ceb9 100644 --- a/Makefile +++ b/Makefile @@ -912,11 +912,25 @@ shannon_config : unconfig xtract_trab = $(subst _bigram,,$(subst _bigflash,,$(subst _old,,$(subst _config,,$1)))) +xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1))) + omap1510inn_config : unconfig @./mkconfig $(@:_config=) arm arm925t omap1510inn -omap1610inn_config : unconfig - @./mkconfig $(@:_config=) arm arm926ejs omap1610inn +omap1610inn_config \ +omap1610inn_cs0boot_config \ +omap1610inn_cs3boot_config \ +omap1610h2_config \ +omap1610h2_cs0boot_config \ +omap1610h2_cs3boot_config : unconfig + @if [ "$(findstring _cs0boot_, $@)" ] ; then \ + echo "#define CONFIG_CS0_BOOT" >> ./include/config.h ; \ + echo "Configured for CS0 boot"; \ + else \ + echo "#define CONFIG_CS3_BOOT" >> ./include/config.h ; \ + echo "Configured for CS3 boot"; \ + fi; + @./mkconfig -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn smdk2400_config : unconfig @./mkconfig $(@:_config=) arm arm920t smdk2400 diff --git a/README b/README index 2c56820161..3631f01c8d 100644 --- a/README +++ b/README @@ -219,7 +219,7 @@ Directory Hierarchy: - board/omap1510inn Files specific to OMAP 1510 Innovator boards - board/omap1610inn - Files specific to OMAP 1610 Innovator boards + Files specific to OMAP 1610 Innovator and H2 boards - board/pcippc2 Files specific to PCIPPC2/PCIPPC6 boards - board/pm826 Files specific to PM826 boards - board/ppmc8260 @@ -375,11 +375,12 @@ The following options need to be configured: ARM based boards: ----------------- - CONFIG_HHP_CRADLE, CONFIG_DNP1110, CONFIG_EP7312, - CONFIG_IMPA7, CONFIG_LART, CONFIG_LUBBOCK, - CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610 - CONFIG_SHANNON, CONFIG_SMDK2400, CONFIG_SMDK2410, - CONFIG_TRAB, CONFIG_VCMA9, CONFIG_AT91RM9200DK + CONFIG_HHP_CRADLE, CONFIG_DNP1110, CONFIG_EP7312, + CONFIG_IMPA7, CONFIG_LART, CONFIG_LUBBOCK, + CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, + CONFIG_H2_OMAP1610, CONFIG_SHANNON, CONFIG_SMDK2400, + CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9, + CONFIG_AT91RM9200DK - CPU Module Type: (if CONFIG_COGENT is defined) @@ -1465,6 +1466,10 @@ The following options need to be configured: 14 common/cmd_bootm.c No initial ramdisk, no multifile, continue. 15 common/cmd_bootm.c All preparation done, transferring control to OS + -30 lib_ppc/board.c Fatal error, hang the system + -31 post/post.c POST test failed, detected by post_output_backlog() + -32 post/post.c POST test failed, detected by post_run_single() + -1 common/cmd_doc.c Bad usage of "doc" command -1 common/cmd_doc.c No boot device -1 common/cmd_doc.c Unknown Chip ID on boot device @@ -2039,7 +2044,7 @@ configurations; the following names are supported: at91rm9200dk_config omap1510inn_config MPC8260ADS_config omap1610inn_config ZPC1900_config MPC8540ADS_config MPC8560ADS_config QS850_config QS823_config - QS860T_config DUET_ADS_config + QS860T_config DUET_ADS_config omap1610h2_config Note: for some board special configuration names may exist; check if additional information is available from the board vendor; for diff --git a/board/emk/common/flash.c b/board/emk/common/flash.c index b2a21382e5..adfa9a0fb2 100644 --- a/board/emk/common/flash.c +++ b/board/emk/common/flash.c @@ -28,15 +28,33 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ -typedef unsigned char FLASH_PORT_WIDTH; -typedef volatile unsigned char FLASH_PORT_WIDTHV; -#define FLASH_ID_MASK 0xFF +#if defined (CONFIG_TOP860) + typedef unsigned short FLASH_PORT_WIDTH; + typedef volatile unsigned short FLASH_PORT_WIDTHV; + #define FLASH_ID_MASK 0xFF + + #define FPW FLASH_PORT_WIDTH + #define FPWV FLASH_PORT_WIDTHV + + #define FLASH_CYCLE1 0x0555 + #define FLASH_CYCLE2 0x02aa + #define FLASH_ID1 0 + #define FLASH_ID2 1 +#endif + +#if defined (CONFIG_TOP5200) + typedef unsigned char FLASH_PORT_WIDTH; + typedef volatile unsigned char FLASH_PORT_WIDTHV; + #define FLASH_ID_MASK 0xFF -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV + #define FPW FLASH_PORT_WIDTH + #define FPWV FLASH_PORT_WIDTHV -#define FLASH_CYCLE1 0x0aaa -#define FLASH_CYCLE2 0x0555 + #define FLASH_CYCLE1 0x0aaa + #define FLASH_CYCLE2 0x0555 + #define FLASH_ID1 0 + #define FLASH_ID2 2 +#endif /*----------------------------------------------------------------------- * Functions @@ -179,12 +197,33 @@ void flash_print_info (flash_info_t *info) printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { + ulong size; + int erased; + ulong *flash = (unsigned long *) info->start[i]; + if ((i % 5) == 0) { printf ("\n "); } - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); + /* + * Check if whole sector is erased + */ + size = + (i != (info->sector_count - 1)) ? + (info->start[i + 1] - info->start[i]) >> 2 : + (info->start[0] + info->size - info->start[i]) >> 2; + + for ( + flash = (unsigned long *) info->start[i], erased = 1; + (flash != (unsigned long *) info->start[i] + size) && erased; + flash++ + ) + erased = *flash == ~0x0UL; + + printf (" %08lX %s %s", + info->start[i], + erased ? "E": " ", + info->protect[i] ? "(RO)" : " "); } printf ("\n"); @@ -212,7 +251,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) * This works for any bus width and any FLASH device width. */ udelay(100); - switch (addr[0] & 0xff) { + switch (addr[FLASH_ID1] & 0xff) { case (uchar)AMD_MANUFACT: info->flash_id = FLASH_MAN_AMD; @@ -225,7 +264,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) #endif default: - printf ("unknown vendor=%x ", addr[0] & 0xff); + printf ("unknown vendor=%x ", addr[FLASH_ID1] & 0xff); info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; info->size = 0; @@ -233,7 +272,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) } /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */ - if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[2]) { + if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[FLASH_ID2]) { case (FPW)AMD_ID_LV160B: info->flash_id += FLASH_AM160B; @@ -255,7 +294,7 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) break; default: - printf ("unknown AMD device=%x ", (FPW)addr[2]); + printf ("unknown AMD device=%x ", (FPW)addr[FLASH_ID2]); info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; info->size = 0; diff --git a/board/emk/top5200/Makefile b/board/emk/top5200/Makefile index eb5ed591a9..986608bb11 100644 --- a/board/emk/top5200/Makefile +++ b/board/emk/top5200/Makefile @@ -26,7 +26,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS := $(BOARD).o flash.o +OBJS := $(BOARD).o ../common/flash.o ../common/vpd.o ../common/am79c874.o $(LIB): $(OBJS) $(SOBJS) $(AR) crv $@ $(OBJS) diff --git a/board/emk/top5200/flash.c b/board/emk/top5200/flash.c deleted file mode 100644 index 216bce3a88..0000000000 --- a/board/emk/top5200/flash.c +++ /dev/null @@ -1,502 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2003 - * Reinhard Meyer, EMK Elektronik GmbH, r.meyer@emk-elektronik.de - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -typedef unsigned char FLASH_PORT_WIDTH; -typedef volatile unsigned char FLASH_PORT_WIDTHV; -#define FLASH_ID_MASK 0xFF - -#define FPW FLASH_PORT_WIDTH -#define FPWV FLASH_PORT_WIDTHV - -#define FLASH_CYCLE1 0x0aaa -#define FLASH_CYCLE2 0x0555 - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size(FPWV *addr, flash_info_t *info); -static void flash_reset(flash_info_t *info); -static int write_word_amd(flash_info_t *info, FPWV *dest, FPW data); -static flash_info_t *flash_get_info(ulong base); - -/*----------------------------------------------------------------------- - * flash_init() - * - * sets up flash_info and returns size of FLASH (bytes) - */ -unsigned long flash_init (void) -{ - unsigned long size = 0; - int i = 0; - extern void flash_preinit(void); - extern void flash_afterinit(uint, ulong, ulong); - ulong flashbase = CFG_FLASH_BASE; - - flash_preinit(); - - /* There is only ONE FLASH device */ - memset(&flash_info[i], 0, sizeof(flash_info_t)); - flash_info[i].size = - flash_get_size((FPW *)flashbase, &flash_info[i]); - size += flash_info[i].size; - -#if CFG_MONITOR_BASE >= CFG_FLASH_BASE - /* monitor protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE+monitor_flash_len-1, - flash_get_info(CFG_MONITOR_BASE)); -#endif - -#ifdef CFG_ENV_IS_IN_FLASH - /* ENV protection ON by default */ - flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR+CFG_ENV_SIZE-1, - flash_get_info(CFG_ENV_ADDR)); -#endif - - - flash_afterinit(i, flash_info[i].start[0], flash_info[i].size); - return size ? size : 1; -} - -/*----------------------------------------------------------------------- - */ -static void flash_reset(flash_info_t *info) -{ - FPWV *base = (FPWV *)(info->start[0]); - - /* Put FLASH back in read mode */ - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) - *base = (FPW)0x00FF00FF; /* Intel Read Mode */ - else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) - *base = (FPW)0x00F000F0; /* AMD Read Mode */ -} - -/*----------------------------------------------------------------------- - */ - -static flash_info_t *flash_get_info(ulong base) -{ - int i; - flash_info_t * info; - - for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { - info = & flash_info[i]; - if (info->size && - info->start[0] <= base && base <= info->start[0] + info->size - 1) - break; - } - - return i == CFG_MAX_FLASH_BANKS ? 0 : info; -} - -/*----------------------------------------------------------------------- - */ - -void flash_print_info (flash_info_t *info) -{ - int i; - uchar *boottype; - uchar *bootletter; - uchar *fmt; - uchar botbootletter[] = "B"; - uchar topbootletter[] = "T"; - uchar botboottype[] = "bottom boot sector"; - uchar topboottype[] = "top boot sector"; - - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } - - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("AMD "); break; -#if 0 - case FLASH_MAN_BM: printf ("BRIGHT MICRO "); break; - case FLASH_MAN_FUJ: printf ("FUJITSU "); break; - case FLASH_MAN_SST: printf ("SST "); break; - case FLASH_MAN_STM: printf ("STM "); break; - case FLASH_MAN_INTEL: printf ("INTEL "); break; -#endif - default: printf ("Unknown Vendor "); break; - } - - /* check for top or bottom boot, if it applies */ - if (info->flash_id & FLASH_BTYPE) { - boottype = botboottype; - bootletter = botbootletter; - } - else { - boottype = topboottype; - bootletter = topbootletter; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM160T: - case FLASH_AM160B: - fmt = "29LV160%s (16 Mbit, %s)\n"; - break; - case FLASH_AMDLV065D: - fmt = "29LV065 (64 Mbit, uniform sectors)\n"; - break; - default: - fmt = "Unknown Chip Type\n"; - break; - } - - printf (fmt, bootletter, boottype); - - printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, - info->sector_count); - - printf (" Sector Start Addresses:"); - - for (i=0; isector_count; ++i) { - if ((i % 5) == 0) { - printf ("\n "); - } - - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); - } - - printf ("\n"); -} - -/*----------------------------------------------------------------------- - */ - -/* - * The following code cannot be run from FLASH! - */ - -ulong flash_get_size (FPWV *addr, flash_info_t *info) -{ - int i; - ulong offset; - - /* Write auto select command: read Manufacturer ID */ - /* Write auto select command sequence and test FLASH answer */ - addr[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* for AMD, Intel ignores this */ - addr[FLASH_CYCLE2] = (FPW)0x00550055; /* for AMD, Intel ignores this */ - addr[FLASH_CYCLE1] = (FPW)0x00900090; /* selects Intel or AMD */ - - /* The manufacturer codes are only 1 byte, so just use 1 byte. - * This works for any bus width and any FLASH device width. - */ - udelay(100); - switch (addr[0] & 0xff) { - - case (uchar)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; - -#if 0 - case (uchar)INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; -#endif - - default: - printf ("unknown vendor=%x ", addr[0] & 0xff); - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - break; - } - - /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */ - if (info->flash_id != FLASH_UNKNOWN) switch ((FPW)addr[2]) { - - case (FPW)AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00200000; -#ifdef CFG_LOWBOOT - offset = 0; -#else - offset = 0x00e00000; -#endif - info->start[0] = (ulong)addr + offset; - info->start[1] = (ulong)addr + offset + 0x4000; - info->start[2] = (ulong)addr + offset + 0x6000; - info->start[3] = (ulong)addr + offset + 0x8000; - for (i = 4; i < info->sector_count; i++) - { - info->start[i] = (ulong)addr + offset + 0x10000 * (i-3); - } - break; - - case (FPW)AMD_ID_LV065D: - info->flash_id += FLASH_AMDLV065D; - info->sector_count = 128; - info->size = 0x00800000; -#ifdef CFG_LOWBOOT - offset = 0; -#else - offset = 0x00800000; -#endif - for( i = 0; i < info->sector_count; i++ ) - info->start[i] = (ulong)addr + offset + (i * 0x10000); - break; /* => 8 or 16 MB */ - - default: - printf ("unknown AMD device=%x ", (FPW)addr[2]); - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* => no or unknown flash */ - } - - /* Put FLASH back in read mode */ - flash_reset(info); - - return (info->size); -} - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - FPWV *addr; - int flag, prot, sect; - int intel = (info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL; - ulong start, now, last; - int rcode = 0; - - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; - } - - switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AMDLV065D: - break; - case FLASH_UNKNOWN: - default: - printf ("Can't erase unknown flash type %08lx - aborted\n", - info->flash_id); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - last = get_timer(0); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last && rcode == 0; sect++) { - - if (info->protect[sect] != 0) /* protected, skip it */ - continue; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - addr = (FPWV *)(info->start[sect]); - if (intel) { - *addr = (FPW)0x00500050; /* clear status register */ - *addr = (FPW)0x00200020; /* erase setup */ - *addr = (FPW)0x00D000D0; /* erase confirm */ - } - else { - /* must be AMD style if not Intel */ - FPWV *base; /* first address in bank */ - - base = (FPWV *)(info->start[0]); - base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ - base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ - base[FLASH_CYCLE1] = (FPW)0x00800080; /* erase mode */ - base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ - base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ - *addr = (FPW)0x00300030; /* erase sector */ - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - start = get_timer(0); - - /* wait at least 50us for AMD, 80us for Intel. - * Let's wait 1 ms. - */ - udelay (1000); - - while ((*addr & (FPW)0x00800080) != (FPW)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - - if (intel) { - /* suspend erase */ - *addr = (FPW)0x00B000B0; - } - - flash_reset(info); /* reset to read mode */ - rcode = 1; /* failed */ - break; - } - - /* show that we're waiting */ - if ((get_timer(last)) > CFG_HZ) {/* every second */ - putc ('.'); - last = get_timer(0); - } - } - - /* show that we're waiting */ - if ((get_timer(last)) > CFG_HZ) { /* every second */ - putc ('.'); - last = get_timer(0); - } - - flash_reset(info); /* reset to read mode */ - } - - printf (" done\n"); - return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */ - int bytes; /* number of bytes to program in current word */ - int left; /* number of bytes left to program */ - int i, res; - - for (left = cnt, res = 0; - left > 0 && res == 0; - addr += sizeof(data), left -= sizeof(data) - bytes) { - - bytes = addr & (sizeof(data) - 1); - addr &= ~(sizeof(data) - 1); - - /* combine source and destination data so can program - * an entire word of 16 or 32 bits - */ - for (i = 0; i < sizeof(data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left ) - data += *((uchar *)addr + i); - else - data += *src++; - } - - /* write one word to the flash */ - switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: - res = write_word_amd(info, (FPWV *)addr, data); - break; - default: - /* unknown flash type, error! */ - printf ("missing or unknown FLASH type\n"); - res = 1; /* not really a timeout, but gives error */ - break; - } - } - - return (res); -} - -/*----------------------------------------------------------------------- - * Write a word to Flash for AMD FLASH - * A word is 16 or 32 bits, whichever the bus width of the flash bank - * (not an individual chip) is. - * - * returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_word_amd (flash_info_t *info, FPWV *dest, FPW data) -{ - ulong start; - int flag; - int res = 0; /* result, assume success */ - FPWV *base; /* first address in flash bank */ - - /* Check if Flash is (sufficiently) erased */ - if ((*dest & data) != data) { - return (2); - } - - - base = (FPWV *)(info->start[0]); - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - base[FLASH_CYCLE1] = (FPW)0x00AA00AA; /* unlock */ - base[FLASH_CYCLE2] = (FPW)0x00550055; /* unlock */ - base[FLASH_CYCLE1] = (FPW)0x00A000A0; /* selects program mode */ - - *dest = data; /* start programming the data */ - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - start = get_timer (0); - - /* data polling for D7 */ - while (res == 0 && (*dest & (FPW)0x00800080) != (data & (FPW)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - *dest = (FPW)0x00F000F0; /* reset bank */ - res = 1; - } - } - - return (res); -} diff --git a/board/emk/top5200/top5200.c b/board/emk/top5200/top5200.c index 3969e2aa12..b65d2d0d0d 100644 --- a/board/emk/top5200/top5200.c +++ b/board/emk/top5200/top5200.c @@ -156,53 +156,9 @@ void flash_afterinit(uint bank, ulong start, ulong size) int misc_init_r (void) { /* read 'factory' part of EEPROM */ - uchar buf[81]; - uchar *p; - uint length; - uint addr; - uint len; - - /* get length first */ - addr = CFG_FACT_OFFSET; - if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) { -bailout: - printf ("cannot read factory configuration\n"); - printf ("be sure to set ethaddr yourself!\n"); - return 0; - } - length = buf[0] + (buf[1] << 8); - addr += 2; - - /* sanity check */ - if (length < 20 || length > CFG_FACT_SIZE - 2) - goto bailout; - - /* read lines */ - while (length > 0) { - /* read one line */ - len = length > 80 ? 80 : length; - if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len)) - goto bailout; - /* mark end of buffer */ - buf[len] = 0; - /* search end of line */ - for (p = buf; *p && *p != 0x0a; p++); - if (!*p) - goto bailout; - *p++ = 0; - /* advance to next line start */ - length -= p - buf; - addr += p - buf; - /*printf ("%s\n", buf); */ - /* search for our specific entry */ - if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) { - setenv ("ethaddr", buf + 19); - } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) { - setenv ("serial#", buf + 15); - } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) { - setenv ("board_id", buf + 13); - } - } + extern void read_factory_r (void); + read_factory_r (); + return (0); } diff --git a/board/emk/top860/Makefile b/board/emk/top860/Makefile index 13ce9fc9d2..a74dd2fa2b 100644 --- a/board/emk/top860/Makefile +++ b/board/emk/top860/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = lib$(BOARD).a -OBJS = $(BOARD).o flash.o +OBJS = $(BOARD).o ../common/flash.o ../common/vpd.o ../common/am79c874.o $(LIB): .depend $(OBJS) $(AR) crv $@ $(OBJS) diff --git a/board/emk/top860/flash.c b/board/emk/top860/flash.c deleted file mode 100644 index 0f827df06d..0000000000 --- a/board/emk/top860/flash.c +++ /dev/null @@ -1,489 +0,0 @@ -/* - * (C) Copyright 2003 - * EMK Elektronik GmbH - * Reinhard Meyer - * - * copied from the BMW Port - seems that its similiar enough - * to be easily adaped ;) --- Well, it turned out to become a - * merger between parts of the EMKstax Flash routines and the - * BMW funtion frames... - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#define FLASH_WORD_SIZE unsigned short -#define FLASH_WORD_WIDTH (sizeof (FLASH_WORD_SIZE)) - -flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ - -/*----------------------------------------------------------------------- - * Functions - */ -static int write_word (flash_info_t *info, ulong dest, ulong data); - - -/***************************************************************************** - * software product ID entry/exit - *****************************************************************************/ -static void FlashProductIdMode ( - volatile FLASH_WORD_SIZE *b, - int on_off) -{ - b[0x5555] = 0xaa; - b[0x2aaa] = 0x55; - b[0x5555] = on_off ? 0x90 : 0xf0; -} - -/***************************************************************************** - * sector erase start - *****************************************************************************/ -static void FlashSectorErase ( - volatile FLASH_WORD_SIZE *b, - volatile FLASH_WORD_SIZE *a) -{ - b[0x5555] = 0xaa; - b[0x2aaa] = 0x55; - b[0x5555] = 0x80; - b[0x5555] = 0xaa; - b[0x2aaa] = 0x55; - a[0] = 0x30; -} - -/***************************************************************************** - * program a word - *****************************************************************************/ -static void FlashProgWord ( - volatile FLASH_WORD_SIZE *b, - volatile FLASH_WORD_SIZE *a, - FLASH_WORD_SIZE v) -{ - b[0x5555] = 0xaa; - b[0x2aaa] = 0x55; - b[0x5555] = 0xa0; - a[0] = v; -} - -/***************************************************************************** - * reset bank, back to read mode - *****************************************************************************/ -static void FlashReset (volatile FLASH_WORD_SIZE *b) -{ - b[0] = 0xf0; -} - -/***************************************************************************** - * identify FLASH chip - * this code is a stripped version of the FlashGetType() function in EMKstax - *****************************************************************************/ -unsigned long flash_init (void) -{ - volatile FLASH_WORD_SIZE * const flash = (volatile FLASH_WORD_SIZE *) CFG_FLASH_BASE; - FLASH_WORD_SIZE manu, dev; - flash_info_t * const pflinfo = &flash_info[0]; - int j; - - /* get Id Bytes */ - FlashProductIdMode (flash, 1); - manu = flash[0]; - dev = flash[1]; - FlashProductIdMode (flash, 0); - - pflinfo->size = 0; - pflinfo->sector_count = 0; - pflinfo->flash_id = 0xffffffff; - pflinfo->portwidth = FLASH_CFI_16BIT; - pflinfo->chipwidth = FLASH_CFI_BY16; - - switch (manu&0xff) - { - case 0x01: /* AMD */ - pflinfo->flash_id = FLASH_MAN_AMD; - switch (dev&0xff) - { - case 0x49: - pflinfo->size = 0x00200000; - pflinfo->sector_count = 35; - pflinfo->flash_id |= FLASH_AM160B; - pflinfo->start[0] = CFG_FLASH_BASE; - pflinfo->start[1] = CFG_FLASH_BASE + 0x4000; - pflinfo->start[2] = CFG_FLASH_BASE + 0x6000; - pflinfo->start[3] = CFG_FLASH_BASE + 0x8000; - for (j = 4; j < 35; j++) - { - pflinfo->start[j] = CFG_FLASH_BASE + 0x00010000 * (j-3); - } - break; - - case 0xf9: - pflinfo->size = 0x00400000; - pflinfo->sector_count = 71; - pflinfo->flash_id |= FLASH_AM320B; - pflinfo->start[0] = CFG_FLASH_BASE; - pflinfo->start[1] = CFG_FLASH_BASE + 0x4000; - pflinfo->start[2] = CFG_FLASH_BASE + 0x6000; - pflinfo->start[3] = CFG_FLASH_BASE + 0x8000; - for (j = 0; j < 8; j++) - { - pflinfo->start[j] = CFG_FLASH_BASE + 0x00002000 * (j); - } - for (j = 8; j < 71; j++) - { - pflinfo->start[j] = CFG_FLASH_BASE + 0x00010000 * (j-7); - } - break; - - default: - printf ("unknown AMD dev=%x ", dev); - pflinfo->flash_id |= FLASH_UNKNOWN; - } - break; - - default: - printf ("unknown manu=%x ", manu); - } - return pflinfo->size; -} - -/***************************************************************************** - * print info about a FLASH - *****************************************************************************/ -void flash_print_info (flash_info_t *info) -{ - static const char unk[] = "Unknown"; - unsigned int i; - const char *mfct=unk, - *type=unk; - - if(info->flash_id != FLASH_UNKNOWN) - { - switch (info->flash_id & FLASH_VENDMASK) - { - case FLASH_MAN_AMD: - mfct = "AMD"; - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) - { - case FLASH_AM160B: - type = "AM29LV160B (16 Mbit, bottom boot sect)"; - break; - case FLASH_AM320B: - type = "AM29LV320B (32 Mbit, bottom boot sect)"; - break; - } - } - - printf ( - "\n Brand: %s Type: %s\n" - " Size: %lu KB in %d Sectors\n", - mfct, - type, - info->size >> 10, - info->sector_count - ); - - printf (" Sector Start Addresses:"); - - for (i = 0; i < info->sector_count; i++) - { - unsigned long size; - unsigned int erased; - unsigned long *flash = (unsigned long *) info->start[i]; - - /* - * Check if whole sector is erased - */ - size = - (i != (info->sector_count - 1)) ? - (info->start[i + 1] - info->start[i]) >> 2 : - (info->start[0] + info->size - info->start[i]) >> 2; - - for ( - flash = (unsigned long *) info->start[i], erased = 1; - (flash != (unsigned long *) info->start[i] + size) && erased; - flash++ - ) - erased = *flash == ~0x0UL; - - printf ( - "%s %08lX %s %s", - (i % 5) ? "" : "\n ", - info->start[i], - erased ? "E" : " ", - info->protect[i] ? "RO" : " " - ); - } - - puts ("\n"); - return; -} - -/***************************************************************************** - * erase one or more sectors - *****************************************************************************/ -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); - int flag, - prot, - sect, - l_sect; - ulong start, - now, - last; - - if ((s_first < 0) || (s_first > s_last)) - { - if (info->flash_id == FLASH_UNKNOWN) - { - printf ("- missing\n"); - } - else - { - printf ("- no sectors to erase\n"); - } - return 1; - } - - if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) - { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) - { - if (info->protect[sect]) - { - prot++; - } - } - - if (prot) - { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } - else - { - printf ("\n"); - } - - l_sect = -1; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) - { - if (info->protect[sect] == 0) - { /* not protected */ - FlashSectorErase ((FLASH_WORD_SIZE *)info->start[0], (FLASH_WORD_SIZE *)info->start[sect]); - l_sect = sect; - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer (0); - last = start; - addr = (FLASH_WORD_SIZE *)info->start[l_sect]; - while ((addr[0] & 0x0080) != 0x0080) - { - if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) - { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) - { /* every second */ - serial_putc ('.'); - last = now; - } - } - - DONE: - /* reset to read mode */ - FlashReset ((FLASH_WORD_SIZE *)info->start[0]); - - printf (" done\n"); - return 0; -} - -/***************************************************************************** - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - *****************************************************************************/ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, - wp, - data; - int i, - l, - rc; - - wp = (addr & ~(FLASH_WORD_WIDTH-1)); /* get lower word aligned address */ - - /* - * handle unaligned start bytes, if there are... - */ - if ((l = addr - wp) != 0) - { - data = 0; - - /* get the current before the new data into our data word */ - for (i=0, cp=wp; i0; ++i, ++cp, --cnt) - { - data = (data << 8) | *src++; - } - - /* get the current after the new data into our data word */ - for (; cnt==0 && i= FLASH_WORD_WIDTH) - { - data = 0; - for (i=0; i0; ++i, ++cp) - { - data = (data << 8) | *src++; - --cnt; - } - - /* get the current after the new data into our data word */ - for (; istart[0]; - volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; - FLASH_WORD_SIZE data2 = data; - ulong start; - int flag; - - /* Check if Flash is (sufficiently) erased */ - if ((*dest2 & data2) != data2) - { - return (2); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - FlashProgWord (addr2, dest2, data2); - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts (); - - /* data polling for D7 */ - start = get_timer (0); - while ((*dest2 & 0x0080) != (data2 & 0x0080)) - { - if (get_timer (start) > CFG_FLASH_WRITE_TOUT) - { - return (1); - } - } - - return (0); -} - -/*----------------------------------------------------------------------- - */ diff --git a/board/emk/top860/top860.c b/board/emk/top860/top860.c index d13be98e9e..931c0d1b67 100644 --- a/board/emk/top860/top860.c +++ b/board/emk/top860/top860.c @@ -119,6 +119,20 @@ long int initdram (int board_type) return -(memctl->memc_or2 & 0xffff0000); } +/***************************************************************************** + * prepare for FLASH detection + *****************************************************************************/ +void flash_preinit(void) +{ +} + +/***************************************************************************** + * finalize FLASH setup + *****************************************************************************/ +void flash_afterinit(uint bank, ulong start, ulong size) +{ +} + /***************************************************************************** * otherinits after RAM is there and we are relocated to RAM * note: though this is an int function, nobody cares for the result! @@ -126,52 +140,9 @@ long int initdram (int board_type) int misc_init_r (void) { /* read 'factory' part of EEPROM */ - uchar buf[81]; - uchar *p; - uint length; - uint addr; - uint len; - - /* get length first */ - addr = CFG_FACT_OFFSET; - if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) { - bailout: - printf ("cannot read factory configuration\n"); - printf ("be sure to set ethaddr yourself!\n"); - return 0; - } - length = buf[0] + (buf[1] << 8); - addr += 2; + extern void read_factory_r (void); + read_factory_r (); - /* sanity check */ - if (length < 20 || length > CFG_FACT_SIZE - 2) - goto bailout; - - /* read lines */ - while (length > 0) { - /* read one line */ - len = length > 80 ? 80 : length; - if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len)) - goto bailout; - /* mark end of buffer */ - buf[len] = 0; - /* search end of line */ - for (p = buf; *p && *p != 0x0a; p++); - if (!*p) - goto bailout; - *p++ = 0; - /* advance to next line start */ - length -= p - buf; - addr += p - buf; - /*printf ("%s\n", buf); */ - /* search for our specific entry */ - if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) { - setenv ("ethaddr", buf + 19); - } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) { - setenv ("serial#", buf + 15); - } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) { - setenv ("board_id", buf + 13); - } - } return (0); } + diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 709e1a4d62..b1adde617c 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -709,6 +709,18 @@ void print_mip405_rev (void) var, pcbrev + 'A', part & 0x7F, vers); } + +#ifdef CONFIG_POST +/* + * Returns 1 if keys pressed to start the power-on long-running tests + * Called from board_init_f(). + */ +int post_hotkeys_pressed(void) +{ + return 0; /* No hotkeys supported */ +} +#endif + extern void mem_test_reloc(void); extern int mk_date (char *, struct rtc_time *); diff --git a/board/omap1610inn/omap1610innovator.c b/board/omap1610inn/omap1610innovator.c index d737f1b330..0f67a0c590 100644 --- a/board/omap1610inn/omap1610innovator.c +++ b/board/omap1610inn/omap1610innovator.c @@ -10,6 +10,8 @@ * Texas Instruments, * Kshitij Gupta * + * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004 + * * See file CREDITS for list of people who contributed to this * project. * @@ -105,7 +107,28 @@ void flash__init (void) *************************************************************/ void ether__init (void) { -#define ETH_CONTROL_REG 0x0400000b +#define ETH_CONTROL_REG 0x0400030b + +#ifdef CONFIG_H2_OMAP1610 + #define LAN_RESET_REGISTER 0x0400001c + + /* The debug board on which the lan chip resides may not be powered + * ON at the same time as the OMAP chip. So wait in a loop until the + * lan reset register (on the debug board) is available (powered on) + * and reset the lan chip. + */ + + *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000; + do { + *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0001; + udelay (3); + } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0001); + + do { + *((volatile unsigned short *) LAN_RESET_REGISTER) = 0x0000; + udelay (3); + } while (*((volatile unsigned short *) LAN_RESET_REGISTER) != 0x0000); +#endif *((volatile unsigned char *) ETH_CONTROL_REG) &= ~0x01; udelay (3); diff --git a/board/omap1610inn/platform.S b/board/omap1610inn/platform.S index cad152b7b2..17756953ea 100644 --- a/board/omap1610inn/platform.S +++ b/board/omap1610inn/platform.S @@ -5,6 +5,8 @@ * Texas Instruments, * Kshitij Gupta * + * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004 + * * See file CREDITS for list of people who contributed to this * project. * @@ -248,6 +250,22 @@ common_tc: ldr r1, VAL_TC_EMIFS_CS3_CONFIG ldr r0, REG_TC_EMIFS_CS3_CONFIG str r1, [r0] /* Chip Select 3 */ + +#ifdef CONFIG_H2_OMAP1610 + /* inserting additional 2 clock cycle hold time for LAN */ + ldr r0, REG_TC_EMIFS_CS1_ADVANCED + ldr r1, VAL_TC_EMIFS_CS1_ADVANCED + str r1, [r0] +#endif + /* Start MPU Timer 1 */ + ldr r0, REG_MPU_LOAD_TIMER + ldr r1, VAL_MPU_LOAD_TIMER + str r1, [r0] + + ldr r0, REG_MPU_CNTL_TIMER + ldr r1, VAL_MPU_CNTL_TIMER + str r1, [r0] + /* back to arch calling code */ mov pc, lr @@ -266,6 +284,11 @@ REG_TC_EMIFS_CS2_CONFIG: /* 32 bits */ REG_TC_EMIFS_CS3_CONFIG: /* 32 bits */ .word 0xfffecc1c +#ifdef CONFIG_H2_OMAP1610 +REG_TC_EMIFS_CS1_ADVANCED: /* 32 bits */ + .word 0xfffecc54 +#endif + /* MPU clock/reset/power mode control registers */ REG_ARM_CKCTL: /* 16 bits */ .word 0xfffece00 @@ -338,6 +361,11 @@ REG_DLL_LRD_CONTROL: REG_WATCHDOG: .word 0xfffec808 +REG_MPU_LOAD_TIMER: + .word 0xfffec600 +REG_MPU_CNTL_TIMER: + .word 0xfffec500 + /* 96 MHz Samsung Mobile DDR */ SDRAM_CONFIG_VAL: .word 0x001200f4 @@ -350,6 +378,7 @@ VAL_ARM_CKCTL: VAL_DPLL1_CTL: .word 0x2830 +#ifdef CONFIG_INNOVATOROMAP1610 VAL_TC_EMIFS_CS0_CONFIG: .word 0x002130b0 VAL_TC_EMIFS_CS1_CONFIG: @@ -358,6 +387,21 @@ VAL_TC_EMIFS_CS2_CONFIG: .word 0x000055f0 VAL_TC_EMIFS_CS3_CONFIG: .word 0x88011131 +#endif + +#ifdef CONFIG_H2_OMAP1610 +VAL_TC_EMIFS_CS0_CONFIG: + .word 0x00203331 +VAL_TC_EMIFS_CS1_CONFIG: + .word 0x8180fff3 +VAL_TC_EMIFS_CS2_CONFIG: + .word 0xf800f22a +VAL_TC_EMIFS_CS3_CONFIG: + .word 0x88011131 +VAL_TC_EMIFS_CS1_ADVANCED: + .word 0x00000022 +#endif + VAL_TC_EMIFF_SDRAM_CONFIG: .word 0x010290fc VAL_TC_EMIFF_MRS: @@ -376,6 +420,11 @@ WATCHDOG_VAL1: WATCHDOG_VAL2: .word 0x000000a0 +VAL_MPU_LOAD_TIMER: + .word 0xffffffff +VAL_MPU_CNTL_TIMER: + .word 0xffffffa1 + /* command values */ .equ CMD_SDRAM_NOP, 0x00000000 .equ CMD_SDRAM_PRECHARGE, 0x00000001 diff --git a/cpu/74xx_7xx/traps.c b/cpu/74xx_7xx/traps.c index 6e94601ccc..ac5f8bfeb5 100644 --- a/cpu/74xx_7xx/traps.c +++ b/cpu/74xx_7xx/traps.c @@ -140,19 +140,18 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ",regs); - switch( regs->msr & 0x0000F000) - { - case (1<<12) : + switch( regs->msr & 0x000F0000) { + case (0x80000000>>12): printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; - case (1<<13) : + case (0x80000000>>13): printf("Transfer error ack signal\n"); break; - case (1<<14) : + case (0x80000000>>14): printf("Data parity signal\n"); break; - case (1<<15) : + case (0x80000000>>15): printf("Address parity signal\n"); break; default: diff --git a/cpu/arm926ejs/interrupts.c b/cpu/arm926ejs/interrupts.c index 3985217c4f..4d6efebebe 100644 --- a/cpu/arm926ejs/interrupts.c +++ b/cpu/arm926ejs/interrupts.c @@ -1,4 +1,7 @@ /* + * (C) Copyright 2003 + * Texas Instruments + * * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Marius Groeger @@ -31,7 +34,6 @@ #include #include -#include #include @@ -47,12 +49,14 @@ void enable_interrupts (void) { unsigned long temp; __asm__ __volatile__("mrs %0, cpsr\n" - "bic %0, %0, #0x80\n" - "msr cpsr_c, %0" - : "=r" (temp) - : "memory"); + "bic %0, %0, #0x80\n" + "msr cpsr_c, %0" + : "=r" (temp) + : + : "memory"); } + /* * disable IRQ/FIQ interrupts * returns true if interrupts had been enabled before we disabled them @@ -61,10 +65,11 @@ int disable_interrupts (void) { unsigned long old,temp; __asm__ __volatile__("mrs %0, cpsr\n" - "orr %1, %0, #0xc0\n" - "msr cpsr_c, %1" - : "=r" (old), "=r" (temp) - : "memory"); + "orr %1, %0, #0xc0\n" + "msr cpsr_c, %1" + : "=r" (old), "=r" (temp) + : + : "memory"); return (old & 0x80) == 0; } #else @@ -179,10 +184,14 @@ int interrupt_init (void) { int32_t val; + /* Start the decrementer ticking down from 0xffffffff */ *((int32_t *) (CFG_TIMERBASE + LOAD_TIM)) = TIMER_LOAD_VAL; - val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | - (CFG_PVT << MPUTIM_PTV_BIT); + val = MPUTIM_ST | MPUTIM_AR | MPUTIM_CLOCK_ENABLE | (CFG_PVT << MPUTIM_PTV_BIT); *((int32_t *) (CFG_TIMERBASE + CNTL_TIMER)) = val; + + /* init the timestamp and lastdec value */ + reset_timer_masked(); + return (0); } @@ -205,44 +214,50 @@ void set_timer (ulong t) timestamp = t; } -/* very rough timer... */ +/* delay x useconds AND perserve advance timstamp value */ void udelay (unsigned long usec) { -#ifdef CONFIG_INNOVATOROMAP1610 -#define LOOPS_PER_MSEC 100 /* tuned on omap1610 */ - volatile int i, time_remaining = LOOPS_PER_MSEC * usec; - - for (i = time_remaining; i > 0; i--) { + ulong tmo, tmp; + + if(usec >= 1000){ /* if "big" number, spread normalization to seconds */ + tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ + tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ + tmo /= 1000; /* finish normalize. */ + }else{ /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CFG_HZ; + tmo /= (1000*1000); } -#else - ulong tmo; - tmo = usec / 1000; - tmo *= CFG_HZ; - tmo /= 1000; - tmo += get_timer (0); - while (get_timer_masked () < tmo) + tmp = get_timer (0); /* get current timestamp */ + if( (tmo + tmp) < tmp ) /* if setting this fordward will roll time stamp */ + reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastdec value */ + else + tmo += tmp; /* else, set advancing stamp wake up time */ + + while (get_timer_masked () < tmo)/* loop till event */ /*NOP*/; -#endif } void reset_timer_masked (void) { /* reset time */ - lastdec = READ_TIMER; - timestamp = 0; + lastdec = READ_TIMER; /* capure current decrementer value time */ + timestamp = 0; /* start "advancing" time stamp from 0 */ } ulong get_timer_masked (void) { ulong now = READ_TIMER; /* current tick value */ - if (lastdec >= now) { /* did I roll (rem decrementer) */ + if (lastdec >= now) { /* normal mode (non roll) */ /* normal mode */ - /* record amount of time since last check */ - timestamp += lastdec - now; - } else { - /* we have an overflow ... */ + timestamp += lastdec - now; /* move stamp fordward with absoulte diff ticks */ + } else { /* we have overflow of the count down timer */ + /* nts = ts + ld + (TLV - now) + * ts=old stamp, ld=time that passed before passing through -1 + * (TLV-now) amount of time after passing though -1 + * nts = new "advancing time stamp"...it could also roll and cause problems. + */ timestamp += lastdec + TIMER_LOAD_VAL - now; } lastdec = now; @@ -250,25 +265,24 @@ ulong get_timer_masked (void) return timestamp; } +/* waits specified delay value and resets timestamp */ void udelay_masked (unsigned long usec) { -#ifdef CONFIG_INNOVATOROMAP1610 - #define LOOPS_PER_MSEC 100 /* tuned on omap1610 */ - volatile int i, time_remaining = LOOPS_PER_MSEC*usec; - for (i=time_remaining; i>0; i--) { } -#else - - ulong tmo; + ulong tmo, tmp; + + if(usec >= 1000){ /* if "big" number, spread normalization to seconds */ + tmo = usec / 1000; /* start to normalize for usec to ticks per sec */ + tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */ + tmo /= 1000; /* finish normalize. */ + }else{ /* else small number, don't kill it prior to HZ multiply */ + tmo = usec * CFG_HZ; + tmo /= (1000*1000); + } - tmo = usec / 1000; - tmo *= CFG_HZ; - tmo /= 1000; + reset_timer_masked (); /* set "advancing" timestamp to 0, set lastdec vaule */ - reset_timer_masked (); - - while (get_timer_masked () < tmo) + while (get_timer_masked () < tmo) /* wait for time stamp to overtake tick number.*/ /*NOP*/; -#endif } /* @@ -287,6 +301,7 @@ unsigned long long get_ticks(void) ulong get_tbclk (void) { ulong tbclk; + tbclk = CFG_HZ; return tbclk; } diff --git a/cpu/mpc5xx/traps.c b/cpu/mpc5xx/traps.c index 41939c15d8..14fd59e4fa 100644 --- a/cpu/mpc5xx/traps.c +++ b/cpu/mpc5xx/traps.c @@ -139,18 +139,17 @@ void MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ",regs); - switch( regs->msr & 0x0000F000) - { - case (1<<12) : + switch( regs->msr & 0x000F0000) { + case (0x80000000>>12): printf("Machine check signal\n"); break; - case (1<<13) : + case (0x80000000>>13): printf("Transfer error ack signal\n"); break; - case (1<<14) : + case (0x80000000>>14): printf("Data parity signal\n"); break; - case (1<<15) : + case (0x80000000>>15): printf("Address parity signal\n"); break; default: diff --git a/cpu/mpc5xxx/traps.c b/cpu/mpc5xxx/traps.c index 5d43394523..2ee782b9c8 100644 --- a/cpu/mpc5xxx/traps.c +++ b/cpu/mpc5xxx/traps.c @@ -5,6 +5,7 @@ * * Modified by Cort Dougan (cort@cs.nmt.edu) * and Paul Mackerras (paulus@cs.anu.edu.au) + * fixed Machine Check Reasons by Reinhard Meyer (r.meyer@emk-elektronik.de) * * (C) Copyright 2000-2003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -130,19 +131,20 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ",regs); - switch( regs->msr & 0x0000F000) + /* refer to 603e Manual (MPC603EUM/AD), chapter 4.5.2.1 */ + switch( regs->msr & 0x000F0000) { - case (1<<12) : + case (0x80000000>>12) : printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; - case (1<<13) : + case (0x80000000>>13) : printf("Transfer error ack signal\n"); break; - case (1<<14) : + case (0x80000000>>14) : printf("Data parity signal\n"); break; - case (1<<15) : + case (0x80000000>>15) : printf("Address parity signal\n"); break; default: diff --git a/cpu/mpc824x/traps.c b/cpu/mpc824x/traps.c index 956244f386..071d003f8c 100644 --- a/cpu/mpc824x/traps.c +++ b/cpu/mpc824x/traps.c @@ -120,19 +120,18 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ",regs); - switch( regs->msr & 0x0000F000) - { - case (1<<12) : + switch( regs->msr & 0x000F0000) { + case (0x80000000>>12): printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; - case (1<<13) : + case (0x80000000>>13): printf("Transfer error ack signal\n"); break; - case (1<<14) : + case (0x80000000>>14): printf("Data parity signal\n"); break; - case (1<<15) : + case (0x80000000>>15): printf("Address parity signal\n"); break; default: diff --git a/cpu/mpc8260/traps.c b/cpu/mpc8260/traps.c index deab808297..693db39085 100644 --- a/cpu/mpc8260/traps.c +++ b/cpu/mpc8260/traps.c @@ -158,18 +158,18 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ",regs); - switch( regs->msr & 0x0000F000) { - case (1<<12) : + switch( regs->msr & 0x000F0000) { + case (0x80000000>>12): printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; - case (1<<13) : + case (0x80000000>>13): printf("Transfer error ack signal\n"); break; - case (1<<14) : + case (0x80000000>>14): printf("Data parity signal\n"); break; - case (1<<15) : + case (0x80000000>>15): printf("Address parity signal\n"); break; default: diff --git a/cpu/mpc85xx/traps.c b/cpu/mpc85xx/traps.c index fd0b436cfa..a348eab2ff 100644 --- a/cpu/mpc85xx/traps.c +++ b/cpu/mpc85xx/traps.c @@ -164,19 +164,18 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ",regs); - switch( regs->msr & 0x0000F000) - { - case (1<<12) : + switch( regs->msr & 0x000F0000) { + case (0x80000000>>12): printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; - case (1<<13) : + case (0x80000000>>13): printf("Transfer error ack signal\n"); break; - case (1<<14) : + case (0x80000000>>14): printf("Data parity signal\n"); break; - case (1<<15) : + case (0x80000000>>15): printf("Address parity signal\n"); break; default: diff --git a/cpu/mpc8xx/traps.c b/cpu/mpc8xx/traps.c index c432be6030..67b75cce2f 100644 --- a/cpu/mpc8xx/traps.c +++ b/cpu/mpc8xx/traps.c @@ -134,19 +134,18 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ",regs); - switch( regs->msr & 0x0000F000) - { - case (1<<12) : + switch( regs->msr & 0x000F0000) { + case (0x80000000>>12): printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; - case (1<<13) : + case (0x80000000>>13): printf("Transfer error ack signal\n"); break; - case (1<<14) : + case (0x80000000>>14): printf("Data parity signal\n"); break; - case (1<<15) : + case (0x80000000>>15): printf("Address parity signal\n"); break; default: diff --git a/cpu/nios/interrupts.c b/cpu/nios/interrupts.c index 31eabde53d..450946bbc3 100644 --- a/cpu/nios/interrupts.c +++ b/cpu/nios/interrupts.c @@ -128,6 +128,10 @@ int interrupt_init (void) tmr->control &= ~NIOS_TIMER_ITO; tmr->control |= NIOS_TIMER_STOP; +#if defined(CFG_NIOS_TMRCNT) + tmr->periodl = CFG_NIOS_TMRCNT & 0xffff; + tmr->periodh = (CFG_NIOS_TMRCNT >> 16) & 0xffff; +#endif #endif for (vec=0; vec<64; vec++ ) { diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile index 9b54d32758..a841109e8d 100644 --- a/cpu/ppc4xx/Makefile +++ b/cpu/ppc4xx/Makefile @@ -28,7 +28,7 @@ LIB = lib$(CPU).a START = start.o resetvec.o kgdb.o AOBJS = dcr.o COBJS = 405gp_enet.o 405gp_pci.o 440gx_enet.o \ - bedbug_405.o \ + bedbug_405.o commproc.o \ cpu.o cpu_init.o i2c.o interrupts.o \ miiphy.o miiphy_440.o sdram.o serial.o \ spd_sdram.o speed.o traps.o diff --git a/cpu/ppc4xx/commproc.c b/cpu/ppc4xx/commproc.c new file mode 100644 index 0000000000..68aab5b7ea --- /dev/null +++ b/cpu/ppc4xx/commproc.c @@ -0,0 +1,69 @@ +/* + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * + * Atapted for ppc4XX by Denis Peter + */ + +#include +#include + + +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) + +void post_word_store (ulong a) +{ + volatile void *save_addr = (volatile void *)(CFG_OCM_DATA_ADDR + CFG_POST_WORD_ADDR); + *(volatile ulong *) save_addr = a; +} + +ulong post_word_load (void) +{ + volatile void *save_addr = (volatile void *)(CFG_OCM_DATA_ADDR + CFG_POST_WORD_ADDR); + return *(volatile ulong *) save_addr; +} + +#endif /* CONFIG_POST || CONFIG_LOGBUFFER*/ + +#ifdef CONFIG_BOOTCOUNT_LIMIT + +void bootcount_store (ulong a) +{ + volatile ulong *save_addr = + (volatile ulong *)(CFG_OCM_DATA_ADDR + CFG_BOOTCOUNT_ADDR); + + save_addr[0] = a; + save_addr[1] = BOOTCOUNT_MAGIC; +} + +ulong bootcount_load (void) +{ + volatile ulong *save_addr = + (volatile ulong *)(CFG_OCM_DATA_ADDR + CFG_BOOTCOUNT_ADDR); + + if (save_addr[1] != BOOTCOUNT_MAGIC) + return 0; + else + return save_addr[0]; +} + +#endif /* CONFIG_BOOTCOUNT_LIMIT */ diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c index 1cf899eb73..6aecca2db9 100644 --- a/cpu/ppc4xx/traps.c +++ b/cpu/ppc4xx/traps.c @@ -164,19 +164,18 @@ MachineCheckException(struct pt_regs *regs) printf("Machine check in kernel mode.\n"); printf("Caused by (from msr): "); printf("regs %p ",regs); - switch( regs->msr & 0x0000F000) - { - case (1<<12) : + switch( regs->msr & 0x000F0000) { + case (0x80000000>>12): printf("Machine check signal - probably due to mm fault\n" "with mmu off\n"); break; - case (1<<13) : + case (0x80000000>>13): printf("Transfer error ack signal\n"); break; - case (1<<14) : + case (0x80000000>>14): printf("Data parity signal\n"); break; - case (1<<15) : + case (0x80000000>>15): printf("Address parity signal\n"); break; default: diff --git a/doc/README.nios b/doc/README.nios index 08f4e7ef98..d3a9277b2a 100644 --- a/doc/README.nios +++ b/doc/README.nios @@ -100,6 +100,9 @@ CFG_NIOS_TMRIRQ -- the interrupt request (vector number) assigned to CFG_NIOS_TMRMS -- the period of the timer in milliseconds. +CFG_NIOS_TMRCNT -- the preloadable counter value for the timer if it has + no fixed period. + CFG_NIOS_ASMIBASE -- the base address of the ASMI peripheral. (standard-32: na_asmi_base). diff --git a/include/asm-nios/cache.h b/include/asm-nios/cache.h new file mode 100644 index 0000000000..3cdb7039ff --- /dev/null +++ b/include/asm-nios/cache.h @@ -0,0 +1 @@ +/*FIXME: Implement this! */ diff --git a/include/asm-nios/global_data.h b/include/asm-nios/global_data.h index 935d08e54b..fd1138920c 100644 --- a/include/asm-nios/global_data.h +++ b/include/asm-nios/global_data.h @@ -34,6 +34,10 @@ typedef struct global_data { unsigned long reloc_off; /* Relocation Offset */ unsigned long env_addr; /* Address of Environment struct */ unsigned long env_valid; /* Checksum of Environment valid */ +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) + unsigned long post_log_word; /* Record POST activities */ + unsigned long post_init_f_time; /* When post_init_f started */ +#endif void **jt; /* Standalone app jump table */ } gd_t; diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h index 2d77dd7938..9b4f144fd2 100644 --- a/include/configs/DK1C20.h +++ b/include/configs/DK1C20.h @@ -146,17 +146,60 @@ #if (CFG_NIOS_CPU_TICK_TIMER == 0) -#error *** CFG_ERROR: tick timer at TIMER0 not supported, expand your config.h +#define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER0 /* TIMER0 as tick */ +#define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER0_IRQ + +#if (CFG_NIOS_CPU_TIMER0_FP == 1) /* fixed period */ + +#if (CFG_NIOS_CPU_TIMER0_PER >= CFG_HZ) +#define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER0_PER / CFG_HZ) +#else +#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ +#endif + +#undef CFG_NIOS_TMRCNT /* no preloadable counter value */ + +#elif (CFG_NIOS_CPU_TIMER0_FP == 0) /* variable period */ + +#if (CFG_HZ <= 1000) +#define CFG_NIOS_TMRMS (1000 / CFG_HZ) +#else +#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000 +#endif + +#define CFG_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CFG_HZ) + +#else +#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER0_FP correct +#endif #elif (CFG_NIOS_CPU_TICK_TIMER == 1) #define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER1 /* TIMER1 as tick */ #define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER1_IRQ +#if (CFG_NIOS_CPU_TIMER1_FP == 1) /* fixed period */ + #if (CFG_NIOS_CPU_TIMER1_PER >= CFG_HZ) #define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER1_PER / CFG_HZ) #else -#error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ +#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ +#endif + +#undef CFG_NIOS_TMRCNT /* no preloadable counter value */ + +#elif (CFG_NIOS_CPU_TIMER1_FP == 0) /* variable period */ + +#if (CFG_HZ <= 1000) +#define CFG_NIOS_TMRMS (1000 / CFG_HZ) +#else +#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000 +#endif + +#define CFG_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CFG_HZ) + +#else +#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER1_FP correct #endif #endif /* CFG_NIOS_CPU_TICK_TIMER */ diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h index 835c7a23e1..e5e487c65d 100644 --- a/include/configs/DK1S10.h +++ b/include/configs/DK1S10.h @@ -168,10 +168,28 @@ #define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER0 /* TIMER0 as tick */ #define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER0_IRQ +#if (CFG_NIOS_CPU_TIMER0_FP == 1) /* fixed period */ + #if (CFG_NIOS_CPU_TIMER0_PER >= CFG_HZ) #define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER0_PER / CFG_HZ) #else -#error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ +#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ +#endif + +#undef CFG_NIOS_TMRCNT /* no preloadable counter value */ + +#elif (CFG_NIOS_CPU_TIMER0_FP == 0) /* variable period */ + +#if (CFG_HZ <= 1000) +#define CFG_NIOS_TMRMS (1000 / CFG_HZ) +#else +#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000 +#endif + +#define CFG_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CFG_HZ) + +#else +#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER0_FP correct #endif #elif (CFG_NIOS_CPU_TICK_TIMER == 1) @@ -179,10 +197,28 @@ #define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER1 /* TIMER1 as tick */ #define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER1_IRQ +#if (CFG_NIOS_CPU_TIMER1_FP == 1) /* fixed period */ + #if (CFG_NIOS_CPU_TIMER1_PER >= CFG_HZ) #define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER1_PER / CFG_HZ) #else -#error *** CFG_ERROR: you have to use a timer periode of more than CFG_HZ +#error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ +#endif + +#undef CFG_NIOS_TMRCNT /* no preloadable counter value */ + +#elif (CFG_NIOS_CPU_TIMER1_FP == 0) /* variable period */ + +#if (CFG_HZ <= 1000) +#define CFG_NIOS_TMRMS (1000 / CFG_HZ) +#else +#error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000 +#endif + +#define CFG_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CFG_HZ) + +#else +#error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER1_FP correct #endif #endif /* CFG_NIOS_CPU_TICK_TIMER */ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index cfe74e1b6f..39419d05e3 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -55,20 +55,21 @@ ***********************************************************/ #define MIP405_COMMON_CMDS \ (CONFIG_CMD_DFL | \ - CFG_CMD_IDE | \ - CFG_CMD_DHCP | \ CFG_CMD_CACHE | \ - CFG_CMD_PCI | \ - CFG_CMD_IRQ | \ + CFG_CMD_DATE | \ + CFG_CMD_DHCP | \ CFG_CMD_ECHO | \ CFG_CMD_EEPROM | \ - CFG_CMD_I2C | \ - CFG_CMD_REGINFO | \ - CFG_CMD_DATE | \ CFG_CMD_ELF | \ + CFG_CMD_FAT | \ + CFG_CMD_I2C | \ + CFG_CMD_IDE | \ + CFG_CMD_IRQ | \ + CFG_CMD_JFFS2 | \ CFG_CMD_MII | \ - CFG_CMD_FAT | \ + CFG_CMD_PCI | \ CFG_CMD_PING | \ + CFG_CMD_REGINFO | \ CFG_CMD_SAVES | \ CFG_CMD_BSP ) @@ -235,6 +236,9 @@ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ +#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */ +#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */ + /*----------------------------------------------------------------------- * Cache Configuration */ @@ -244,6 +248,25 @@ #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif +/*----------------------------------------------------------------------- + * Logbuffer Configuration + */ +#undef CONFIG_LOGBUFFER /* supported but not enabled */ +/*----------------------------------------------------------------------- + * Bootcountlimit Configuration + */ +#undef CONFIG_BOOTCOUNT_LIMIT /* supported but not enabled */ + +/*----------------------------------------------------------------------- + * POST Configuration + */ +#if 0 /* enable this if POST is desired (is supported but not enabled) */ +#define CONFIG_POST (CFG_POST_MEMORY | \ + CFG_POST_CPU | \ + CFG_POST_RTC | \ + CFG_POST_I2C) + +#endif /* * Init Memory Controller: */ @@ -273,7 +296,16 @@ #define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of On Chip SRAM */ #define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) -#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET +/* reserve some memory for POST and BOOT limit info */ +#define CFG_INIT_SP_OFFSET (CFG_GBL_DATA_OFFSET - 32) + +#ifdef CONFIG_POST /* reserve one word for POST Info */ +#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 4) +#endif + +#ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */ +#define CFG_BOOTCOUNT_ADDR (CFG_GBL_DATA_OFFSET - 12) +#endif /* * Internal Definitions @@ -298,7 +330,8 @@ ***********************************************************/ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 1 /* PHY address */ - +#define CONFIG_PHY_RESET_DELAY 300 /* Intel LXT971A needs this */ +#define CONFIG_PHY_CMD_DELAY 40 /* Intel LXT971A needs this */ /************************************************************ * RTC ***********************************************************/ diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h index 8ff264b6af..bdb7a46d89 100644 --- a/include/configs/TOP5200.h +++ b/include/configs/TOP5200.h @@ -314,7 +314,19 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ -#define CONFIG_RTC_MPC5200 1 /* use 5200 RTC */ +#ifdef CONFIG_EVAL5200 /* M48T08 is available with the Evaluation board only */ + #define CONFIG_RTC_MK48T59 1 /* use M48T08 on EVAL5200 */ + #define RTC(reg) (0xf0010000+reg) + /* setup CS2 for M48T08. Must MAP 64kB */ + #define CFG_CS2_START RTC(0) + #define CFG_CS2_SIZE 0x10000 + /* setup CS2 configuration register: */ + /* WaitP = 0, WaitX = 4, MX=0, AL=1, AA=1, CE=1 */ + /* AS=2, DS=0, Bank=0, WTyp=0, WS=0, RS=0, WO=0, RO=0 */ + #define CFG_CS2_CFG 0x00047800 +#else + #define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */ +#endif /* * Various low-level settings diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h new file mode 100644 index 0000000000..2eb65e2081 --- /dev/null +++ b/include/configs/omap1610h2.h @@ -0,0 +1,178 @@ +/* + * (C) Copyright 2004 + * Texas Instruments. + * Kshitij Gupta + * Configuration settings for the TI OMAP 1610 H2 board. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* + * If we are developing, we might want to start armboot from ram + * so we MUST NOT initialize critical regs like mem-timing ... + */ +#define CONFIG_INIT_CRITICAL /* undef for developing */ + +/* + * High Level Configuration Options + * (easy to change) + */ +#define CONFIG_ARM926EJS 1 /* This is an arm926ejs CPU core */ +#define CONFIG_OMAP 1 /* in a TI OMAP core */ +#define CONFIG_OMAP1610 1 /* which is in a 1610 */ +#define CONFIG_H2_OMAP1610 1 /* on an H2 Board */ + +/* input clock of PLL */ +/* the OMAP1610 H2 has 12MHz input clock */ +#define CONFIG_SYS_CLK_FREQ 12000000 + +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_MISC_INIT_R + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 + +/* + * Size of malloc() pool + */ +#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024) +#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */ + +/* + * Hardware drivers + */ +#define CONFIG_DRIVER_LAN91C96 +#define CONFIG_LAN91C96_BASE 0x04000300 +#define CONFIG_LAN91C96_EXT_PHY + +/* + * NS16550 Configuration + */ +#define CFG_NS16550 +#define CFG_NS16550_SERIAL +#define CFG_NS16550_REG_SIZE (-4) +#define CFG_NS16550_CLK (48000000) /* can be 12M/32Khz or 48Mhz */ +#define CFG_NS16550_COM1 0xfffb0000 /* uart1, bluetooth uart */ + +/* + * select serial console configuration + */ +#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on OMAP1610 H2 */ + +/* allow to overwrite serial and ethaddr */ +#define CONFIG_ENV_OVERWRITE +#define CONFIG_CONS_INDEX 1 +#define CONFIG_BAUDRATE 115200 +#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP) +#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT + +/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ +#include +#include + +#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTARGS "mem=32M console=ttyS0,115200n8 noinitrd \ + root=/dev/nfs rw nfsroot=157.87.82.48:\ + /home/a0875451/mwd/myfs/target ip=dhcp" +#define CONFIG_NETMASK 255.255.254.0 /* talk on MY local net */ +#define CONFIG_IPADDR 156.117.97.156 /* static IP I currently own */ +#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */ +#define CONFIG_BOOTFILE "uImage" /* file to load */ + +#if (CONFIG_COMMANDS & CFG_CMD_KGDB) +#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */ +#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */ +#endif + +/* + * Miscellaneous configurable options + */ +#define CFG_LONGHELP /* undef to save memory */ +#define CFG_PROMPT "OMAP1610 H2 # " /* Monitor Command Prompt */ +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */ +/* Print Buffer Size */ +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) +#define CFG_MAXARGS 16 /* max number of command args */ +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ + +#define CFG_MEMTEST_START 0x10000000 /* memtest works on */ +#define CFG_MEMTEST_END 0x12000000 /* 32 MB in DRAM */ + +#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */ + +#define CFG_LOAD_ADDR 0x10000000 /* default load address */ + +/* The 1610 has 6 timers, they can be driven by the RefClk (12Mhz) or by + * DPLL1. This time is further subdivided by a local divisor. + */ +#define CFG_TIMERBASE 0xFFFEC500 /* use timer 1 */ +#define CFG_PVT 7 /* 2^(pvt+1), divide by 256 */ +#define CFG_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CFG_PVT)) + +/*----------------------------------------------------------------------- + * Stack sizes + * + * The stack sizes are set up in start.S using the settings below + */ +#define CONFIG_STACKSIZE (128*1024) /* regular stack */ +#ifdef CONFIG_USE_IRQ +#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ +#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ +#endif + +/*----------------------------------------------------------------------- + * Physical Memory Map + */ +#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ +#define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ + +#ifdef CONFIG_CS0_BOOT +#define PHYS_FLASH_1 0x0C000000 +#endif +#ifdef CONFIG_CS3_BOOT +#define PHYS_FLASH_1 0x00000000 +#endif + +#define CFG_FLASH_BASE PHYS_FLASH_1 + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define PHYS_FLASH_SIZE 0x02000000 /* 32MB */ +#define CFG_MAX_FLASH_SECT (259) /* max number of sectors on one chip */ +/* addr of environment */ +#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x020000) + +/* timeout values are in ticks */ +#define CFG_FLASH_ERASE_TOUT (20*CFG_HZ) /* Timeout for Flash Erase */ +#define CFG_FLASH_WRITE_TOUT (20*CFG_HZ) /* Timeout for Flash Write */ + +#define CFG_ENV_IS_IN_FLASH 1 +#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */ +#define CFG_ENV_OFFSET 0x20000 /* environment starts here */ + +#endif /* __CONFIG_H */ diff --git a/include/configs/omap1610inn.h b/include/configs/omap1610inn.h index 9bdd795b88..da8043db28 100644 --- a/include/configs/omap1610inn.h +++ b/include/configs/omap1610inn.h @@ -151,7 +151,12 @@ #define PHYS_SDRAM_1 0x10000000 /* SDRAM Bank #1 */ #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ -#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ +#ifdef CONFIG_CS0_BOOT +#define PHYS_FLASH_1 0x0C000000 +#endif +#ifdef CONFIG_CS3_BOOT +#define PHYS_FLASH_1 0x00000000 +#endif #define CFG_FLASH_BASE PHYS_FLASH_1 diff --git a/lib_ppc/board.c b/lib_ppc/board.c index d7cee2b521..04a1b8bfa5 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -1011,6 +1011,9 @@ void board_init_r (gd_t *id, ulong dest_addr) void hang (void) { puts ("### ERROR ### Please RESET the board ###\n"); +#ifdef CONFIG_SHOW_BOOT_PROGRESS + show_boot_progress(-30); +#endif for (;;); } diff --git a/post/post.c b/post/post.c index 89ad6f0d58..b3df91aa5c 100644 --- a/post/post.c +++ b/post/post.c @@ -131,8 +131,12 @@ void post_output_backlog ( void ) post_log ("POST %s ", post_list[j].cmd); if (gd->post_log_word & post_list[j].testid) post_log ("PASSED\n"); - else + else { post_log ("FAILED\n"); +#ifdef CONFIG_SHOW_BOOT_PROGRESS + show_boot_progress(-31); +#endif + } } } } @@ -239,8 +243,12 @@ static int post_run_single (struct post_test *test, if ((*test->test) (flags) == 0) post_log_mark_succ ( test->testid ); } else { - if ((*test->test) (flags) != 0) + if ((*test->test) (flags) != 0) { post_log ("FAILED\n"); +#ifdef CONFIG_SHOW_BOOT_PROGRESS + show_boot_progress(-32); +#endif + } else post_log ("PASSED\n"); } diff --git a/rtc/mk48t59.c b/rtc/mk48t59.c index 664d310d43..64f751f75f 100644 --- a/rtc/mk48t59.c +++ b/rtc/mk48t59.c @@ -83,6 +83,18 @@ static void rtc_write (short reg, uchar val) out_byte(CMOS_DATA, (uint8)val); } +#elif defined(CONFIG_EVAL5200) + +static uchar rtc_read (short reg) +{ + return in8(RTC(reg)); +} + +static void rtc_write (short reg, uchar val) +{ + out8(RTC(reg),val); +} + #else # error Board specific rtc access functions should be supplied #endif -- 2.25.1