From 56a9270521baaa00e12639a978302a67f61ef060 Mon Sep 17 00:00:00 2001
From: Kumar Gala <galak@kernel.crashing.org>
Date: Thu, 30 Aug 2007 16:18:18 -0500
Subject: [PATCH] Fix ULI RTC support on MPC8544 DS
The RTC on the M1575 ULI chipset requires a dummy read before
we are able to talk to the RTC. We accomplish this by adding a
second memory region to the PHB the ULI is on and read from it.
The second region is added to maintain compatiabilty with Linux's
view of the PCI memory map.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
board/freescale/mpc8544ds/init.S | 2 +-
board/freescale/mpc8544ds/mpc8544ds.c | 6 ++++++
include/configs/MPC8544DS.h | 3 +++
3 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/board/freescale/mpc8544ds/init.S b/board/freescale/mpc8544ds/init.S
index 900c3680c7..68ccba746b 100644
--- a/board/freescale/mpc8544ds/init.S
+++ b/board/freescale/mpc8544ds/init.S
@@ -237,6 +237,6 @@ law_entry:
/* contains both PCIE3 MEM & IO space */
.long (CFG_PCIE3_MEM_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_2M)
+ .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_4M)
4:
entry_end
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 4c3b27f238..76d909191f 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -26,6 +26,7 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <asm/immap_fsl_pci.h>
+#include <asm/io.h>
#include <spd.h>
#include <miiphy.h>
@@ -222,6 +223,11 @@ pci_init_board(void)
printf (" PCIE3 on bus %02x - %02x\n",
hose->first_busno,hose->last_busno);
+ /*
+ * Activate ULI1575 legacy chip by performing a fake
+ * memory access. Needed to make ULI RTC work.
+ */
+ in_be32(CFG_PCIE3_MEM_BASE);
} else {
printf (" PCIE3: disabled\n");
}
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 9743f031e0..f580ccadee 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -310,6 +310,9 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define CFG_PCIE3_IO_BASE 0x00000000
#define CFG_PCIE3_IO_PHYS 0xb0100000 /* reuse mem LAW */
#define CFG_PCIE3_IO_SIZE 0x00100000 /* 1M */
+#define CFG_PCIE3_MEM_BASE2 0xb0200000
+#define CFG_PCIE3_MEM_PHYS2 CFG_PCIE3_MEM_BASE2
+#define CFG_PCIE3_MEM_SIZE2 0x00200000 /* 1M */
#if defined(CONFIG_PCI)
--
2.25.1