From 5328af17742d35d50f64666c63c2824113d6903a Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Mon, 21 Jan 2019 14:53:30 -0700 Subject: [PATCH] rockchip: clk: Add mention of four new clocks These clocks are needed to get MMC running. We don't actually support setting them yet. Signed-off-by: Simon Glass Reviewed-by: Philipp Tomsich --- drivers/clk/rockchip/clk_rk3399.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c index 198914b067..cab2bd9943 100644 --- a/drivers/clk/rockchip/clk_rk3399.c +++ b/drivers/clk/rockchip/clk_rk3399.c @@ -925,7 +925,13 @@ static ulong rk3399_clk_get_rate(struct clk *clk) case SCLK_SARADC: rate = rk3399_saradc_get_clk(priv->cru); break; + case ACLK_VIO: + case ACLK_HDCP: + case ACLK_GIC_PRE: + case PCLK_DDR: + break; default: + log_debug("Unknown clock %lu\n", clk->id); return -ENOENT; } @@ -993,7 +999,13 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) case SCLK_SARADC: ret = rk3399_saradc_set_clk(priv->cru, rate); break; + case ACLK_VIO: + case ACLK_HDCP: + case ACLK_GIC_PRE: + case PCLK_DDR: + return 0; default: + log_debug("Unknown clock %lu\n", clk->id); return -ENOENT; } -- 2.25.1