From 27ef578df7b9c7862c36a31b819c652f8b0aeea0 Mon Sep 17 00:00:00 2001 From: Rini van Zetten Date: Thu, 15 Apr 2010 16:03:05 +0200 Subject: [PATCH] mpc83xx: Use CONFIG_FSL_ESDHC to enable sdhc clk Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a platform define. This will enable all the 83xx platforms to use sdhc_clk based on CONFIG_FSL_ESDHC. It's the same patch as commit 6b9ea08c5010eab5ad1056bc9bf033afb672d9cc for the ppc/85xx. Signed-off-by: Rini Signed-off-by: Kim Phillips --- arch/powerpc/cpu/mpc83xx/speed.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index bde7e920a2..500eef1e9c 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -116,7 +116,7 @@ int get_clocks(void) #if defined(CONFIG_MPC8315) u32 tdm_clk; #endif -#if defined(CONFIG_MPC837x) +#if defined(CONFIG_FSL_ESDHC) u32 sdhc_clk; #endif u32 enc_clk; @@ -274,7 +274,7 @@ int get_clocks(void) return -7; } -#if defined(CONFIG_MPC837x) +#if defined(CONFIG_FSL_ESDHC) switch ((sccr & SCCR_SDHCCM) >> SCCR_SDHCCM_SHIFT) { case 0: sdhc_clk = 0; @@ -321,7 +321,7 @@ int get_clocks(void) i2c1_clk = enc_clk; #elif defined(CONFIG_MPC831x) i2c1_clk = enc_clk; -#elif defined(CONFIG_MPC837x) +#elif defined(CONFIG_FSL_ESDHC) i2c1_clk = sdhc_clk; #endif #if !defined(CONFIG_MPC832x) @@ -455,7 +455,7 @@ int get_clocks(void) #if defined(CONFIG_MPC8315) gd->tdm_clk = tdm_clk; #endif -#if defined(CONFIG_MPC837x) +#if defined(CONFIG_FSL_ESDHC) gd->sdhc_clk = sdhc_clk; #endif gd->core_clk = core_clk; @@ -522,7 +522,7 @@ int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) #if defined(CONFIG_MPC8315) printf(" TDM: %-4s MHz\n", strmhz(buf, gd->tdm_clk)); #endif -#if defined(CONFIG_MPC837x) +#if defined(CONFIG_FSL_ESDHC) printf(" SDHC: %-4s MHz\n", strmhz(buf, gd->sdhc_clk)); #endif #if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) -- 2.25.1