From 1f45ed6c994b154e657bbcab4465ce5f41154e7f Mon Sep 17 00:00:00 2001 From: David Bauer Date: Sun, 19 Apr 2020 18:28:09 +0200 Subject: [PATCH] ath79: fix QCA953x DDR and GPIO compatible bindings The memory as well as GPIO controller had the wrong SoC name used for their compatible binding. Signed-off-by: David Bauer --- target/linux/ath79/dts/qca953x.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi index f7e0703e4e..af85e8482a 100644 --- a/target/linux/ath79/dts/qca953x.dtsi +++ b/target/linux/ath79/dts/qca953x.dtsi @@ -34,7 +34,7 @@ ahb { apb { ddr_ctrl: memory-controller@18000000 { - compatible = "qca,ar9530-ddr-controller", + compatible = "qca,qca9530-ddr-controller", "qca,ar7240-ddr-controller"; reg = <0x18000000 0x128>; @@ -69,7 +69,7 @@ }; gpio: gpio@18040000 { - compatible = "qca,ar9530-gpio", + compatible = "qca,qca9530-gpio", "qca,ar9340-gpio"; reg = <0x18040000 0x28>; -- 2.25.1