From 1670a154f5f4845c3dc646fd505cd01083ad6683 Mon Sep 17 00:00:00 2001 From: Chris Packham Date: Fri, 14 Dec 2018 16:27:57 +1300 Subject: [PATCH] ARM: mvebu: remove out of date comment The Marvell DDR3 training code is now part of the U-Boot SPL so the comment saying it needs porting is no longer correct. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Signed-off-by: Stefan Roese --- arch/arm/mach-mvebu/cpu.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index aa1be8ebab..919d05c88c 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -283,10 +283,8 @@ int print_cpuinfo(void) * and sets the correct windows sizes and base addresses accordingly. * * These values are set in the scratch registers by the Marvell - * DDR3 training code, which is executed by the BootROM before the - * main payload (U-Boot) is executed. This training code is currently - * only available in the Marvell U-Boot version. It needs to be - * ported to mainline U-Boot SPL at some point. + * DDR3 training code, which is executed by the SPL before the + * main payload (U-Boot) is executed. */ static void update_sdram_window_sizes(void) { -- 2.25.1