From 10a54e144252be25106f36ad75f924b7b3c53255 Mon Sep 17 00:00:00 2001 From: INAGAKI Hiroshi Date: Sat, 8 Dec 2018 14:52:42 +0900 Subject: [PATCH] ath79: fix pinmux reg value for QCA956x The range of pinmux reg property "<0x1804002c 0x40>" for QCA956x SoC does not includes GPIO_FUNCTION register. If the device uses "&jtag_disable_pins", this causes the following errors: [ 1.982937] pinctrl-single 1804002c.pinmux: mux offset out of range: 0x40 (0x40) [ 1.990622] pinctrl-single 1804002c.pinmux: could not add functions for pinmux_jtag_disable_pins 64x Signed-off-by: INAGAKI Hiroshi --- target/linux/ath79/dts/qca956x.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/linux/ath79/dts/qca956x.dtsi b/target/linux/ath79/dts/qca956x.dtsi index 248c001cd2..b6f7dcaff3 100644 --- a/target/linux/ath79/dts/qca956x.dtsi +++ b/target/linux/ath79/dts/qca956x.dtsi @@ -71,7 +71,7 @@ pinmux: pinmux@1804002c { compatible = "pinctrl-single"; - reg = <0x1804002c 0x40>; + reg = <0x1804002c 0x44>; #size-cells = <0>; -- 2.25.1