From 0b80f212824f632f1acb0d74fd932c05a0262fc3 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 11 Aug 2019 12:18:44 +0200 Subject: [PATCH] usb: r8a66597: Remove CONFIG_SUPERH_ON_CHIP_R8A66597 Remove CONFIG_SUPERH_ON_CHIP_R8A66597 macro, which is unused. Signed-off-by: Marek Vasut Cc: Chris Brandt --- drivers/usb/host/r8a66597-hcd.c | 14 -------------- drivers/usb/host/r8a66597.h | 12 ++---------- 2 files changed, 2 insertions(+), 24 deletions(-) diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index 3c263e51c1..8cca09f6d8 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c @@ -61,17 +61,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) u16 tmp; int i = 0; -#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) - do { - r8a66597_write(r8a66597, SCKE, SYSCFG0); - tmp = r8a66597_read(r8a66597, SYSCFG0); - if (i++ > 1000) { - printf("register access fail.\n"); - return -1; - } - } while ((tmp & SCKE) != SCKE); - r8a66597_write(r8a66597, 0x04, 0x02); -#else do { r8a66597_write(r8a66597, USBE, SYSCFG0); tmp = r8a66597_read(r8a66597, SYSCFG0); @@ -108,7 +97,6 @@ static int r8a66597_clock_enable(struct r8a66597 *r8a66597) mdelay(1); r8a66597_bset(r8a66597, SUSPM, SUSPMODE0); #endif /* CONFIG_RZA_USB */ -#endif /* #if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) */ return 0; } @@ -118,11 +106,9 @@ static void r8a66597_clock_disable(struct r8a66597 *r8a66597) #if !defined(CONFIG_RZA_USB) r8a66597_bclr(r8a66597, SCKE, SYSCFG0); udelay(1); -#if !defined(CONFIG_SUPERH_ON_CHIP_R8A66597) r8a66597_bclr(r8a66597, PLLC, SYSCFG0); r8a66597_bclr(r8a66597, XCKE, SYSCFG0); r8a66597_bclr(r8a66597, USBE, SYSCFG0); -#endif #else r8a66597_bclr(r8a66597, SUSPM, SUSPMODE0); diff --git a/drivers/usb/host/r8a66597.h b/drivers/usb/host/r8a66597.h index ffdb39e8bb..4859e26355 100644 --- a/drivers/usb/host/r8a66597.h +++ b/drivers/usb/host/r8a66597.h @@ -178,15 +178,11 @@ #define REW 0x4000 /* b14: Buffer rewind */ #define DCLRM 0x2000 /* b13: DMA buffer clear mode */ #define DREQE 0x1000 /* b12: DREQ output enable */ -#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) -#define MBW 0x0800 -#else #if !defined(CONFIG_RZA_USB) #define MBW 0x0400 /* b10: Maximum bit width for FIFO access */ #else #define MBW 0x0800 /* b10: Maximum bit width for FIFO access */ #endif -#endif #define MBW_8 0x0000 /* 8bit */ #define MBW_16 0x0400 /* 16bit */ #define MBW_32 0x0800 /* 32bit */ @@ -398,11 +394,7 @@ #define R8A66597_MAX_NUM_PIPE 10 #define R8A66597_BUF_BSIZE 8 #define R8A66597_MAX_DEVICE 10 -#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) -#define R8A66597_MAX_ROOT_HUB 1 -#else #define R8A66597_MAX_ROOT_HUB 2 -#endif #define R8A66597_MAX_SAMPLING 5 #define R8A66597_RH_POLL_TIME 10 @@ -435,7 +427,7 @@ static inline void r8a66597_read_fifo(struct r8a66597 *r8a66597, int len) { int i; -#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB) +#if defined(CONFIG_RZA_USB) unsigned long fifoaddr = r8a66597->reg + offset; unsigned long count; unsigned long *p = buf; @@ -469,7 +461,7 @@ static inline void r8a66597_write_fifo(struct r8a66597 *r8a66597, { int i; unsigned long fifoaddr = r8a66597->reg + offset; -#if defined(CONFIG_SUPERH_ON_CHIP_R8A66597) || defined(CONFIG_RZA_USB) +#if defined(CONFIG_RZA_USB) unsigned long count; unsigned char *pb; unsigned long *p = buf; -- 2.25.1