From 06fbefd10046a0fae7e588b7c6d25fb51811b931 Mon Sep 17 00:00:00 2001
From: Szabolcs Nagy <nsz@port70.net>
Date: Wed, 19 Apr 2017 00:20:54 +0200
Subject: [PATCH] add a_clz_64 helper function

counts leading zero bits of a 64bit int, undefined on zero input.
(has nothing to do with atomics, added to atomic.h so target specific
helper functions are together.)

there is a logarithmic generic implementation and another in terms of
a 32bit a_clz_32 on targets where that's available.
---
 arch/aarch64/atomic_arch.h   |  7 +++++++
 arch/arm/atomic_arch.h       |  7 +++++++
 arch/i386/atomic_arch.h      |  7 +++++++
 arch/powerpc/atomic_arch.h   |  7 +++++++
 arch/powerpc64/atomic_arch.h |  7 +++++++
 arch/x32/atomic_arch.h       |  7 +++++++
 arch/x86_64/atomic_arch.h    |  7 +++++++
 src/internal/atomic.h        | 21 +++++++++++++++++++++
 8 files changed, 70 insertions(+)

diff --git a/arch/aarch64/atomic_arch.h b/arch/aarch64/atomic_arch.h
index 8ab68c1c..40fefc25 100644
--- a/arch/aarch64/atomic_arch.h
+++ b/arch/aarch64/atomic_arch.h
@@ -73,3 +73,10 @@ static inline int a_ctz_64(uint64_t x)
 		: "=r"(x) : "r"(x));
 	return x;
 }
+
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+	__asm__("clz %0, %1" : "=r"(x) : "r"(x));
+	return x;
+}
diff --git a/arch/arm/atomic_arch.h b/arch/arm/atomic_arch.h
index d6af84d0..a121010f 100644
--- a/arch/arm/atomic_arch.h
+++ b/arch/arm/atomic_arch.h
@@ -81,3 +81,10 @@ static inline void a_crash()
 #endif
 		: : : "memory");
 }
+
+#define a_clz_32 a_clz_32
+static inline int a_clz_32(uint32_t x)
+{
+	__asm__ ("clz %0, %1" : "=r"(x) : "r"(x));
+	return x;
+}
diff --git a/arch/i386/atomic_arch.h b/arch/i386/atomic_arch.h
index 2b1a0490..7d2a48a5 100644
--- a/arch/i386/atomic_arch.h
+++ b/arch/i386/atomic_arch.h
@@ -99,3 +99,10 @@ static inline int a_ctz_l(unsigned long x)
 	__asm__( "bsf %1,%0" : "=r"(r) : "r"(x) );
 	return r;
 }
+
+#define a_clz_32 a_clz_32
+static inline int a_clz_32(uint32_t x)
+{
+	__asm__( "bsr %1,%0 ; xor $31,%0" : "=r"(x) : "r"(x) );
+	return x;
+}
diff --git a/arch/powerpc/atomic_arch.h b/arch/powerpc/atomic_arch.h
index f31566b2..5b65cde7 100644
--- a/arch/powerpc/atomic_arch.h
+++ b/arch/powerpc/atomic_arch.h
@@ -37,3 +37,10 @@ static inline void a_store(volatile int *p, int v)
 	*p = v;
 	a_post_llsc();
 }
+
+#define a_clz_32 a_clz_32
+static inline int a_clz_32(uint32_t x)
+{
+	__asm__ ("cntlzw %0, %1" : "=r"(x) : "r"(x));
+	return x;
+}
diff --git a/arch/powerpc64/atomic_arch.h b/arch/powerpc64/atomic_arch.h
index 269d79c6..17cababd 100644
--- a/arch/powerpc64/atomic_arch.h
+++ b/arch/powerpc64/atomic_arch.h
@@ -61,3 +61,10 @@ static inline void a_crash()
 {
 	__asm__ __volatile__ (".long 0");
 }
+
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+	__asm__ ("cntlzd %0, %1" : "=r"(x) : "r"(x));
+	return x;
+}
diff --git a/arch/x32/atomic_arch.h b/arch/x32/atomic_arch.h
index 7daf4ae2..a744c299 100644
--- a/arch/x32/atomic_arch.h
+++ b/arch/x32/atomic_arch.h
@@ -112,3 +112,10 @@ static inline int a_ctz_l(unsigned long x)
 	__asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
 	return x;
 }
+
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+	__asm__( "bsr %1,%0 ; xor $63,%0" : "=r"(x) : "r"(x) );
+	return x;
+}
diff --git a/arch/x86_64/atomic_arch.h b/arch/x86_64/atomic_arch.h
index 55fc6fb9..da4e2037 100644
--- a/arch/x86_64/atomic_arch.h
+++ b/arch/x86_64/atomic_arch.h
@@ -114,3 +114,10 @@ static inline int a_ctz_64(uint64_t x)
 	__asm__( "bsf %1,%0" : "=r"(x) : "r"(x) );
 	return x;
 }
+
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+	__asm__( "bsr %1,%0 ; xor $63,%0" : "=r"(x) : "r"(x) );
+	return x;
+}
diff --git a/src/internal/atomic.h b/src/internal/atomic.h
index 6f37d252..ab473dd7 100644
--- a/src/internal/atomic.h
+++ b/src/internal/atomic.h
@@ -277,6 +277,27 @@ static inline int a_ctz_64(uint64_t x)
 }
 #endif
 
+#ifndef a_clz_64
+#define a_clz_64 a_clz_64
+static inline int a_clz_64(uint64_t x)
+{
+#ifdef a_clz_32
+	if (x>>32)
+		return a_clz_32(x>>32);
+	return a_clz_32(x) + 32;
+#else
+	uint32_t y;
+	int r;
+	if (x>>32) y=x>>32, r=0; else y=x, r=32;
+	if (y>>16) y>>=16; else r |= 16;
+	if (y>>8) y>>=8; else r |= 8;
+	if (y>>4) y>>=4; else r |= 4;
+	if (y>>2) y>>=2; else r |= 2;
+	return r | !(y>>1);
+#endif
+}
+#endif
+
 #ifndef a_ctz_l
 #define a_ctz_l a_ctz_l
 static inline int a_ctz_l(unsigned long x)
-- 
2.25.1