From 0628cb26591a8f7990ee9b8c886dcf6a4fa7a548 Mon Sep 17 00:00:00 2001 From: Kuo-Jung Su Date: Wed, 10 Jul 2013 09:25:49 +0800 Subject: [PATCH] net: ftmac110: Update tx/rx descriptor format 1. Reformat tx/rx descriptor as an uniform struct. 2. Replace uint32_t[2] with uint64_t for descriptor control. Signed-off-by: Kuo-Jung Su CC: Joe Hershberger --- drivers/net/ftmac110.c | 86 +++++++++++++++++++++++------------------- drivers/net/ftmac110.h | 70 +++++++++++++++++----------------- 2 files changed, 82 insertions(+), 74 deletions(-) diff --git a/drivers/net/ftmac110.c b/drivers/net/ftmac110.c index 7f5409223c..8eee272cf1 100644 --- a/drivers/net/ftmac110.c +++ b/drivers/net/ftmac110.c @@ -54,11 +54,11 @@ struct ftmac110_chip { uint32_t lnkup; uint32_t phy_addr; - struct ftmac110_rxd *rxd; + struct ftmac110_desc *rxd; ulong rxd_dma; uint32_t rxd_idx; - struct ftmac110_txd *txd; + struct ftmac110_desc *txd; ulong txd_dma; uint32_t txd_idx; }; @@ -212,14 +212,15 @@ static int ftmac110_reset(struct eth_device *dev) /* 1-1. Init tx ring */ for (i = 0; i < CFG_TXDES_NUM; ++i) { /* owned by SW */ - chip->txd[i].ct[0] = 0; + chip->txd[i].ctrl &= cpu_to_le64(FTMAC110_TXD_CLRMASK); } chip->txd_idx = 0; /* 1-2. Init rx ring */ for (i = 0; i < CFG_RXDES_NUM; ++i) { /* owned by HW */ - chip->rxd[i].ct[0] = cpu_to_le32(FTMAC110_RXCT0_OWNER); + chip->rxd[i].ctrl &= cpu_to_le64(FTMAC110_RXD_CLRMASK); + chip->rxd[i].ctrl |= cpu_to_le64(FTMAC110_RXD_OWNER); } chip->rxd_idx = 0; @@ -280,7 +281,8 @@ static int ftmac110_send(struct eth_device *dev, void *pkt, int len) { struct ftmac110_chip *chip = dev->priv; struct ftmac110_regs *regs = chip->regs; - struct ftmac110_txd *des; + struct ftmac110_desc *txd; + uint64_t ctrl; if (!chip->lnkup) return 0; @@ -292,24 +294,26 @@ static int ftmac110_send(struct eth_device *dev, void *pkt, int len) len = max(60, len); - des = &chip->txd[chip->txd_idx]; - if (le32_to_cpu(des->ct[0]) & FTMAC110_TXCT0_OWNER) { + txd = &chip->txd[chip->txd_idx]; + ctrl = le64_to_cpu(txd->ctrl); + if (ctrl & FTMAC110_TXD_OWNER) { /* kick-off Tx DMA */ writel(0xffffffff, ®s->txpd); printf("ftmac110: out of txd\n"); return 0; } - memcpy(des->vbuf, (void *)pkt, len); - dma_map_single(des->vbuf, len, DMA_TO_DEVICE); + memcpy(txd->vbuf, (void *)pkt, len); + dma_map_single(txd->vbuf, len, DMA_TO_DEVICE); - /* update len, fts and lts */ - des->ct[1] &= cpu_to_le32(FTMAC110_TXCT1_END); - des->ct[1] |= cpu_to_le32(FTMAC110_TXCT1_LEN(len) - | FTMAC110_TXCT1_FTS | FTMAC110_TXCT1_LTS); - - /* set owner bit and clear others */ - des->ct[0] = cpu_to_le32(FTMAC110_TXCT0_OWNER); + /* clear control bits */ + ctrl &= FTMAC110_TXD_CLRMASK; + /* set len, fts and lts */ + ctrl |= FTMAC110_TXD_LEN(len) | FTMAC110_TXD_FTS | FTMAC110_TXD_LTS; + /* set owner bit */ + ctrl |= FTMAC110_TXD_OWNER; + /* write back to descriptor */ + txd->ctrl = cpu_to_le64(ctrl); /* kick-off Tx DMA */ writel(0xffffffff, ®s->txpd); @@ -322,23 +326,24 @@ static int ftmac110_send(struct eth_device *dev, void *pkt, int len) static int ftmac110_recv(struct eth_device *dev) { struct ftmac110_chip *chip = dev->priv; - struct ftmac110_rxd *des; - uint32_t ct0, len, rlen = 0; + struct ftmac110_desc *rxd; + uint32_t len, rlen = 0; + uint64_t ctrl; uint8_t *buf; if (!chip->lnkup) return 0; do { - des = &chip->rxd[chip->rxd_idx]; - ct0 = le32_to_cpu(des->ct[0]); - if (ct0 & FTMAC110_RXCT0_OWNER) + rxd = &chip->rxd[chip->rxd_idx]; + ctrl = le64_to_cpu(rxd->ctrl); + if (ctrl & FTMAC110_RXD_OWNER) break; - len = FTMAC110_RXCT0_LEN(ct0); - buf = des->vbuf; + len = (uint32_t)FTMAC110_RXD_LEN(ctrl); + buf = rxd->vbuf; - if (ct0 & FTMAC110_RXCT0_ERRMASK) { + if (ctrl & FTMAC110_RXD_ERRMASK) { printf("ftmac110: rx error\n"); } else { dma_map_single(buf, len, DMA_FROM_DEVICE); @@ -347,7 +352,9 @@ static int ftmac110_recv(struct eth_device *dev) } /* owned by hardware */ - des->ct[0] = cpu_to_le32(FTMAC110_RXCT0_OWNER); + ctrl &= FTMAC110_RXD_CLRMASK; + ctrl |= FTMAC110_RXD_OWNER; + rxd->ctrl |= cpu_to_le64(ctrl); chip->rxd_idx = (chip->rxd_idx + 1) % CFG_RXDES_NUM; } while (0); @@ -422,42 +429,43 @@ int ftmac110_initialize(bd_t *bis) /* allocate tx descriptors (it must be 16 bytes aligned) */ chip->txd = dma_alloc_coherent( - sizeof(struct ftmac110_txd) * CFG_TXDES_NUM, &chip->txd_dma); + sizeof(struct ftmac110_desc) * CFG_TXDES_NUM, &chip->txd_dma); if (!chip->txd) panic("ftmac110: out of memory 3\n"); memset(chip->txd, 0, - sizeof(struct ftmac110_txd) * CFG_TXDES_NUM); + sizeof(struct ftmac110_desc) * CFG_TXDES_NUM); for (i = 0; i < CFG_TXDES_NUM; ++i) { void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE); + if (!va) panic("ftmac110: out of memory 4\n"); - chip->txd[i].vbuf = va; - chip->txd[i].buf = cpu_to_le32(virt_to_phys(va)); - chip->txd[i].ct[1] = 0; - chip->txd[i].ct[0] = 0; /* owned by SW */ + chip->txd[i].vbuf = va; + chip->txd[i].pbuf = cpu_to_le32(virt_to_phys(va)); + chip->txd[i].ctrl = 0; /* owned by SW */ } - chip->txd[i - 1].ct[1] |= cpu_to_le32(FTMAC110_TXCT1_END); + chip->txd[i - 1].ctrl |= cpu_to_le64(FTMAC110_TXD_END); chip->txd_idx = 0; /* allocate rx descriptors (it must be 16 bytes aligned) */ chip->rxd = dma_alloc_coherent( - sizeof(struct ftmac110_rxd) * CFG_RXDES_NUM, &chip->rxd_dma); + sizeof(struct ftmac110_desc) * CFG_RXDES_NUM, &chip->rxd_dma); if (!chip->rxd) panic("ftmac110: out of memory 4\n"); memset((void *)chip->rxd, 0, - sizeof(struct ftmac110_rxd) * CFG_RXDES_NUM); + sizeof(struct ftmac110_desc) * CFG_RXDES_NUM); for (i = 0; i < CFG_RXDES_NUM; ++i) { void *va = memalign(ARCH_DMA_MINALIGN, CFG_XBUF_SIZE + 2); + if (!va) panic("ftmac110: out of memory 5\n"); /* it needs to be exactly 2 bytes aligned */ va = ((uint8_t *)va + 2); - chip->rxd[i].vbuf = va; - chip->rxd[i].buf = cpu_to_le32(virt_to_phys(va)); - chip->rxd[i].ct[1] = cpu_to_le32(CFG_XBUF_SIZE); - chip->rxd[i].ct[0] = cpu_to_le32(FTMAC110_RXCT0_OWNER); + chip->rxd[i].vbuf = va; + chip->rxd[i].pbuf = cpu_to_le32(virt_to_phys(va)); + chip->rxd[i].ctrl = cpu_to_le64(FTMAC110_RXD_OWNER + | FTMAC110_RXD_BUFSZ(CFG_XBUF_SIZE)); } - chip->rxd[i - 1].ct[1] |= cpu_to_le32(FTMAC110_RXCT1_END); + chip->rxd[i - 1].ctrl |= cpu_to_le64(FTMAC110_RXD_END); chip->rxd_idx = 0; eth_register(dev); diff --git a/drivers/net/ftmac110.h b/drivers/net/ftmac110.h index a383afa277..2772ae7b70 100644 --- a/drivers/net/ftmac110.h +++ b/drivers/net/ftmac110.h @@ -135,42 +135,42 @@ struct ftmac110_regs { /* * descriptor structure */ -struct ftmac110_rxd { - uint32_t ct[2]; - uint32_t buf; - void *vbuf; /* reserved */ +struct ftmac110_desc { + uint64_t ctrl; + uint32_t pbuf; + void *vbuf; }; -#define FTMAC110_RXCT0_OWNER BIT_MASK(31) /* owner: 1=HW, 0=SW */ -#define FTMAC110_RXCT0_FRS BIT_MASK(29) /* first pkt desc */ -#define FTMAC110_RXCT0_LRS BIT_MASK(28) /* last pkt desc */ -#define FTMAC110_RXCT0_ODDNB BIT_MASK(22) /* odd nibble */ -#define FTMAC110_RXCT0_RUNT BIT_MASK(21) /* runt pkt */ -#define FTMAC110_RXCT0_FTL BIT_MASK(20) /* frame too long */ -#define FTMAC110_RXCT0_CRC BIT_MASK(19) /* pkt crc error */ -#define FTMAC110_RXCT0_ERR BIT_MASK(18) /* bus error */ -#define FTMAC110_RXCT0_ERRMASK (0x1f << 18) /* all errors */ -#define FTMAC110_RXCT0_BCST BIT_MASK(17) /* Bcst pkt */ -#define FTMAC110_RXCT0_MCST BIT_MASK(16) /* Mcst pkt */ -#define FTMAC110_RXCT0_LEN(x) ((x) & 0x7ff) - -#define FTMAC110_RXCT1_END BIT_MASK(31) -#define FTMAC110_RXCT1_BUFSZ(x) ((x) & 0x7ff) - -struct ftmac110_txd { - uint32_t ct[2]; - uint32_t buf; - void *vbuf; /* reserved */ -}; - -#define FTMAC110_TXCT0_OWNER BIT_MASK(31) /* owner: 1=HW, 0=SW */ -#define FTMAC110_TXCT0_COL 0x00000003 /* collision */ - -#define FTMAC110_TXCT1_END BIT_MASK(31) /* end of ring */ -#define FTMAC110_TXCT1_TXIC BIT_MASK(30) /* tx done interrupt */ -#define FTMAC110_TXCT1_TX2FIC BIT_MASK(29) /* tx fifo interrupt */ -#define FTMAC110_TXCT1_FTS BIT_MASK(28) /* first pkt desc */ -#define FTMAC110_TXCT1_LTS BIT_MASK(27) /* last pkt desc */ -#define FTMAC110_TXCT1_LEN(x) ((x) & 0x7ff) +#define FTMAC110_RXD_END ((uint64_t)1 << 63) +#define FTMAC110_RXD_BUFSZ(x) (((uint64_t)(x) & 0x7ff) << 32) + +#define FTMAC110_RXD_OWNER ((uint64_t)1 << 31) /* owner: 1=HW, 0=SW */ +#define FTMAC110_RXD_FRS ((uint64_t)1 << 29) /* first pkt desc */ +#define FTMAC110_RXD_LRS ((uint64_t)1 << 28) /* last pkt desc */ +#define FTMAC110_RXD_ODDNB ((uint64_t)1 << 22) /* odd nibble */ +#define FTMAC110_RXD_RUNT ((uint64_t)1 << 21) /* runt pkt */ +#define FTMAC110_RXD_FTL ((uint64_t)1 << 20) /* frame too long */ +#define FTMAC110_RXD_CRC ((uint64_t)1 << 19) /* pkt crc error */ +#define FTMAC110_RXD_ERR ((uint64_t)1 << 18) /* bus error */ +#define FTMAC110_RXD_ERRMASK ((uint64_t)0x1f << 18) +#define FTMAC110_RXD_BCST ((uint64_t)1 << 17) /* Bcst pkt */ +#define FTMAC110_RXD_MCST ((uint64_t)1 << 16) /* Mcst pkt */ +#define FTMAC110_RXD_LEN(x) ((uint64_t)((x) & 0x7ff)) + +#define FTMAC110_RXD_CLRMASK \ + (FTMAC110_RXD_END | FTMAC110_RXD_BUFSZ(0x7ff)) + +#define FTMAC110_TXD_END ((uint64_t)1 << 63) /* end of ring */ +#define FTMAC110_TXD_TXIC ((uint64_t)1 << 62) /* tx done interrupt */ +#define FTMAC110_TXD_TX2FIC ((uint64_t)1 << 61) /* tx fifo interrupt */ +#define FTMAC110_TXD_FTS ((uint64_t)1 << 60) /* first pkt desc */ +#define FTMAC110_TXD_LTS ((uint64_t)1 << 59) /* last pkt desc */ +#define FTMAC110_TXD_LEN(x) ((uint64_t)((x) & 0x7ff) << 32) + +#define FTMAC110_TXD_OWNER ((uint64_t)1 << 31) /* owner: 1=HW, 0=SW */ +#define FTMAC110_TXD_COL ((uint64_t)3) /* collision */ + +#define FTMAC110_TXD_CLRMASK \ + (FTMAC110_TXD_END) #endif /* FTMAC110_H */ -- 2.25.1