From 048a04530700704af622dc80a192b59de2e65fa2 Mon Sep 17 00:00:00 2001 From: Minghuan Lian Date: Tue, 13 Dec 2016 14:54:12 +0800 Subject: [PATCH] arm: ls1012a: add PCIe dts node Signed-off-by: Minghuan Lian Signed-off-by: Hou Zhiqiang Reviewed-by: York Sun --- arch/arm/dts/fsl-ls1012a.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi index 024527e815..c4ca9c12cb 100644 --- a/arch/arm/dts/fsl-ls1012a.dtsi +++ b/arch/arm/dts/fsl-ls1012a.dtsi @@ -103,5 +103,20 @@ status = "disabled"; }; + pcie@3400000 { + compatible = "fsl,ls-pcie", "snps,dw-pcie"; + reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */ + 0x00 0x03480000 0x0 0x40000 /* lut registers */ + 0x00 0x034c0000 0x0 0x40000 /* pf controls registers */ + 0x40 0x00000000 0x0 0x20000>; /* configuration space */ + reg-names = "dbi", "lut", "ctrl", "config"; + big-endian; + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + bus-range = <0x0 0xff>; + ranges = <0x81000000 0x0 0x00000000 0x40 0x00020000 0x0 0x00010000 /* downstream I/O */ + 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ + }; }; }; -- 2.25.1