From 026a3f1b7ca487bbce632060b8ca9193bb9edf87 Mon Sep 17 00:00:00 2001 From: Alex Porosanu Date: Tue, 5 May 2015 16:48:33 +0300 Subject: [PATCH] drivers/crypto/fsl: disable RNG oscillator maximum frequency check The rtfrqmax & rtfrqmin set the bounds of the expected frequency of the oscillator, when SEC runs at its maximum frequency. For certain platforms (f.i. T2080), the oscillator is very fast and thus if the SEC runs at a lower than normal frequency, the ring oscillator is incorrectly detected as being out of bounds. This patch effectively disables the maximum frequency check, by setting a high enough maximum allowable frequency for the oscillator. The reasoning behind this is that usually a broken oscillator will run too slow (i.e. not run at all) rather than run too fast. Signed-off-by: Alex Porosanu Acked-by: Ruchika Gupta Reviewed-by: York Sun --- drivers/crypto/fsl/jr.c | 4 ++-- include/fsl_sec.h | 1 + 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/crypto/fsl/jr.c b/drivers/crypto/fsl/jr.c index f99d59480c..aa527ec954 100644 --- a/drivers/crypto/fsl/jr.c +++ b/drivers/crypto/fsl/jr.c @@ -406,8 +406,8 @@ static void kick_trng(int ent_delay) sec_out32(&rng->rtsdctl, val); /* min. freq. count, equal to 1/4 of the entropy sample length */ sec_out32(&rng->rtfreqmin, ent_delay >> 2); - /* max. freq. count, equal to 8 times the entropy sample length */ - sec_out32(&rng->rtfreqmax, ent_delay << 3); + /* disable maximum frequency count */ + sec_out32(&rng->rtfreqmax, RTFRQMAX_DISABLE); /* put RNG4 into run mode */ sec_clrbits32(&rng->rtmctl, RTMCTL_PRGM); } diff --git a/include/fsl_sec.h b/include/fsl_sec.h index ebb1ac6d40..14f6633e32 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -49,6 +49,7 @@ struct rng4tst { u32 rttotsam; /* PRGM=0: total samples register */ }; u32 rtfreqmin; /* frequency count min. limit register */ +#define RTFRQMAX_DISABLE (1 << 20) union { u32 rtfreqmax; /* PRGM=1: freq. count max. limit register */ u32 rtfreqcnt; /* PRGM=0: freq. count register */ -- 2.25.1