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(parent: a3d7cb1) | patch
cache: l2x0: Fix write to incorrect shared-override bit
authorLey Foon Tan <ley.foon.tan@intel.com>
Fri, 17 Apr 2020 06:45:35 +0000 (14:45 +0800)
committerTom Rini <trini@konsulko.com>
Fri, 24 Apr 2020 20:40:09 +0000 (16:40 -0400)
commitf62782fb2999dd8109a3ffe9ee0a51e54ab034ab
treed14f6669d89c38b5d584b6b57e95bf6e38862448tree | snapshot
parenta3d7cb1939ada77a2c0b7668bb9d80298de3ff31commit | diff
cache: l2x0: Fix write to incorrect shared-override bit

The existing code write bit-0 for shared attribute override enable bit.
It should be bit-22 based on cache controller specification [1].

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246f/DDI0246F_l2c310_r3p2_trm.pdf

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
drivers/cache/cache-l2x0.c diff | blob | history
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