oweals/u-boot.git
9 years agonet: altera_tse: remove unused macro and regs def
Thomas Chou [Fri, 6 Nov 2015 01:36:06 +0000 (09:36 +0800)]
net: altera_tse: remove unused macro and regs def

Remove unused macro and regs def.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agonios2: trim CONFIG_SYS_MEMTEST_END
Thomas Chou [Wed, 4 Nov 2015 05:25:20 +0000 (13:25 +0800)]
nios2: trim CONFIG_SYS_MEMTEST_END

Trim CONFIG_SYS_MEMTEST_END location.

CONFIG_SYS_MONITOR_LEN
  Reserving 256k for U-Boot at: d7fc0000
CONFIG_ENV_SIZE
CONFIG_SYS_MALLOC_LEN
  Reserving 256k for malloc() at: d7f80000
0x10000 for the rest
  Reserving 68 Bytes for Board Info at: d7f7ffbc
  Reserving 208 Bytes for Global Data at: d7f7feec
  Reserving 12000 Bytes for FDT at: d7f7d00c
  Stack

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
9 years agonios2: trim CONFIG_SYS_MALLOC_LEN
Thomas Chou [Wed, 4 Nov 2015 05:28:29 +0000 (13:28 +0800)]
nios2: trim CONFIG_SYS_MALLOC_LEN

Trim CONFIG_SYS_MALLOC_LEN size, because CONFIG_ENV_SIZE
is included to total memory allocation in common.h,

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Chin Liang See <clsee@altera.com>
9 years agoaltera_uart: Adjust the declaration of debug_uart_init()
Thomas Chou [Tue, 3 Nov 2015 06:19:02 +0000 (14:19 +0800)]
altera_uart: Adjust the declaration of debug_uart_init()

Follow commit 97b059730218 ("debug_uart: Adjust the declaration of
debug_uart_init()")

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
9 years agoaltera_jtag_uart: Adjust the declaration of debug_uart_init()
Thomas Chou [Tue, 3 Nov 2015 06:18:27 +0000 (14:18 +0800)]
altera_jtag_uart: Adjust the declaration of debug_uart_init()

Follow commit 97b059730218 ("debug_uart: Adjust the declaration of
debug_uart_init()")

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
9 years agonios2: fix cached mode in clearing the BSS
Thomas Chou [Tue, 3 Nov 2015 05:52:15 +0000 (13:52 +0800)]
nios2: fix cached mode in clearing the BSS

As the generic board runs in cached mode, it should not use
"stwio" which bypass the cache.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Chin Liang See <clsee@altera.com>
9 years agonios2: remove CONFIG_SYS_INIT_SP macro
Thomas Chou [Tue, 3 Nov 2015 05:47:02 +0000 (13:47 +0800)]
nios2: remove CONFIG_SYS_INIT_SP macro

Remove CONFIG_SYS_INIT_SP macro, as the initial stack is set to
below the u-boot code.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Chin Liang See <clsee@altera.com>
9 years agonios2: remove CONFIG_SYS_MALLOC_BASE macro
Thomas Chou [Tue, 3 Nov 2015 05:31:09 +0000 (13:31 +0800)]
nios2: remove CONFIG_SYS_MALLOC_BASE macro

Remove CONFIG_SYS_MALLOC_BASE macro, as it is not used by
the generic board.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Chin Liang See <clsee@altera.com>
9 years agospi: altera_spi: minor clean up
Thomas Chou [Sat, 31 Oct 2015 12:55:48 +0000 (20:55 +0800)]
spi: altera_spi: minor clean up

- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agomisc: altera_sysid: minor clean up
Thomas Chou [Sat, 31 Oct 2015 12:54:53 +0000 (20:54 +0800)]
misc: altera_sysid: minor clean up

- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agotimer: altera_timer: minor clean up
Thomas Chou [Sat, 31 Oct 2015 12:54:16 +0000 (20:54 +0800)]
timer: altera_timer: minor clean up

- Moved macro definitions to top
- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agotimer: altera_timer: use BIT macro
Thomas Chou [Thu, 29 Oct 2015 13:16:39 +0000 (21:16 +0800)]
timer: altera_timer: use BIT macro

Replace numerical bit shift with BIT macro
in altera_timer

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agoserial: altera_uart: minor clean up
Thomas Chou [Sat, 31 Oct 2015 12:53:23 +0000 (20:53 +0800)]
serial: altera_uart: minor clean up

- Moved macro definitions to top
- Re-arrange header includes ascending order
- Remove unused header linux/compiler.h
- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agoserial: altera_uart: use BIT macro
Thomas Chou [Thu, 29 Oct 2015 13:18:01 +0000 (21:18 +0800)]
serial: altera_uart: use BIT macro

Replace numerical bit shift with BIT macro
in altera_uart

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agoserial: altera_jtag_uart: minor clean up
Thomas Chou [Sat, 31 Oct 2015 12:52:38 +0000 (20:52 +0800)]
serial: altera_jtag_uart: minor clean up

- Moved macro definitions to top
- Give spaces around the '>>' in ALTERA_JTAG_WSPACE()
- Re-arrange header includes ascending order
- Remove unused header linux/compiler.h
- Remove the penultimate comma in of_match ids

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agoserial: altera_jtag_uart: use BIT macro
Thomas Chou [Thu, 29 Oct 2015 13:09:31 +0000 (21:09 +0800)]
serial: altera_jtag_uart: use BIT macro

Replace numerical bit shift with BIT macro
in altera_jtag_uart

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agonios2: enable setexpr command in defconfig
Thomas Chou [Thu, 29 Oct 2015 08:33:23 +0000 (16:33 +0800)]
nios2: enable setexpr command in defconfig

Enable setexpr command in defconfig because it is really
useful as suggested by Marek.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
9 years agonios2: clean up macros that do not need a value in board header
Thomas Chou [Thu, 29 Oct 2015 08:43:46 +0000 (16:43 +0800)]
nios2: clean up macros that do not need a value in board header

Clean up macros that do not need a value as suggested by
Marek.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
9 years agonios2: use common sequence for reserve_uboot
Thomas Chou [Tue, 27 Oct 2015 03:23:39 +0000 (11:23 +0800)]
nios2: use common sequence for reserve_uboot

Use common sequence for reserve_uboot, as the result is
the same.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
9 years agonios2: use dram bank in board info
Thomas Chou [Tue, 27 Oct 2015 02:21:06 +0000 (10:21 +0800)]
nios2: use dram bank in board info

Use dram bank in board info, so that it displays correct
memory values in bdinfo command.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
9 years agonios2: change virt_to_phys to use physaddr_mask in global data
Thomas Chou [Tue, 27 Oct 2015 01:02:17 +0000 (09:02 +0800)]
nios2: change virt_to_phys to use physaddr_mask in global data

As virt_to_phys() is used a lot in DMA transfer, change it
to use physaddr_mask in global data. This will save an "if"
statement and get a little faster.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
9 years agonios2: remove the useless parenthesis in asm/io.h
Thomas Chou [Thu, 29 Oct 2015 13:00:32 +0000 (21:00 +0800)]
nios2: remove the useless parenthesis in asm/io.h

Remove the useless parenthesis in asm/io.h as suggested
by Marek.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
9 years agonios2: fix map_physmem to do real cache mapping
Thomas Chou [Tue, 27 Oct 2015 00:30:22 +0000 (08:30 +0800)]
nios2: fix map_physmem to do real cache mapping

Fix the map_physmem() to do real cache mapping.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-video
Tom Rini [Thu, 5 Nov 2015 12:47:21 +0000 (07:47 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-video

9 years agoMerge git://git.denx.de/u-boot-samsung
Tom Rini [Thu, 5 Nov 2015 12:46:45 +0000 (07:46 -0500)]
Merge git://git.denx.de/u-boot-samsung

9 years agoMerge git://git.denx.de/u-boot-usb
Tom Rini [Thu, 5 Nov 2015 12:46:37 +0000 (07:46 -0500)]
Merge git://git.denx.de/u-boot-usb

9 years agoMerge git://git.denx.de/u-boot-socfpga
Tom Rini [Thu, 5 Nov 2015 12:46:28 +0000 (07:46 -0500)]
Merge git://git.denx.de/u-boot-socfpga

9 years agovideo: Drop DEV_EXT_VIDEO flag
Bin Meng [Wed, 4 Nov 2015 07:23:38 +0000 (23:23 -0800)]
video: Drop DEV_EXT_VIDEO flag

DEV_EXT_VIDEO does not have any actual meaning, hence drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
9 years agovideo: Drop DEV_FLAGS_SYSTEM flag
Bin Meng [Wed, 4 Nov 2015 07:23:37 +0000 (23:23 -0800)]
video: Drop DEV_FLAGS_SYSTEM flag

DEV_FLAGS_SYSTEM does not have any actual meaning, hence drop it.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
9 years agosandbox: adc: Add missing header file
Przemyslaw Marczak [Wed, 4 Nov 2015 17:30:09 +0000 (18:30 +0100)]
sandbox: adc: Add missing header file

Commit: sandbox: add ADC driver

adds the driver without its main header file.
It causes build brake for sandbox_defonfig.

This commit adds a missing header:
- include/sandbox-adc.h

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoarm: dts: socfpga: Increase the spi-max-frequency for QSPI flash
Chin Liang See [Sat, 17 Oct 2015 13:32:56 +0000 (08:32 -0500)]
arm: dts: socfpga: Increase the spi-max-frequency for QSPI flash

With a working QSPI calibration, the SCLK can now run up to 100MHz

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agospi: cadence_qspi: Ensure check for max frequency in place
Chin Liang See [Sat, 17 Oct 2015 13:32:38 +0000 (08:32 -0500)]
spi: cadence_qspi: Ensure check for max frequency in place

Ensure the intended SCLK frequency not exceeding the maximum
frequency. If that happen, SCLK will set to maximum frequency.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
9 years agospi: cadence_qspi: Fix fdt read of spi-max-frequency
Chin Liang See [Sat, 17 Oct 2015 13:32:14 +0000 (08:32 -0500)]
spi: cadence_qspi: Fix fdt read of spi-max-frequency

Fix the fdt read for spi-max-frequency as it's contained
in the child node. Current state of code is always
returning default value.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Pavel Machek <pavel@denx.de>
9 years agospi: cadence_qspi: Ensure spi_calibration is run when sclk change
Chin Liang See [Sat, 17 Oct 2015 13:31:55 +0000 (08:31 -0500)]
spi: cadence_qspi: Ensure spi_calibration is run when sclk change

Ensuring spi_calibration is run when there is a change of sclk
frequency. This will ensure the qspi flash access works for high
sclk frequency

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
9 years agolib, fdt: Adding fdtdec_get_uint function
Chin Liang See [Sat, 17 Oct 2015 13:30:32 +0000 (08:30 -0500)]
lib, fdt: Adding fdtdec_get_uint function

Adding fdtdec_get_uint function which is the
unsigned version for fdtdec_get_int

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Heiko Schocher <hs@denx.de>
9 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Wed, 4 Nov 2015 23:30:51 +0000 (18:30 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

9 years agompc85xx: Add support for the Varisys Cyrus board
Andy Fleming [Wed, 4 Nov 2015 21:48:32 +0000 (15:48 -0600)]
mpc85xx: Add support for the Varisys Cyrus board

This board runs a P5020 or P5040 chip, and utilizes
an EEPROM with similar formatting to the Freescale P5020DS.

Large amounts of this code were developed by
Adrian Cox <adrian at humboldt dot co dot uk>

Signed-off-by: Andy Fleming <afleming@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agortc: Add MCP79411 support to DS1307 rtc driver
Andy Fleming [Wed, 21 Oct 2015 23:59:06 +0000 (18:59 -0500)]
rtc: Add MCP79411 support to DS1307 rtc driver

The code is from Adrian Cox, and is patterned after similar
support in Linux (drivers/rtc/rtc-ds1307.c:1121-1135). This
chip is used on the Cyrus board from Varisys.

Signed-off-by: Andy Fleming <afleming@gmail.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoARM: zynq: Remove zc70x target
Michal Simek [Fri, 30 Oct 2015 14:05:54 +0000 (15:05 +0100)]
ARM: zynq: Remove zc70x target

Remove zc70x target which was one setting for zc702 and zc706.
Currently zc702 and zc706 are separated.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
9 years agoarm: zynq: Move serial driver to driver model
Simon Glass [Sun, 18 Oct 2015 01:41:27 +0000 (19:41 -0600)]
arm: zynq: Move serial driver to driver model

Update this driver to use driver model and change all users.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoarm: zynq: serial: Drop non-device-tree serial driver portions
Simon Glass [Sun, 18 Oct 2015 01:41:26 +0000 (19:41 -0600)]
arm: zynq: serial: Drop non-device-tree serial driver portions

Since we use device tree in SPL also, we can drop this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynqmp: Enable DM and OF binding
Michal Simek [Sun, 18 Oct 2015 01:41:25 +0000 (19:41 -0600)]
ARM: zynqmp: Enable DM and OF binding

SPI requires DM and OF that's why enable DM for ZynqMP
and start to use configuration based on embedded OF.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
9 years agoarm: zynq: dts: Add U-Boot device tree additions
Simon Glass [Sun, 18 Oct 2015 01:41:24 +0000 (19:41 -0600)]
arm: zynq: dts: Add U-Boot device tree additions

We need to mark some device tree nodes so that they are available before
relocation. This enables driver model to find these automatically. In the
case of SPL it ensures that these nodes will be retained in SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agodm: arm: zynq: Enable device tree control in SPL
Simon Glass [Sun, 18 Oct 2015 01:41:23 +0000 (19:41 -0600)]
dm: arm: zynq: Enable device tree control in SPL

Move to using device tree control in SPL so that we can use the same driver
code in both SPL and U-Boot proper.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoarm: zynq: Support the debug UART
Simon Glass [Sun, 18 Oct 2015 01:41:22 +0000 (19:41 -0600)]
arm: zynq: Support the debug UART

Add support for the debug UART to assist with early debugging. Enable it
for Zybo as an example.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoarm: zynq: Drop unnecessary code in SPL board_init_f()
Simon Glass [Sun, 18 Oct 2015 01:41:21 +0000 (19:41 -0600)]
arm: zynq: Drop unnecessary code in SPL board_init_f()

Move to the new way of starting up SPL. Clearing of BSS and calling
board_init_r() is now handled by crt0.S.

Also tidy up the header include order.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoarm: zynq: Use separate device tree instead of embedded
Simon Glass [Sun, 18 Oct 2015 01:41:20 +0000 (19:41 -0600)]
arm: zynq: Use separate device tree instead of embedded

Production boards should not use CONFIG_OF_EMBED. Fix this for the Zybo
boards.

The image to use now becomes u-boot-dtb.bin.

For example, the .bif file should contain a line like:

  [load = 0x04000000,startup=0x04000000]/path/to/u-boot-dtb.bin

instead of:

  [load = 0x04000000,startup=0x04000000]/path/to/u-boot.bin

When device tree is enabled we need to load u-boot-dtb.img. Change the
settings so that SPL does the right thing.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agodm: spl: Support device tree when BSS is in a different section
Simon Glass [Sun, 18 Oct 2015 01:41:19 +0000 (19:41 -0600)]
dm: spl: Support device tree when BSS is in a different section

At present in SPL we place the device tree immediately after BSS. This
avoids needing to copy it out of the way before BSS can be used. However on
some boards BSS is not placed with the image - e.g. it can be in RAM if
available.

Add an option to tell U-Boot that the device tree should be placed at the
end of the image binary (_image_binary_end) instead of at the end of BSS.

Note: A common reason to place BSS in RAM is to support the FAT filesystem.
We should update the code so that it does not use so much BSS.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agodm: spl: Generate u-boot-spl-dtb.bin only when enabled
Simon Glass [Sun, 18 Oct 2015 01:41:18 +0000 (19:41 -0600)]
dm: spl: Generate u-boot-spl-dtb.bin only when enabled

At present this file is generated even when device tree is not enabled in
SPL. Avoid this, since this file serves no purpose in that case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agodm: serial: Deal with stdout-path with an alias
Simon Glass [Sun, 18 Oct 2015 01:41:17 +0000 (19:41 -0600)]
dm: serial: Deal with stdout-path with an alias

Sometimes stdout-path contains a UART alias along with speed, etc. For
example:

stdout-path = "serial0:115200n8";

Add support for decoding this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agofdtgrep: Simplify the alias generation code
Simon Glass [Sun, 18 Oct 2015 01:41:16 +0000 (19:41 -0600)]
fdtgrep: Simplify the alias generation code

We don't need to allocate a new region list when we run out of space.
The outer function can take care of this for us.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agofdt: Correct handling of alias regions
Simon Glass [Sun, 18 Oct 2015 01:41:15 +0000 (19:41 -0600)]
fdt: Correct handling of alias regions

At present the last four bytes of the alias region are dropped in
the case where the last alias is included. This results in a corrupted
device tree. Fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agofdt: Add a function to look up a /chosen property
Simon Glass [Sun, 18 Oct 2015 01:41:14 +0000 (19:41 -0600)]
fdt: Add a function to look up a /chosen property

It is sometimes useful to find a property in the chosen node. Add a function
for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: zynqmp: Add DTS for ep108 board
Michal Simek [Fri, 30 Oct 2015 14:39:18 +0000 (15:39 +0100)]
ARM: zynqmp: Add DTS for ep108 board

Add DTS for ep108 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: u-boot

9 years agozynq-common: Define CONFIG_SYS_I2C_ZYNQ based on board config
Siva Durga Prasad Paladugu [Wed, 28 Oct 2015 05:49:08 +0000 (11:19 +0530)]
zynq-common: Define CONFIG_SYS_I2C_ZYNQ based on board config

Enable CONFIG_SYS_I2C_ZYNQ only if it has either I2C0 or I2C1
enabled in a board config.This fixes the issue of i2c error
during board init if board specific doesnt have either I2C0
or I2C1.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoarm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines
Dinh Nguyen [Mon, 2 Nov 2015 23:11:21 +0000 (17:11 -0600)]
arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines

The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register,
not the mpumodrst. So the bank for these reset bits should be 1, not 0.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
9 years agousb: udc: Fix warnings on 64-bit builds
Michal Simek [Fri, 30 Oct 2015 15:21:30 +0000 (16:21 +0100)]
usb: udc: Fix warnings on 64-bit builds

Cast u32 bit value to 64bit before recasting to 64bit pointer to avoid
pointer from integer cast size mismatch warnings.

Warning log:
+../drivers/usb/gadget/udc/udc-core.c: In function
‘usb_gadget_unmap_request’:
+../drivers/usb/gadget/udc/udc-core.c:68:19: warning: cast to pointer
from integer of different size [-Wint-to-pointer-cast]

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agousb: lthor: Specify correct parameter for sizeof type
Michal Simek [Fri, 30 Oct 2015 15:19:43 +0000 (16:19 +0100)]
usb: lthor: Specify correct parameter for sizeof type

This patch removes this warning:
  CC      drivers/usb/gadget/f_thor.o
drivers/usb/gadget/f_thor.c: In function ‘thor_tx_data’:
drivers/usb/gadget/f_thor.c:572:2: warning: format ‘%d’ expects argument
of type ‘int’, but argument 4 has type ‘long unsigned int’ [-Wformat=]
  debug("%s: dev->in_req->length:%d to_cpy:%d\n", __func__,
  ^

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agousb: dwc3: Fix warnings on 64-bit builds
Michal Simek [Fri, 30 Oct 2015 15:24:06 +0000 (16:24 +0100)]
usb: dwc3: Fix warnings on 64-bit builds

Change aritmentics to use 64bit types to be compatible with 64bit
builds.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
9 years agoARM: dra7xx_evm: Add DFU support for qspi flash
Vignesh R [Tue, 20 Oct 2015 09:52:01 +0000 (15:22 +0530)]
ARM: dra7xx_evm: Add DFU support for qspi flash

This adds support to update firmware on qspi flash using DFU.

On device:
=> setenv dfu_alt_info ${dfu_alt_info_qspi}
=> dfu 0 sf 0:0

On host:
$ sudo dfu-util -l
$ sudo dfu-util -D MLO -a MLO
$ sudo dfu-util -D u-boot.img -a u-boot.img

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agodfu: dfu_sf: Pass duplicate devstr to parse_dev
Vignesh R [Tue, 20 Oct 2015 09:52:00 +0000 (15:22 +0530)]
dfu: dfu_sf: Pass duplicate devstr to parse_dev

parse_dev() alters the string pointed by devstr parameter. Due to this
subsequent parsing of sf entities will fail, as string pointed by devstr
is no longer valid sf dev arguments.
Fix this by passing pointer to the copy of the string to parse_dev
instead of pointer to the actual devstr.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
9 years agoohci: Add missing cache-flush for hcca area
Hans de Goede [Tue, 20 Oct 2015 16:39:29 +0000 (18:39 +0200)]
ohci: Add missing cache-flush for hcca area

We need to cache-flush the hcca area after the initial memset, otherwise
on the first hc_interrupt we might see an old $random value as done_head and
try to interpret that as the address for a completed td (followed by chaos).

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
9 years agocommon/usb_storage.c: Clean up usb_storage_probe()
Tom Rini [Sun, 11 Oct 2015 11:26:27 +0000 (07:26 -0400)]
common/usb_storage.c: Clean up usb_storage_probe()

We have the protocol and subclass variables which are used only in
disabled debug code.  This code dates back to the initial git import and
seemingly dead code so remove it.

This was detected by Coverity (CID 131117)

Signed-off-by: Tom Rini <trini@konsulko.com>
9 years agoarm: at91: reworked meesc board support
Daniel Gorsulowski [Mon, 2 Nov 2015 06:59:49 +0000 (07:59 +0100)]
arm: at91: reworked meesc board support

Signed-off-by: Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
9 years agommc: atmel: Add atmel sdhci support
Wenyou Yang [Mon, 2 Nov 2015 02:57:09 +0000 (10:57 +0800)]
mmc: atmel: Add atmel sdhci support

The SDHCI is introduced by sama5d2, named as Secure Digital Multimedia
Card Controller(SDMMC). It supports the embedded MultiMedia Card (e.MMC)
Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO
V3.0 specification. It is compliant with the SD Host Controller Standard
V3.0 specification.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agoarm: at91: clock: Add the generated clock support
Wenyou Yang [Fri, 30 Oct 2015 01:47:02 +0000 (09:47 +0800)]
arm: at91: clock: Add the generated clock support

Some peripherals may need a second clock source that may be different
from the system clock. This second clock is the generated clock (GCK)
and is managed by the PMC via PMC_PCR.

For simplicity, the clock source of the GCK is fixed to PLLA_CLK.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agommc: sdhci: Fix the SD clock stop sequence
Wenyou Yang [Tue, 22 Sep 2015 06:59:25 +0000 (14:59 +0800)]
mmc: sdhci: Fix the SD clock stop sequence

According to the SDHC specification, stopping the SD Clock is by setting
the SD Clock Enable bit in the Clock Control register at 0, instead of
setting all bits at 0.

Before stopping the SD clock, we need to make sure all SD transactions
to complete, so add checking the CMD and DAT bits in the Presen State
register, before stopping the SD clock.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
9 years agoarm: at91: Change the Chip ID registers' addresses
Wenyou Yang [Tue, 8 Sep 2015 06:38:26 +0000 (14:38 +0800)]
arm: at91: Change the Chip ID registers' addresses

Provide the specific addresses for the Chip ID and Chip ID Extension
registers, instead of the offset, which make it use on other chips.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agompc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1
Shengzhou Liu [Mon, 26 Oct 2015 05:51:58 +0000 (13:51 +0800)]
mpc85xx/t2081: enable parsing DDR ratio for T2081 rev1.1

T2081 rev 1.1 changes MEM_PLL_RAT in RCW which requires new parsing
for PLL ratio.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoT104xD4RDB: Fix PHY address for PHY connected to FM1@DTSEC3
Codrin Ciubotariu [Mon, 12 Oct 2015 13:33:13 +0000 (16:33 +0300)]
T104xD4RDB: Fix PHY address for PHY connected to FM1@DTSEC3

On T1040D4RDB board, u-boot fails to connect port FM1@DTSEC3 to
the Ethernet PHY because the wrong PHY address is used. Also,
T1040D4RDB supports SGMII on one port only.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agommc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter Card
Yangbo Lu [Thu, 17 Sep 2015 02:27:48 +0000 (10:27 +0800)]
mmc: fsl_esdhc: enable EVDD automatic control for SD/MMC Legacy Adapter Card

When detecting SDHC Adapter Card Type 2(SD/MMC Legacy Adapter Card),
enable EVDD automatic control via SDHC_VS. This could support SD card
IO voltage switching for UHS-1 speed mode.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/t1040qds: enable peripheral clock for eSDHC
Yangbo Lu [Thu, 17 Sep 2015 02:27:38 +0000 (10:27 +0800)]
powerpc/t1040qds: enable peripheral clock for eSDHC

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agopowerpc/t1040qds: enable adapter card type identification support
Yangbo Lu [Thu, 17 Sep 2015 02:27:27 +0000 (10:27 +0800)]
powerpc/t1040qds: enable adapter card type identification support

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agommc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter Card
Yangbo Lu [Thu, 17 Sep 2015 02:27:12 +0000 (10:27 +0800)]
mmc: fsl_esdhc: enable dat[4:7] for eMMC4.5 Adapter Card

If adapter card type identification is supported for platform, we would
enable dat[4:7] for eMMC4.5 Adapter Card.

Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agoPowerpc: eSDHC: expand a fix to T4160
Shaohui Xie [Fri, 11 Sep 2015 11:02:13 +0000 (19:02 +0800)]
Powerpc: eSDHC: expand a fix to T4160

commit b8e5b07225 "Powerpc: eSDHC: Fix mmc read write err in uboot of
T4240QDS board", T4160 also needs this fix.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agot1040d4rdb: assign muxed pins to qe-tdm when set hwconfig qe-tdm
Zhao Qiang [Fri, 28 Aug 2015 02:31:50 +0000 (10:31 +0800)]
t1040d4rdb: assign muxed pins to qe-tdm when set hwconfig qe-tdm

qe-tdm is muxed with diu, if hwconfig setted as qe-tdm,
assign muxed pins to qe-tdm, then delete diu node from
device tree.

Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
9 years agosamsung: clean up checkpatch issues
Minkyu Kang [Fri, 23 Oct 2015 07:21:20 +0000 (16:21 +0900)]
samsung: clean up checkpatch issues

This patch will fix these checkpatch issues.

CHECK: Alignment should match open parenthesis
+ printf("Enter: %s %s\n", mode_name[mode][0],
+  mode_info[mode]);

CHECK: Alignment should match open parenthesis
+ lcd_printf("\n\n\t%s %s\n", mode_name[mode][0],
+     mode_info[mode]);

CHECK: Alignment should match open parenthesis
+ lcd_printf("\t%s  %s - %s\n\n", selection[i],
+ mode_name[i][0],

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoodroid: clean up checkpatch issues
Minkyu Kang [Fri, 23 Oct 2015 07:15:04 +0000 (16:15 +0900)]
odroid: clean up checkpatch issues

This patch will fix these checkpatch issues.

+static const char *mmc_regulators[] = {

CHECK: Blank lines aren't necessary before a close brace '}'
+
+}

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agosmdk2410: clean up checkpatch issues
Minkyu Kang [Fri, 23 Oct 2015 07:12:28 +0000 (16:12 +0900)]
smdk2410: clean up checkpatch issues

This patch will fix these checkpatch issues.

ERROR: spaces required around that '==' (ctx:VxV)
+#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */

ERROR: spaces required around that '==' (ctx:VxV)
+#elif FCLK_SPEED==1 /* Fout = 202.8MHz */

ERROR: spaces required around that '==' (ctx:VxV)
+#if USB_CLOCK==0

ERROR: spaces required around that '==' (ctx:VxV)
+#elif USB_CLOCK==1

CHECK: spaces required around that ':' (ctx:VxV)
+   "bne 1b":"=r" (loops):"0" (loops));

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agosmdkv310: clean up checkpatch issues
Minkyu Kang [Fri, 23 Oct 2015 06:59:37 +0000 (15:59 +0900)]
smdkv310: clean up checkpatch issues

This patch will fix these checkpatch issues.

WARNING: Avoid unnecessary line continuations
+ gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, \

WARNING: Avoid unnecessary line continuations
+ gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, \

WARNING: Avoid unnecessary line continuations
+ gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, \

WARNING: Avoid unnecessary line continuations
+ gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, \

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoarm: exynos: clean up checkpatch issues
Minkyu Kang [Thu, 22 Oct 2015 05:51:58 +0000 (14:51 +0900)]
arm: exynos: clean up checkpatch issues

This patch will fix these checkpatch issues.

ERROR: Macros with complex values should be enclosed in parentheses
+#define DEFAULT_DQS_X4 (DEFAULT_DQS << 24) || (DEFAULT_DQS << 16) \
+ || (DEFAULT_DQS << 8) || (DEFAULT_DQS << 0)

ERROR: space prohibited before that ',' (ctx:WxW)
+ writel(val , &drex0->concontrol);
             ^

ERROR: space prohibited before that ',' (ctx:WxW)
+ writel(val , &drex1->concontrol);
                ^

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agos5p sdhci: call pinmux for card's gpio pins before use them
Przemyslaw Marczak [Wed, 28 Oct 2015 14:41:50 +0000 (15:41 +0100)]
s5p sdhci: call pinmux for card's gpio pins before use them

The SD card detection depends on checking one pin state.
But the pin was configured after card was detected, which is wrong.

This commit fixes this, by moving call to pinmux before use the pin.

Tested-on: Odroid U3 and Odroid X2.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoExynos4412: pinmux: disable pull for MMC pins
Przemyslaw Marczak [Wed, 28 Oct 2015 14:41:49 +0000 (15:41 +0100)]
Exynos4412: pinmux: disable pull for MMC pins

There are 8 pins for SD card in Exynos, but the MUX was configured
only for 7, since the one was used for card detection.
This caused the pin's pull wrong configuration.

This commit fixes this and the card detect can work properly,
after call this function.

Tested-on: Odroid U3 and Odroid X2.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agosandbox: add ADC unit tests
Przemyslaw Marczak [Tue, 27 Oct 2015 12:08:07 +0000 (13:08 +0100)]
sandbox: add ADC unit tests

This commit adds unit tests for ADC uclass's methods using sandbox ADC.

Testing proper ADC binding:
- dm_test_adc_bind()                    - device binding
- dm_test_adc_wrong_channel_selection() - checking wrong channel selection

Testing ADC supply operations:
- dm_test_adc_supply():
  - Vdd/Vss values validating
  - Vdd regulator updated value validating
  - Vdd regulator's auto enable state validating

Testing ADC operations results:
- dm_test_adc_single_channel_conversion() - single channel start/data
- dm_test_adc_single_channel_shot()       - single channel shot
- dm_test_adc_multi_channel_conversion()  - multi channel start/data
- dm_test_adc_multi_channel_shot()        - multi channel single shot

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agosandbox: add ADC driver
Przemyslaw Marczak [Tue, 27 Oct 2015 12:08:06 +0000 (13:08 +0100)]
sandbox: add ADC driver

This commit adds implementation of Sandbox ADC device emulation.
The device provides:
- single and multi-channel conversion
- 4 channels with predefined conversion output data
- 16-bit resolution

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoexynos5-dt-types: add board detection for Odroid XU3/XU3L/XU4.
Przemyslaw Marczak [Tue, 27 Oct 2015 12:08:05 +0000 (13:08 +0100)]
exynos5-dt-types: add board detection for Odroid XU3/XU3L/XU4.

This commit adds additional file with implementation of board
detection code for Odroid-XU3/XU4.

The detection depends on compatible found in fdt:
- "samsung,exynos5" - uses Exynos5 generic code
- "samsung,odroidxu3" - try detect XU3 revision

There are few revisions of Odroid XU3/XU4, each can be detected
by checking the value of channel 9 of built-in ADC:
 Rev   ADC  Board
 0.1     0  XU3 0.1
 0.2   372  XU3 0.2 | XU3L - no DISPLAYPORT
 0.3  1280  XU4 0.1

The detection code depends on the ADC+10% value.

Implementation of functions:
- set_board_type()     - read ADC and set type
- get_board_rev()      - returns board revision: 1..3
- get_board_type()     - returns board type string

Additional functions with return values of bool:
- board_is_generic()   - true if found compatible "samsung,exynos5"
                         but not "samsung,odroidxu3"
- board_is_odroidxu3() - true if found compatible "samsung,odroidxu3"
                         and one of XU3 revision.
- board_is_odroidxu4() - true if found compatible "samsung,odroidxu3"
                         and XU4 revision.

After I2C controller init, the get_board_type() can check
if the XU3 board is a "Lite" variant, by probing chip
0x40 on I2C0 (INA231 - exists only on non-lite).
This is useful for setting fdt file name at misc_init_r().

Enabled configs:
- CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
- CONFIG_ODROID_REV_AIN
- CONFIG_REVISION_TAG
- CONFIG_BOARD_TYPES

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoOdroid-XU3: dts: enable ADC, with request for pre-reloc bind
Przemyslaw Marczak [Tue, 27 Oct 2015 12:08:04 +0000 (13:08 +0100)]
Odroid-XU3: dts: enable ADC, with request for pre-reloc bind

This ADC is required for Odroid's board revision detection.
The pre-reloc request is enabled, since board detection will
be done in one of early function call.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoExynos54xx: dts: add ADC node
Przemyslaw Marczak [Tue, 27 Oct 2015 12:08:03 +0000 (13:08 +0100)]
Exynos54xx: dts: add ADC node

This commit adds common ADC node, which is disabled as default.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoOdroid-XU3: enable s2mps11 PMIC support
Przemyslaw Marczak [Tue, 27 Oct 2015 12:08:02 +0000 (13:08 +0100)]
Odroid-XU3: enable s2mps11 PMIC support

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodm: adc: add Exynos54xx compatible ADC driver
Przemyslaw Marczak [Tue, 27 Oct 2015 12:08:01 +0000 (13:08 +0100)]
dm: adc: add Exynos54xx compatible ADC driver

This commit adds driver for Exynos54xx ADC subsystem.

The driver is implemented using driver model, amd provides
ADC uclass's methods for ADC single channel operations:
- adc_start_channel()
- adc_channel_data()
- adc_stop()

The basic parameters of ADC conversion, are:
- sample rate: 600KSPS
- output the data as average of 8 time conversion

ADC features:
- sample rate: 600KSPS
- resolution: 12-bit
- channels: 10 (analog multiplexer)

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodm: adc: add simple ADC uclass implementation
Przemyslaw Marczak [Tue, 27 Oct 2015 12:08:00 +0000 (13:08 +0100)]
dm: adc: add simple ADC uclass implementation

This commit adds:
- new uclass id: UCLASS_ADC
- new uclass driver: drivers/adc/adc-uclass.c

The new uclass's API allows for ADC operation on:
* single-channel with channel selection by a number
* multti-channel with channel selection by bit mask

ADC uclass's functions:
* single-channel:
  - adc_start_channel()        - start channel conversion
  - adc_channel_data()         - get conversion data
  - adc_channel_single_shot()  - start/get conversion data
* multi-channel:
  - adc_start_channels()       - start selected channels conversion
  - adc_channels_data()        - get conversion data
  - adc_channels_single_shot() - start/get conversion data for channels
                                 selected by bit mask
* general:
  - adc_stop()      - stop the conversion
  - adc_vdd_value() - positive reference Voltage value with polarity [uV]
  - adc_vss_value() - negative reference Voltage value with polarity [uV]
  - adc_data_mask() - conversion data bit mask

The device tree can provide below constraints/properties:
- vdd-polarity-negative: if true: Vdd = vdd-microvolts * (-1)
- vss-polarity-negative: if true: Vss = vss-microvolts * (-1)
- vdd-supply:            phandle to Vdd regulator's node
- vss-supply:            phandle to Vss regulator's node
And optional, checked only if the above corresponding, doesn't exist:
  - vdd-microvolts:      positive reference Voltage [uV]
  - vss-microvolts:      negative reference Voltage [uV]

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodm: regulator: add function device_get_supply_regulator()
Przemyslaw Marczak [Tue, 27 Oct 2015 12:07:59 +0000 (13:07 +0100)]
dm: regulator: add function device_get_supply_regulator()

Some devices are supplied by configurable regulator's output.
But there was no function for getting it. This commit adds
function, that allows for getting the supply device by it's phandle.

The returned regulator device can be used with regulator uclass's API.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agodm: pmic: add s2mps11 PMIC I/O driver
Przemyslaw Marczak [Tue, 27 Oct 2015 12:07:58 +0000 (13:07 +0100)]
dm: pmic: add s2mps11 PMIC I/O driver

This driver allows I/O operations on the Samsung S2MPS11 PMIC,
which provides lots of LDO/BUCK outputs.

To enable it, update defconfig with:
- CONFIG_PMIC_S2MPS11
and additional, if were not defined:
- CONFIG_CMD_PMIC
- CONFIG_ERRNO_STR

The binding info: doc/device-tree-bindings/pmic/s2mps11.txt

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoExynos5422/5800: set cpu id to 0x5422
Przemyslaw Marczak [Tue, 27 Oct 2015 12:07:57 +0000 (13:07 +0100)]
Exynos5422/5800: set cpu id to 0x5422

The proper CPU ID for those Exynos variants is 0x5422,
but before the 0x5800 was set. This commit fix this back.

Changes:
- set cpu id to 0x5422 instead of 0x5800
- remove macro proid_is_exynos5800()
- add macro proid_is_exynos5422()
- change the calls to proid_is_exynos5800() with new macro

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoPeach-Pi: dts: add cpu-model string
Przemyslaw Marczak [Tue, 27 Oct 2015 12:07:56 +0000 (13:07 +0100)]
Peach-Pi: dts: add cpu-model string

This platform is based on Exynos5800 but the cpu id is 0x5422.
This doesn't fit the common Exynos SoC name convention, so now,
the CPU name is defined by device tree string, to be printed
properly.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agos5p: cpu_info: print "cpu-model" if exists in dts
Przemyslaw Marczak [Tue, 27 Oct 2015 12:07:55 +0000 (13:07 +0100)]
s5p: cpu_info: print "cpu-model" if exists in dts

The CPU name for Exynos was concatenated with cpu id,
but for new Exynos platforms, like Chromebook Peach Pi
based on Exynos5800, the name of SoC variant does not
include the real SoC cpu id (0x5422).

For such case, the CPU name should be defined in device tree.

This commit introduces new device-tree property for Exynos:
- "cpu-model" - with cpu name string
If defined, then the cpu id is not printed.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agosamsung: board/misc: check returned pointer for get_board_type() calls
Przemyslaw Marczak [Tue, 27 Oct 2015 12:07:54 +0000 (13:07 +0100)]
samsung: board/misc: check returned pointer for get_board_type() calls

The function get_board_type() is called in two places by common code,
but the returned pointer was never check.

This commit adds checking the returned pointer, before use it.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
9 years agoARM: at91: sama5: change the environment address to 0x6000
Josh Wu [Tue, 27 Oct 2015 05:31:33 +0000 (13:31 +0800)]
ARM: at91: sama5: change the environment address to 0x6000

As sama5 board has 32k sram size, so the at91bootstrap and spl for sama5
boards is bigger than 16k (0x4000). That will overlap the U-Boot
environment. So I move environment to 0x6000. And reduce its size as
well.

Following shows the size of the spl binaries (v2015.04 vs v2015.07):

% ls v2015.04/*spi*spl.bin -l | awk '{print $5,$(NF)}'
15540 v2015.04/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin
15704 v2015.04/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin
16064 v2015.04/sama5d3xek_spiflash_defconfig_u-boot-spl.bin
16304 v2015.04/sama5d4ek_spiflash_defconfig_u-boot-spl.bin
16304 v2015.04/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin

% ls v2015.07/*spi*spl.bin -l | awk '{print $5,$(NF)}'
16136 v2015.07/at91sam9n12ek_spiflash_defconfig_u-boot-spl.bin
16300 v2015.07/at91sam9x5ek_spiflash_defconfig_u-boot-spl.bin
16664 v2015.07/sama5d3xek_spiflash_defconfig_u-boot-spl.bin
16904 v2015.07/sama5d4ek_spiflash_defconfig_u-boot-spl.bin
16904 v2015.07/sama5d4_xplained_spiflash_defconfig_u-boot-spl.bin

The gcc version is:  gcc 4.7.3 (Ubuntu/Linaro 4.7.3-12ubuntu1)

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Bo Shen <voice.shen@gmail.com>
9 years agolcd: atmel: Add 32bpp support for HLCDC
Marek Vasut [Fri, 23 Oct 2015 20:55:40 +0000 (22:55 +0200)]
lcd: atmel: Add 32bpp support for HLCDC

Add 32bpp framebuffer support for the Atmel HLCDC driver. This is
needed for output bpp higher than 16bpp.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
9 years agommc: atmel: Zap global 'initialized' variable
Marek Vasut [Fri, 23 Oct 2015 18:46:31 +0000 (20:46 +0200)]
mmc: atmel: Zap global 'initialized' variable

Global variables are bad. Get rid of this particular one, so we can
correctly instantiate multiple atmel mci interfaces, without having
them interfere with one another.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>