oweals/u-boot.git
10 years agoARM: DRA7: Enable software leveling for dra7
Sricharan R [Thu, 31 Jul 2014 06:35:50 +0000 (12:05 +0530)]
ARM: DRA7: Enable software leveling for dra7

Currently hw leveling is enabled by default on DRA7/72.
But the hardware team suggested to use sw leveling as hw leveling
is not characterized and seen some test case failures.
So enabling sw leveling on all DRA7 platforms.

Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
10 years agoSOM: tam3517: convert to generic board
Jeroen Hofstee [Mon, 28 Jul 2014 21:34:42 +0000 (23:34 +0200)]
SOM: tam3517: convert to generic board

Cc: Raphael Assenat <raph@8d.com>
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
10 years agokeystone2: use EFUSE_BOOTROM information to configure PLLs
Vitaly Andrianov [Fri, 25 Jul 2014 19:23:19 +0000 (22:23 +0300)]
keystone2: use EFUSE_BOOTROM information to configure PLLs

This patch reads EFUSE_BOOTROM register to see the maximum supported
clock for CORE and TETRIS PLLs and configure them accordingly.

Acked-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Vitaly Andrianov <vitalya@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
10 years agoboard/ti/dra7xx: add support for parallel NOR
pekon gupta [Tue, 22 Jul 2014 10:33:24 +0000 (16:03 +0530)]
board/ti/dra7xx: add support for parallel NOR

This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM.
The Flash device is connected to GPMC controller on chip-select[0] and accessed
as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and
is CFI compatible.

As multiple devices are share GPMC pins on this board, so following board
settings are required to detect NOR device:
     SW5.1 (NAND_BOOTn) = OFF (logic-1)
     SW5.2 (NOR_BOOTn)  = ON  (logic-0) /* Active-low */
     SW5.3 (eMMC_BOOTn) = OFF (logic-1)
     SW5.4 (QSPI_BOOTn) = OFF (logic-1)

And also set appropriate SYSBOOT configurations:
     SW3.1 (SYSBOOT[ 8])= ON  (logic-1) /* selects SYS_CLK1 speed */
     SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
     SW3.3 (SYSBOOT[10])= ON  (logic-1) /* wait-pin monitoring = enabled */
     SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */
     SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */
     SW3.6 (SYSBOOT[13])= ON  (logic-1) /* device bus-width: 1(x16) */
     SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
     SW3.8 (SYSBOOT[15])= ON  (logic-1) /* reserved */

Also, following changes are required to enable NOR Flash support in
dra7xx_evm board profile:

10 years agoboard/ti/dra7xx: add support for parallel NAND
pekon gupta [Tue, 22 Jul 2014 10:33:23 +0000 (16:03 +0530)]
board/ti/dra7xx: add support for parallel NAND

This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC
chip-select[0] on DRA7xx EVM.
As GPMC pins are shared by multiple devices, so in addition to this patch
following board settings are required for NAND device detection [1]:

  SW5.9 (GPMC_WPN)   = OFF (logic-1)
  SW5.1 (NAND_BOOTn) = ON  (logic-0) /* Active-low */
  SW5.2 (NOR_BOOTn)  = OFF (logic-1)
  SW5.3 (eMMC_BOOTn) = OFF (logic-1)
  SW5.4 (QSPI_BOOTn) = OFF (logic-1)

And also set appropriate SYSBOOT configurations
  SW2.1 (SYSBOOT[0]) = ON  (logic-1) /* selects NAND Boot */
  SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */
  SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */
  SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */
  SW2.5 (SYSBOOT[4]) = ON  (logic-1) /* selects NAND Boot */
  SW2.6 (SYSBOOT[5]) = ON  (logic-1) /* selects NAND Boot */
  SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */
  SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */

  SW3.1 (SYSBOOT[ 8])= ON  (logic-1) /* selects SYS_CLK1 speed */
  SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */
  SW3.3 (SYSBOOT[10])= ON  (logic-1) /* wait-pin monitoring = enabled */
  SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */
  SW3.5 (SYSBOOT[12])= ON  (logic-1) /* device type: Addr/Data Muxed */
  SW3.6 (SYSBOOT[13])= ON  (logic-1) /* device bus-width: 1(x16) */
  SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */
  SW3.8 (SYSBOOT[15])= ON  (logic-1) /* reserved */

Following changes are required in board.cfg to enable NAND on J6-EVM:

10 years agoboard/ti/am43xx: add support for parallel NAND
pekon gupta [Tue, 22 Jul 2014 10:33:22 +0000 (16:03 +0530)]
board/ti/am43xx: add support for parallel NAND

This patch adds support for NAND device connected to GPMC chip-select on
following AM43xx EVM boards.

am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a
  time either eMMC or NAND can be enabled. Selection between eMMC and NAND is
  controlled by:
  (a) Statically using Jumper on connecter (J89) present on board.
  (a) If Jumper on J89 is NOT used, then selection can be dynamically controlled
      by driving SPI2_CS0[MUX_MODE=GPIO] pin via software:
      SPI2_CS0 == 0: NAND (default)
      SPI2_CS0 == 1: eMMC

am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI,
  Thus only one of the two can be used at a time. Selection is controlled by:
  (a) Dynamically driving following GPIO pin from software
      GPMC_A0(GPIO) == 0 NAND is selected (default)

NAND device (MT29F4G08AB) on these boards has:
 - data-width=8bits
 - blocksize=256KB
 - pagesize=4KB
 - oobsize=224 bytes
For above NAND device, ROM code expects the boot-loader to be flashed in BCH16
ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs.

Signed-off-by: Pekon Gupta <pekon@ti.com>
10 years agoboard/ti/am335x: add support for beaglebone NOR Cape
pekon gupta [Tue, 22 Jul 2014 10:33:21 +0000 (16:03 +0530)]
board/ti/am335x: add support for beaglebone NOR Cape

This patch adds support of NOR cape[1] for both Beaglebone (white) and
Beaglebone(Black) boards. NOR Flash on this cape is connected to GPMC
chip-select[0] and accesses as external memory-mapped device.
This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device.

As GPMC chip-select[0] can be shared by multiple capes so NOR profile is
not enabled by default in boards.cfg. Following changes are required to
enable NOR cape detection when building am335x_boneblack board profile.

Signed-off-by: Tom Rini <trini@ti.com>
10 years agoboard/ti/am335x: add support for beaglebone NAND cape
pekon gupta [Tue, 22 Jul 2014 10:33:20 +0000 (16:03 +0530)]
board/ti/am335x: add support for beaglebone NAND cape

Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions of Beaglebone(AM335x) NAND capes
(a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64
(b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224
Further information and datasheets can be found at [1] and [2]

* How to boot from NAND using Memory Expander + NAND Cape ? *
 - Important: As BOOTSEL values are sampled only at POR, so after changing any
   setting on SW2 (DIP switch), disconnect and reconnect all board power supply
   (including mini-USB console port) to POR the beaglebone.

 - Selection of ECC scheme
  for NAND cape(a), ROM code expects BCH8_HW ecc-scheme
  for NAND cape(b), ROM code expects BCH16_HW ecc-scheme

 - Selction of boot modes can be controlled via  DIP switch(SW2) present on
   Memory Expander cape.
   SW2[SWITCH_BOOT] == OFF  follow default boot order  MMC-> SPI -> UART -> USB
   SW2[SWITCH_BOOT] == ON   boot mode selected via DIP switch(SW2)
   So to flash NAND, first boot via MMC or other sources and then switch to
   SW2[SWITCH_BOOT]=ON to boot from NAND Cape.

 - For NAND boot following switch settings need to be followed
   SW2[ 1] = OFF  (SYSBOOT[ 0]==1: NAND boot mode selected )
   SW2[ 2] = OFF  (SYSBOOT[ 1]==1:       -- do --          )
   SW2[ 3] = ON   (SYSBOOT[ 2]==0:       -- do --          )
   SW2[ 4] = ON   (SYSBOOT[ 3]==0:       -- do --          )
   SW2[ 5] = OFF  (SYSBOOT[ 4]==1:       -- do --          )
   SW2[ 6] = OFF  (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device )
   SW2[ 7] = ON   (SYSBOOT[ 9]==0: ECC done by ROM  )
   SW2[ 8] = ON   (SYSBOOT[10]==0: Non Muxed device )
   SW2[ 9] = ON   (SYSBOOT[11]==0:    -- do --      )

[1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion
[2] http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module

*IMPORTANT NOTE*
As Beaglebone board shares the same config as AM335x EVM, so following
changes are required in addition to this patch for Beaglebone NAND cape.
(1) Enable NAND in am335x_beaglebone board profile
(2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because:
 -  AM335x EVM has NAND device with datawidth=8, whereas
 -  Beaglebone NAND cape has NAND device with data-width=16

10 years agoboard/ti/am335x: update configs for parallel NAND
pekon gupta [Tue, 22 Jul 2014 10:33:19 +0000 (16:03 +0530)]
board/ti/am335x: update configs for parallel NAND

This patch
- consolidate CONFIG_SYS_NAND_xx and CONFIG_SPL_NAND_xx from various
  configuration files into single file.
- update MTD Partition table to match AM335x_EVM DT in linux-kernel
- segregate CONFIGs based on different boot modes (like SPL and U-Boot)

Signed-off-by: Pekon Gupta <pekon@ti.com>
10 years agoam335x_evm: Enable CONFIG_SPL_ENV_SUPPORT on EMMC_BOOT
Tom Rini [Fri, 18 Jul 2014 15:51:35 +0000 (11:51 -0400)]
am335x_evm: Enable CONFIG_SPL_ENV_SUPPORT on EMMC_BOOT

When we're using EMMC_BOOT that means we have environment on eMMC so
we can make use of CONFIG_SPL_ENV_SUPPORT within Falcon Mode.

Signed-off-by: Tom Rini <trini@ti.com>
10 years agocommon/Makefile: Consolidate SPL ENV options, correct inclusion
Tom Rini [Fri, 18 Jul 2014 15:51:34 +0000 (11:51 -0400)]
common/Makefile: Consolidate SPL ENV options, correct inclusion

CONFIG_SPL_NET_SUPPORT is not the only time we want SPL to ahve
environment, CONFIG_SPL_ENV_SUPPORT is when we want it.

Signed-off-by: Tom Rini <trini@ti.com>
10 years agotseries: Set CONFIG_ENV_IS_NOWHERE for SPL+NAND
Tom Rini [Fri, 18 Jul 2014 15:51:33 +0000 (11:51 -0400)]
tseries: Set CONFIG_ENV_IS_NOWHERE for SPL+NAND

In the case of SPL on these boards we only need environment for
SPL_USBETH, so it's safe to normally use ENV_IS_NOWHERE and SPL+NAND
does not support environment today.

Cc: Hannes Petermaier <oe5hpm@oevsv.at>
Signed-off-by: Tom Rini <trini@ti.com>
10 years agoTI:armv7: Change CONFIG_SPL_STACK to not be CONFIG_SYS_INIT_SP_ADDR
Tom Rini [Fri, 18 Jul 2014 15:51:32 +0000 (11:51 -0400)]
TI:armv7: Change CONFIG_SPL_STACK to not be CONFIG_SYS_INIT_SP_ADDR

There are times where we may need more than a few kilobytes of stack
space.  We also will not be using CONFIG_SPL_STACK location prior to DDR
being initialized (CONFIG_SYS_INIT_SP_ADDR is still used there) so pick
a good location within DDR for this to be.  Tested on
OMAP4/AM335x/OMAP5/DRA7xx.

Signed-off-by: Tom Rini <trini@ti.com>
10 years agoam335x_evm: Move SPL network defines
Tom Rini [Fri, 18 Jul 2014 15:51:31 +0000 (11:51 -0400)]
am335x_evm: Move SPL network defines

On am335x_evm we only support USBETH for a networking SPL option so move
the rest of the defines under that area as that's the only time we need
(and want) environment support here.

Signed-off-by: Tom Rini <trini@ti.com>
10 years agoMerge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'
Albert ARIBAUD [Sat, 9 Aug 2014 14:48:34 +0000 (16:48 +0200)]
Merge branch 'u-boot-sunxi/master' into 'u-boot-arm/master'

10 years agoPrepare v2014.10-rc1 v2014.10-rc1
Tom Rini [Wed, 6 Aug 2014 12:52:10 +0000 (08:52 -0400)]
Prepare v2014.10-rc1

Signed-off-by: Tom Rini <trini@ti.com>
10 years agoChange Andy Fleming's email address
Andy Fleming [Fri, 25 Jul 2014 22:39:08 +0000 (17:39 -0500)]
Change Andy Fleming's email address

Messages to afleming@freescale.com now bounce, and should be
directed to my personal address at afleming@gmail.com

Signed-off-by: Andy Fleming <afleming@gmail.com>
10 years agoThe _config target is not present anymore, mention _defconfig instead
Holger Freyther [Mon, 4 Aug 2014 07:26:05 +0000 (09:26 +0200)]
The _config target is not present anymore, mention _defconfig instead

The _config part is gone for sure, the _defconfig target could at least
work. I have not verified this for all targets though.

10 years agogit-mailrc: add a kconfig alias
Stephen Warren [Thu, 31 Jul 2014 23:30:03 +0000 (17:30 -0600)]
git-mailrc: add a kconfig alias

It's easier to Cc Masahiro on Kconfig-related changes with a git-mailrc
alias.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agodoc: README.SPL: adjust for Kbuild and Kconfig
Masahiro Yamada [Tue, 5 Aug 2014 06:25:06 +0000 (15:25 +0900)]
doc: README.SPL: adjust for Kbuild and Kconfig

Reflect the latest build system to doc/README.SPL.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agodoc: delete README.ARM-SoC
Masahiro Yamada [Tue, 5 Aug 2014 06:25:32 +0000 (15:25 +0900)]
doc: delete README.ARM-SoC

This document is too old and useless.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-spi
Tom Rini [Tue, 5 Aug 2014 21:16:16 +0000 (17:16 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-spi

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Mon, 4 Aug 2014 17:35:50 +0000 (13:35 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

10 years agospi, spi_mxc: do not hang in spi_xchg_single
Heiko Schocher [Mon, 14 Jul 2014 08:22:11 +0000 (10:22 +0200)]
spi, spi_mxc: do not hang in spi_xchg_single

if status register do never set MXC_CSPICTRL_TC, spi_xchg_single
endless loops. Add a timeout here to prevent endless hang.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Dirk Behme <dirk.behme@gmail.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agospi: Support half-duplex mode in FDT decode
Simon Glass [Mon, 7 Jul 2014 16:16:39 +0000 (10:16 -0600)]
spi: Support half-duplex mode in FDT decode

This parameter should also be supported.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agoexynos: spi: Fix calculation of SPI transaction start time
Simon Glass [Mon, 7 Jul 2014 16:16:38 +0000 (10:16 -0600)]
exynos: spi: Fix calculation of SPI transaction start time

The SPI transaction delay is supposed to be measured from the end of one
transaction to the start of the next. The code does not work that way, so
fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agocros_ec: Fix two bugs in the SPI implementation
Simon Glass [Mon, 7 Jul 2014 16:16:37 +0000 (10:16 -0600)]
cros_ec: Fix two bugs in the SPI implementation

An incorrect message version is passed to the EC in some cases and the
parameters of one function are switched.

Fix these problems.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agosf: sf_ops: Stop leaking memory
Marek Vasut [Sat, 12 Jul 2014 12:41:31 +0000 (18:11 +0530)]
sf: sf_ops: Stop leaking memory

It's usually a common pattern to free() the memory that we allocated.
Implement this here to stop leaking memory.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
10 years agoMerge http://git.denx.de/u-boot-dm
Tom Rini [Mon, 4 Aug 2014 14:16:27 +0000 (10:16 -0400)]
Merge http://git.denx.de/u-boot-dm

10 years agoarm: Support pre-relocation malloc()
Simon Glass [Fri, 11 Jul 2014 04:23:29 +0000 (22:23 -0600)]
arm: Support pre-relocation malloc()

Add support for re-relocation malloc() in arm's start-up code.

Signed-off-by: Simon Glass <sjg@chromium.org>
10 years agoarm: Set up global data before board_init_f()
Simon Glass [Fri, 11 Jul 2014 04:23:26 +0000 (22:23 -0600)]
arm: Set up global data before board_init_f()

At present arm defines CONFIG_SYS_GENERIC_GLOBAL_DATA, meaning that
the global_data pointer is set up in board_init_f(). However it is
actually set up before this, it just isn't zeroed.

If we zero the global data before calling board_init_f() then we
don't need to define CONFIG_SYS_GENERIC_GLOBAL_DATA.

Make this change (on arm32 only) to simplify the init process. I
don't have the ability to test aarch64 yet.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Tom Rini <trini@ti.com>
10 years agokmp204x: prepare to use CPU watchdog
Boschung, Rainer [Tue, 3 Jun 2014 07:05:20 +0000 (09:05 +0200)]
kmp204x: prepare to use CPU watchdog

This patch configures the qrio to trigger a core reset on
a CPU reset request.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x/qrio: support for setting the CPU reset request mode
Boschung, Rainer [Tue, 3 Jun 2014 07:05:19 +0000 (09:05 +0200)]
kmp204x/qrio: support for setting the CPU reset request mode

To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN
flag in the qrio RESCNF reg is added.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: set CPU watchdog reset reason flag
Boschung, Rainer [Tue, 3 Jun 2014 07:05:18 +0000 (09:05 +0200)]
kmp204x: set CPU watchdog reset reason flag

Check the core timer status register (TSR) for watchdog reset,
and and set the QRIO's reset reason flag REASON1[0] accordingly.

This allows the appliction SW to identify the cpu watchdog as a
reset reason, by setting the REASON1[0] flag in the QRIO.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x/qrio: prepare support for the CPU watchdog reset reason
Boschung, Rainer [Tue, 3 Jun 2014 07:05:17 +0000 (09:05 +0200)]
kmp204x/qrio: prepare support for the CPU watchdog reset reason

To achieve this, the qrio_cpuwd_flag() function that sets the CPU watchdog
flag in the REASON1 reg is added.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agokmp204x: CPU watchdog enabled
Boschung, Rainer [Tue, 3 Jun 2014 07:05:16 +0000 (09:05 +0200)]
kmp204x: CPU watchdog enabled

The booting of the board is now protected by the CPU watchdog.
A failure during the boot phase will end up in board reset.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc: mpc85xx watchdog init added to init_func
Boschung, Rainer [Tue, 3 Jun 2014 07:05:15 +0000 (09:05 +0200)]
powerpc: mpc85xx watchdog init added to init_func

When CONFIG_WATCHDOG is defined the board initialization just performs
a WATCHDOG_RESET, an initialization of the watchdog is not done.
This has been modified fot the MPC85xx, the board initialization calls
its watchdog initialitzation allowing for full watchdog configuration
very early in the boot phase.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agompc85xx: watchdog initialisation added
Boschung, Rainer [Tue, 3 Jun 2014 07:05:14 +0000 (09:05 +0200)]
mpc85xx: watchdog initialisation added

Function to inititialize the cpu watchdog added.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
[York Sun: Add prototype in watchdog.h]
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agopowerpc: macros for e500mc timer regs added
Boschung, Rainer [Tue, 3 Jun 2014 07:05:13 +0000 (09:05 +0200)]
powerpc: macros for e500mc timer regs added

For e500mc cores the watchdog timer period has to be set by means of a
6bit value, that defines the bit of the timebase counter used to signal
a watchdog timer exception on its 0 to 1 transition.
The macro used to set the watchdog period TCR_WP, was redefined for e500mc
to support 6 WP setting.

The parameter (x) given to the macro specifies the prescaling factor of
the time base clock (fTB):

watchdog_period = 1/fTB * 2^x

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agompc85xx: fix interrupt init to not affect watchdog
Boschung, Rainer [Tue, 3 Jun 2014 07:05:12 +0000 (09:05 +0200)]
mpc85xx: fix interrupt init to not affect watchdog

TCR watchdog bit are overwritten when dec interrupt is enabled.
This has been fixed with this patch.

Signed-off-by: Rainer Boschung <rainer.boschung@keymile.com>
Reviewed-by: York Sun <yorksun@freescale.com>
10 years agoenv_mmc: support env partition setup in runtime
Dmitry Lifshitz [Wed, 30 Jul 2014 10:19:06 +0000 (13:19 +0300)]
env_mmc: support env partition setup in runtime

Add callback with __weak annotation to allow setup of environment
partition number in runtime from a board file.

Propagate mmc_switch_part() return value into init_mmc_for_env() instead
of -1 in case of failure.

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agoenv_mmc: add mmc_get_env_addr() prototype
Dmitry Lifshitz [Wed, 30 Jul 2014 10:19:05 +0000 (13:19 +0300)]
env_mmc: add mmc_get_env_addr() prototype

Add missing mmc_get_env_addr() prototype in environment.h

Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agoMMC: atmel_mci: enable high speed mode support
Bo Shen [Thu, 31 Jul 2014 06:39:32 +0000 (14:39 +0800)]
MMC: atmel_mci: enable high speed mode support

If the MCI IP version >= 0x300, it supports hight speed mode
option, this patch enable it.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agoMMC: atmel_mci: add configuration register definition
Bo Shen [Thu, 31 Jul 2014 06:39:31 +0000 (14:39 +0800)]
MMC: atmel_mci: add configuration register definition

Add configuration register definition, this register only
exists on MCI IP version >= 0x300.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agoMMC: atmel_mci: refactor setting the mode register
Bo Shen [Thu, 31 Jul 2014 06:39:30 +0000 (14:39 +0800)]
MMC: atmel_mci: refactor setting the mode register

The mode register is different between MCI IP version.
So, according to MCI IP version to set the mode register.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agommc/dw_mmc: Fix clock divider calculation error for bypass mode
Chin Liang See [Tue, 10 Jun 2014 06:26:52 +0000 (01:26 -0500)]
mmc/dw_mmc: Fix clock divider calculation error for bypass mode

To fix the clock divider calculation error when the controller
clock same as the operating frequency. This is known as bypass
mode. In this mode, the divider should be 0.

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
10 years agommc: s3c: Add SD driver
Marek Vasut [Tue, 22 Jul 2014 00:34:52 +0000 (02:34 +0200)]
mmc: s3c: Add SD driver

Implement SD driver for the S3C24xx family. This implementation
is currently only capable of using the PIO transfers, DMA is not
supported.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agoarm: s3c: Unify the S3C24xx SDI structure
Marek Vasut [Tue, 22 Jul 2014 00:34:51 +0000 (02:34 +0200)]
arm: s3c: Unify the S3C24xx SDI structure

Unify the register structure so they can be easily used across all
of S3C24xx lineup.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agobcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag
Lubomir Rintel [Tue, 10 Jun 2014 18:46:43 +0000 (20:46 +0200)]
bcm2835_sdhci: Add SDHCI_QUIRK_NO_HISPD_BIT flag

Seems like the controller doesn't support the flag. None of the hi-speed cards
I've tried could be read, while they successfully worked with the quirk enabled.

Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
10 years agoARM: kirkwood: add mvsdio driver
DrEagle [Fri, 25 Jul 2014 19:07:30 +0000 (21:07 +0200)]
ARM: kirkwood: add mvsdio driver

This patch add Marvell kirkwood MVSDIO/MMC driver
and enable it for Sheevaplugs and OpenRD boards.

Signed-off-by: Gerald Kerma <drEagle@doukki.net>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
10 years agosun7i: Add bananapi board
Hans de Goede [Tue, 29 Jul 2014 16:29:27 +0000 (18:29 +0200)]
sun7i: Add bananapi board

The Banana Pi is an A20 based development board using Raspberry Pi compatible
IO headers. It comes with 1 GB RAM, 1 Gb ethernet, 2x USB host, sata, hdmi
and stereo audio out + various expansion headers:

http://www.lemaker.org/

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agosunxi: HYP/non-sec: configure CNTFRQ on all CPUs
Marc Zyngier [Fri, 18 Jul 2014 20:06:39 +0000 (21:06 +0100)]
sunxi: HYP/non-sec: configure CNTFRQ on all CPUs

CNTFRQ needs to be properly configured on all CPUs. Otherwise,
virtual machines hoping to find valuable information on secondary
CPUs will be disapointed...

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agosunxi: HYP/non-sec: add sun7i PSCI backend
Marc Zyngier [Fri, 18 Jul 2014 20:06:38 +0000 (21:06 +0100)]
sunxi: HYP/non-sec: add sun7i PSCI backend

So far, only supporting the CPU_ON method.
Other functions can be added later.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agosun7i: Add support for a number of new sun7i boards
Hans de Goede [Sun, 27 Jul 2014 20:29:38 +0000 (22:29 +0200)]
sun7i: Add support for a number of new sun7i boards

Add support for boards which I own and which already have a dts file in the
upstream kernel.

Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agosun5i: Add support for a number of new sun5i boards
Hans de Goede [Sun, 27 Jul 2014 15:55:43 +0000 (17:55 +0200)]
sun5i: Add support for a number of new sun5i boards

Add support for boards which I own and which already have a dts file in the
upstream kernel.

Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agosun4i: Add support for a number of new sun4i boards
Hans de Goede [Sat, 26 Jul 2014 14:51:08 +0000 (16:51 +0200)]
sun4i: Add support for a number of new sun4i boards

Add support for boards which I own and which already have a dts file in the
upstream kernel.

Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agosunxi: Add CONFIG_MACPWR option
Hans de Goede [Sat, 26 Jul 2014 15:09:13 +0000 (17:09 +0200)]
sunxi: Add CONFIG_MACPWR option

On some boards the ethernet-phy needs to be powered up through a gpio,
add support for this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agosunxi: Enable EHCI on various sunxi boards
Hans de Goede [Sat, 26 Jul 2014 17:31:24 +0000 (19:31 +0200)]
sunxi: Enable EHCI on various sunxi boards

Most sunxi boards have the EHCI controller hooked up, enable it on all
relevant boards.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agosun5i: add USB EHCI settings
Hans de Goede [Sat, 26 Jul 2014 17:13:47 +0000 (19:13 +0200)]
sun5i: add USB EHCI settings

Specific USB EHCI settings to be set for sun5i if CONFIG_USB_EHCI is enabled.

Note we don't specify default VBUS gpio pins for sun5i since they vary too
much from board to board.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agosun4i: add USB EHCI settings
Hans de Goede [Sat, 26 Jul 2014 17:08:11 +0000 (19:08 +0200)]
sun4i: add USB EHCI settings

Specific USB EHCI settings to be set for sun4i if CONFIG_USB_EHCI is enabled.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agocubieboard2: Enable AXP209 power controller
Ian Campbell [Sun, 27 Jul 2014 20:49:47 +0000 (22:49 +0200)]
cubieboard2: Enable AXP209 power controller

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agosun7i: cubietruck: enable USB EHCI
Roman Byshko [Thu, 24 Jul 2014 20:54:24 +0000 (22:54 +0200)]
sun7i: cubietruck: enable USB EHCI

Cubietruck has two USB host controllers. This makes them
usable by enabling the EHCI driver for them.

Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Also enable ehci for Cubietruck_FEL]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agosun7i: add USB EHCI settings
Roman Byshko [Thu, 24 Jul 2014 20:54:23 +0000 (22:54 +0200)]
sun7i: add USB EHCI settings

Specific USB EHCI settings to be set for sun7i if
CONFIG_USB_EHCI is enabled.

Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
[hdegoede@redhat.com: Use SUNXI_GPH macro for SUNXI_USB_VBUS#_GPIO]
[hdegoede@redhat.com: Add #ifndef SUNXI_USB_VBUS#_GPIO to allow override of
 the default pins from boards.cfg]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agosunxi: add general USB settings
Roman Byshko [Thu, 24 Jul 2014 20:54:22 +0000 (22:54 +0200)]
sunxi: add general USB settings

General configuration settings to be set if CONFIG_USB_EHCI
is enabled for an Allwinner aka sunxi SoC.

Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agosunxi: add USB EHCI driver
Roman Byshko [Sun, 27 Jul 2014 17:32:44 +0000 (19:32 +0200)]
sunxi: add USB EHCI driver

The Allwinner aka sunxi SoCs have one or more USB host controllers.
This adds a driver for their EHCI.

Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agosunxi: add defines to control USB Host clocks/resets
Roman Byshko [Thu, 24 Jul 2014 20:54:20 +0000 (22:54 +0200)]
sunxi: add defines to control USB Host clocks/resets

The commit adds three defines which will be used in
the EHCI driver to enable USB clock and assert
reset controllers of the corresponding PHYs.

Signed-off-by: Roman Byshko <rbyshko@gmail.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agoahci: provide sunxi SATA driver using AHCI platform framework
Ian Campbell [Fri, 18 Jul 2014 19:38:41 +0000 (20:38 +0100)]
ahci: provide sunxi SATA driver using AHCI platform framework

This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.

The PHY setup is derived from the Alwinner releases and Linux, but is mostly
undocumented.

The Allwinner AHCI controller also requires some magic (and, again,
undocumented) DMA initialisation when starting a port.  This is added under a
suitable ifdef.

This option is enabled for Cubieboard, Cubieboard2 and Cubietruck based on
contents of Linux DTS files, including SATA power pin config taken from the
DTS. All build tested, but runtime tested on Cubieboard2 and Cubietruck only.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
10 years agoinclude: remove CONFIG_SPL/CONFIG_TPL definition in config headers
Masahiro Yamada [Wed, 30 Jul 2014 05:08:25 +0000 (14:08 +0900)]
include: remove CONFIG_SPL/CONFIG_TPL definition in config headers

Now CONFIG_SPL and CONFIG_TPL are defined in Kconfig.

Remove the redundant definition in config headers.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 years agopowerpc: remove redundant CPU definition
Masahiro Yamada [Wed, 30 Jul 2014 05:08:24 +0000 (14:08 +0900)]
powerpc: remove redundant CPU definition

CONFIG_${CPU} is defined by Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefan Roese <sr@denx.de>
10 years agokconfig: delete redundant CONFIG_${ARCH} definition
Masahiro Yamada [Wed, 30 Jul 2014 05:08:23 +0000 (14:08 +0900)]
kconfig: delete redundant CONFIG_${ARCH} definition

CONFIG_${ARCH} is defined by Kconfig.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 years agobuildman: adjust for Kconfig
Masahiro Yamada [Wed, 30 Jul 2014 05:08:22 +0000 (14:08 +0900)]
buildman: adjust for Kconfig

Use "make <board>_defconfig" instead of "make <board>_config".

Invoke tools/genboardscfg.py to generate boards.cfg when it is missing.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agoMAKEALL: adjust for Kconfig
Masahiro Yamada [Wed, 30 Jul 2014 05:08:21 +0000 (14:08 +0900)]
MAKEALL: adjust for Kconfig

 - Use "make <board>_defconfig" instead of "make <board>_config".

 - Invoke tools/genboardscfg.py to generate boards.cfg when it is
   missing.

 - Show "Building ${BOARD_NAME} board..." message.
   (Prior to Kconfig, instead, mkconfig script displayed
   "Configuring for ${BOARD_NAME} board..." but it was removed.)
   Without this message, we cannot know which board is currently
   being built.

 - Do not show "# configuration written to .config".
   This message is useless and just annoying for MAKEALL.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: remove mkconfig and boards.cfg
Masahiro Yamada [Wed, 30 Jul 2014 05:08:20 +0000 (14:08 +0900)]
kconfig: remove mkconfig and boards.cfg

The old configuration script is no longer necessary.
Nor is boards.cfg a primary database.
We can generate it with the genboardscfg.py tool
based on the latest Kconfig, defconfig and MAINTAINERS.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agotools: add genboardscfg.py
Masahiro Yamada [Wed, 30 Jul 2014 05:08:19 +0000 (14:08 +0900)]
tools: add genboardscfg.py

Now the primary data for each board is in Kconfig, defconfig and
MAINTAINERS.

It is true boards.cfg is needed for MAKEALL and buildman and might be
useful to brouse all the supported boards in a single database.
But it would be painful to maintain the boards.cfg in sync.

So, this is the solution.
Add a tool to generate the equivalent boards.cfg file based on
the latest Kconfig, defconfig and MAINTAINERS.

We can keep all the functions of MAKEALL and buildman with it.

The best thing would be to change MAKEALL and buildman for not
depending on boards.cfg in the future, but it would take some time.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agoAdd board MAINTAINERS files
Masahiro Yamada [Wed, 30 Jul 2014 05:08:18 +0000 (14:08 +0900)]
Add board MAINTAINERS files

We have switched to Kconfig and the boards.cfg file is going to
be removed. We have to retrieve the board status and maintainers
information from it.

The MAINTAINERS format as in Linux Kernel would be nice
because we can crib the scripts/get_maintainer.pl script.

After some discussion, we chose to put a MAINTAINERS file under each
board directory, not the top-level one because we want to collect
relevant information for a board into a single place.

TODO:
Modify get_maintainer.pl to scan multiple MAINTAINERS files.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Suggested-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: switch to Kconfig
Masahiro Yamada [Wed, 30 Jul 2014 05:08:17 +0000 (14:08 +0900)]
kconfig: switch to Kconfig

This commit enables Kconfig.
Going forward, we use Kconfig for the board configuration.
mkconfig will never be used. Nor will include/config.mk be generated.

Kconfig must be adjusted for U-Boot because our situation is
a little more complicated than Linux Kernel.
We have to generate multiple boot images (Normal, SPL, TPL)
from one source tree.
Each image needs its own configuration input.

Usage:

Run "make <board>_defconfig" to do the board configuration.

It will create the .config file and additionally spl/.config, tpl/.config
if SPL, TPL is enabled, respectively.

You can use "make config", "make menuconfig" etc. to create
a new .config or modify the existing one.

Use "make spl/config", "make spl/menuconfig" etc. for spl/.config
and do likewise for tpl/.config file.

The generic syntax of configuration targets for SPL, TPL is:

  <target_image>/<config_command>

Here, <target_image> is either 'spl' or 'tpl'
      <config_command> is 'config', 'menuconfig', 'xconfig', etc.

When the configuration is done, run "make".
(Or "make <board>_defconfig all" will do the configuration and build
in one time.)

For futher information of how Kconfig works in U-Boot,
please read the comment block of scripts/multiconfig.py.

By the way, there is another item worth remarking here:
coexistence of Kconfig and board herder files.

Prior to Kconfig, we used C headers to define a set of configs.

We expect a very long term to migrate from C headers to Kconfig.
Two different infractructure must coexist in the interim.

In our former configuration scheme, include/autoconf.mk was generated
for use in makefiles.
It is still generated under include/, spl/include/, tpl/include/ directory
for the Normal, SPL, TPL image, respectively.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agoinclude: define CONFIG_SPL and CONFIG_TPL as 1
Masahiro Yamada [Wed, 30 Jul 2014 05:08:16 +0000 (14:08 +0900)]
include: define CONFIG_SPL and CONFIG_TPL as 1

We are about to switch to Kconfig in the next commit.
But there are something to get done beforehand.

In Kconfig, include/generated/autoconf.h defines boolean
CONFIG macros as 1.

CONFIG_SPL and CONFIG_TPL, if defined, must be set to 1.
Otherwise, when switching to Kconfig, the build log
would be sprinkled with warning messages like this:
  warning: "CONFIG_SPL" redefined [enabled by default]

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: add basic Kconfig files
Masahiro Yamada [Wed, 30 Jul 2014 05:08:15 +0000 (14:08 +0900)]
kconfig: add basic Kconfig files

This commit adds more Kconfig files, which were written by hand.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: add board Kconfig and defconfig files
Masahiro Yamada [Wed, 30 Jul 2014 05:08:14 +0000 (14:08 +0900)]
kconfig: add board Kconfig and defconfig files

This commit adds:
 - arch/${ARCH}/Kconfig
    provide a menu to select target boards
 - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig
    set CONFIG macros to the appropriate values for each board
 - configs/${TARGET_BOARD}_defconfig
    default setting of each board

(This commit was automatically generated by a conversion script
based on boards.cfg)

In Linux Kernel, defconfig files are located under
arch/${ARCH}/configs/ directory.
It works in Linux Kernel since ARCH is always given from the
command line for cross compile.

But in U-Boot, ARCH is not given from the command line.
Which means we cannot know ARCH until the board configuration is done.
That is why all the "*_defconfig" files should be gathered into a
single directory ./configs/.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agokconfig: import Kconfig files from Linux 3.16-rc7
Masahiro Yamada [Wed, 30 Jul 2014 05:08:13 +0000 (14:08 +0900)]
kconfig: import Kconfig files from Linux 3.16-rc7

Import
  - scripts/kconfig/*
  - include/linux/kconfig.h
from Linux 3.16-rc7.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
10 years agoboards:trats2: New Trats2 board maintainer
Łukasz Majewski [Tue, 29 Jul 2014 16:09:49 +0000 (18:09 +0200)]
boards:trats2: New Trats2 board maintainer

Change-Id: I8e72b942b8816726773d5407ce405d68a1594389
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
10 years agoboards.cfg : Add maintainers entries for SOCFPGA
Dinh Nguyen [Thu, 24 Jul 2014 11:45:24 +0000 (06:45 -0500)]
boards.cfg : Add maintainers entries for SOCFPGA

Add back the maintainers entries for Altera's SOCFPGA platform.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Chin Liang See <clsee@altera.com>
10 years agocosmetic: boards.cfg: fix some maintainers fields
Masahiro Yamada [Tue, 22 Jul 2014 03:58:30 +0000 (12:58 +0900)]
cosmetic: boards.cfg: fix some maintainers fields

Add a whitespace between the name and the email address.

When switching to Kconfig, the first version of MAINTAINERS files
will be generated based on the boards.cfg file.

So, the maintainers field should be corrected even if it is a really
minor fix.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agobuildman: make sure to invoke GNU Make
Masahiro Yamada [Tue, 22 Jul 2014 02:19:09 +0000 (11:19 +0900)]
buildman: make sure to invoke GNU Make

Since the command name 'make' may not be GNU Make on some platforms
such as FreeBSD, buildman should call scripts/show-gnu-make to get
the command name for GNU MAKE (and error out if it is not found).

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Jeroen Hofstee <jeroen@myspectrum.nl>
10 years agoMAKEALL: make sure to invoke GNU Make
Masahiro Yamada [Tue, 22 Jul 2014 02:19:08 +0000 (11:19 +0900)]
MAKEALL: make sure to invoke GNU Make

Since the command name 'make' may not be GNU Make on some platforms
such as FreeBSD, MAKEALL should call scripts/show-gnu-make to get
the command name for GNU MAKE (and error out if it is not found).

The GNU Make should be searched after parsing options because we want
to allow "MAKEALL -h" even if GNU Make is missing on the system.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
10 years agoscripts: add scripts/show-gnu-make to get GNU Make command name
Masahiro Yamada [Tue, 22 Jul 2014 02:19:07 +0000 (11:19 +0900)]
scripts: add scripts/show-gnu-make to get GNU Make command name

U-Boot is expected to be built on various platforms.

We should keep in mind that the command 'make' is not always GNU Make,
while all the makefiles are written for GNU Make.

For example, on Linux, people generally do:

  make <board>_config; make

But FreeBSD folks do

  gmake <board>_config; gmake

(The command 'make' on FreeBSD is BSD Make, not GNU Make)

It is not a good idea to hard-code the command name 'make'
in MAKEALL or buildman.

They should call this helper script and get the command name
for GNU Make.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
10 years agoMerge branch 'master' of git://git.denx.de/u-boot-arm
Tom Rini [Tue, 29 Jul 2014 13:41:35 +0000 (09:41 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-arm

10 years agoMerge git://www.denx.de/git/u-boot-ppc4xx
Tom Rini [Mon, 28 Jul 2014 21:48:48 +0000 (17:48 -0400)]
Merge git://www.denx.de/git/u-boot-ppc4xx

10 years agoMerge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Tom Rini [Mon, 28 Jul 2014 18:54:29 +0000 (14:54 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

10 years agoARM: HYP/non-sec: remove MIDR check to validate CBAR
Marc Zyngier [Sat, 12 Jul 2014 13:24:08 +0000 (14:24 +0100)]
ARM: HYP/non-sec: remove MIDR check to validate CBAR

Having a form of whitelist to check if we know of a CPU core
and and obtain CBAR is a bit silly.

It doesn't scale (how about A12, A17, as well as other I don't know
about?), and is actually a property of the SoC, not the core.

So either it works and everybody is happy, or it doesn't and
the u-boot port to this SoC is providing the real address via
a configuration option.

The result of the above is that this code doesn't need to exist,
is thus forcefully removed.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: HYP/non-sec/PSCI: emit DT nodes
Marc Zyngier [Sat, 12 Jul 2014 13:24:07 +0000 (14:24 +0100)]
ARM: HYP/non-sec/PSCI: emit DT nodes

Generate the PSCI node in the device tree.

Also add a reserve section for the "secure" code that lives in
in normal RAM, so that the kernel knows it'd better not trip on
it.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: convert arch_fixup_memory_node to a generic FDT fixup function
Ma Haijun [Sat, 12 Jul 2014 13:24:06 +0000 (14:24 +0100)]
ARM: convert arch_fixup_memory_node to a generic FDT fixup function

Some architecture needs extra device tree setup. Instead of adding
yet another hook, convert arch_fixup_memory_node to be a generic
FDT fixup function.

[maz: collapsed 3 patches into one, rewrote commit message]

Signed-off-by: Ma Haijun <mahaijuns@gmail.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: HYP/non-sec: add the option for a second-stage monitor
Marc Zyngier [Sat, 12 Jul 2014 13:24:05 +0000 (14:24 +0100)]
ARM: HYP/non-sec: add the option for a second-stage monitor

Allow the switch to a second stage secure monitor just before
switching to non-secure.

This allows a resident piece of firmware to be active once the
kernel has been entered (the u-boot monitor is dead anyway,
its pages being reused).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: HYP/non-sec: add generic ARMv7 PSCI code
Marc Zyngier [Sat, 12 Jul 2014 13:24:04 +0000 (14:24 +0100)]
ARM: HYP/non-sec: add generic ARMv7 PSCI code

Implement core support for PSCI. As this is generic code, it doesn't
implement anything really useful (all the functions are returning
Not Implemented).

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: HYP/non-sec: allow relocation to secure RAM
Marc Zyngier [Sat, 12 Jul 2014 13:24:03 +0000 (14:24 +0100)]
ARM: HYP/non-sec: allow relocation to secure RAM

The current non-sec switching code suffers from one major issue:
it cannot run in secure RAM, as a large part of u-boot still needs
to be run while we're switched to non-secure.

This patch reworks the whole HYP/non-secure strategy by:
- making sure the secure code is the *last* thing u-boot executes
  before entering the payload
- performing an exception return from secure mode directly into
  the payload
- allowing the code to be dynamically relocated to secure RAM
  before switching to non-secure.

This involves quite a bit of horrible code, specially as u-boot
relocation is quite primitive.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: HYP/non-sec: add separate section for secure code
Marc Zyngier [Sat, 12 Jul 2014 13:24:02 +0000 (14:24 +0100)]
ARM: HYP/non-sec: add separate section for secure code

In anticipation of refactoring the HYP/non-secure code to run
from secure RAM, add a new linker section that will contain that
code.

Nothing is using it just yet.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: add missing HYP mode constant
Marc Zyngier [Sat, 12 Jul 2014 13:24:01 +0000 (14:24 +0100)]
ARM: add missing HYP mode constant

In order to be able to use the various mode constants (far more
readable than random hex values), add the missing HYP and A
values.

Also update arm/lib/interrupts.c to display HYP instead of an
unknown value.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: non-sec: reset CNTVOFF to zero
Marc Zyngier [Sat, 12 Jul 2014 13:24:00 +0000 (14:24 +0100)]
ARM: non-sec: reset CNTVOFF to zero

Before switching to non-secure, make sure that CNTVOFF is set
to zero on all CPUs. Otherwise, kernel running in non-secure
without HYP enabled (hence using virtual timers) may observe
timers that are not synchronized, effectively seeing time
going backward...

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: HYP/non-sec: add a barrier after setting SCR.NS==1
Marc Zyngier [Sat, 12 Jul 2014 13:23:59 +0000 (14:23 +0100)]
ARM: HYP/non-sec: add a barrier after setting SCR.NS==1

A CP15 instruction execution can be reordered, requiring an
isb to be sure it is executed in program order.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
10 years agoARM: HYP/non-sec: move switch to non-sec to the last boot phase
Marc Zyngier [Sat, 12 Jul 2014 13:23:58 +0000 (14:23 +0100)]
ARM: HYP/non-sec: move switch to non-sec to the last boot phase

Having the switch to non-secure in the "prep" phase is causing
all kind of troubles, as that stage can be called multiple times.

Instead, move the switch to non-secure to the last possible phase,
when there is no turning back anymore.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>