Tom Rini [Fri, 8 Nov 2019 12:27:45 +0000 (07:27 -0500)]
Merge branch '2019-11-07-master-imports'
- Add Phytium Durian Board
- Assorted bugfixes
- Allow for make ERR_PTR/PTR_ERR architecture specific
Tom Rini [Fri, 8 Nov 2019 12:26:51 +0000 (07:26 -0500)]
Merge branch '2019-11-07-ti-imports'
- LogicPD platform fixes
- Adaptive Voltage Scaling (AVS) support
- Minor bugfixes
AKASHI Takahiro [Fri, 8 Nov 2019 01:32:15 +0000 (10:32 +0900)]
cmd: move down CONFIG_CMD_BOOTEFI after CONFIG_BOOTM_VXWORKS
Due to the commit
4b0bcfa7c4ec ("Kconfig: Migrate CONFIG_BOOTM_* options")
BOOTEFI and BOOTEFI_HELLO_COMPILE (and other BOOTEFI configs) are
displayed in a long distance. This will make it difficult for us to
understand that those configurations are closely related.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Andrew F. Davis [Thu, 7 Nov 2019 13:06:09 +0000 (08:06 -0500)]
configs: j721e_evm_r5_defconfig: Remove SPL multi-DTB FIT support
The SPL FIT will only have one DTB, so remove support for multi-DTB. This
also removes an early access to EEPROM used to select the DTB that is not
valid in SPL at the point at which it is accessed, that always returns
false for GP devices and causes a firewall expection on HS.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Adam Ford [Mon, 4 Nov 2019 23:05:24 +0000 (17:05 -0600)]
Kconfig: ti: Make board detect EEPROM addresses depend BOARD_DETECT
There is an option to enable the board detection for TI platforms.
If this is option is not set, there is no reason to set the EEPROM
bus address or chip address.
This patch makes both EEPROM_BUS_ADDRESS and EEPROM_CHIP_ADDRESS
depend on TI_I2C_BOARD_DETECT.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 3 Nov 2019 23:15:53 +0000 (17:15 -0600)]
configs: omap3_logic_somlv: Remove GPIO from SPL
The SPL is too tight, and it cannot start any longer. To
help reduce the size of SPL, we need to remove some non-critical
features.
This patch removes SPL_GPIO_SUPPORT to free up some operating space.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 3 Nov 2019 23:15:52 +0000 (17:15 -0600)]
ARM: dts: logicpd-som-lv-37xx-devkit-u-boot: Remove unused GPIO
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight.
This patch removes the all but GPIO4 from the spl device tree to
reduce the SPL footprint.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 3 Nov 2019 23:03:02 +0000 (17:03 -0600)]
Revert "ARM: omap3_logic/omap35_logic: Enable GPIO in SPL"
The SPL is too tight, and it cannot start any longer. To
help reduce the size of SPL, we need to remove some non-critical
features.
This reverts commit
66063a7c1388fb724e8671b03c529fb5cda992dd.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 3 Nov 2019 23:03:01 +0000 (17:03 -0600)]
ARM: dts: logicpd-torpedo-37xx-devkit-u-boot: Remove unused GPIO
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight.
This patch removes the all but GPIO4 from the spl device tree to
reduce the SPL footprint.
Signed-off-by: Adam Ford <aford173@gmail.com>
Adam Ford [Sun, 3 Nov 2019 22:18:27 +0000 (16:18 -0600)]
ARM: omap3_logic: Power on MMC when setting up PMIC
The PMIC enables power to the MMC card by default, but depending
on the state it was left when restarted, it's possible the MMC
may be powered down.
This patch patch explicitly tells the twl4030 to power the MMC.
Signed-off-by: Adam Ford <aford173@gmail.com>
Keerthy [Thu, 24 Oct 2019 09:31:03 +0000 (15:01 +0530)]
configs: j721e_evm_r5_defconfig: Enable AVS Class 0 & dependent configs
Enable AVS Class 0 & dependent config options.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tero Kristo [Thu, 24 Oct 2019 09:31:02 +0000 (15:01 +0530)]
configs: am65x_evm_r5_defconfig: Enable AVS class 0 support
Enable AVS class 0 support for the R5 SPL bootloader.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tero Kristo [Thu, 24 Oct 2019 09:31:01 +0000 (15:01 +0530)]
configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support
TPS62363 is used to control the MPU_VDD voltage, so enable the driver
for this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:31:00 +0000 (15:01 +0530)]
arm: dts: k3-j721e-r5-common-proc-board: Hook buck12_reg to vtm supply
Hook buck12_reg to vtm avs supply
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:59 +0000 (15:00 +0530)]
arm: dts: k3-j721e-r5-common: Add tps65941 node and dependent wkup_i2c0 node
Add tps65941 node and dependent wkup_i2c0 node needed for AVS class 0 support
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:58 +0000 (15:00 +0530)]
arm: dts: k3-j721e-r5-common-proc-board: Add VTM node
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tero Kristo [Thu, 24 Oct 2019 09:30:57 +0000 (15:00 +0530)]
arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies
Link the vdd-supplies for the voltage domains under the VTM node. Also,
enable the node under SPL. This will enable the AVS class 0 support on
am65x-evm board.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tero Kristo [Thu, 24 Oct 2019 09:30:56 +0000 (15:00 +0530)]
arm: dts: k3-am654-r5-base-board: add supply rail for MPU
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached
to i2c0 bus. Add device node for this so that it can be controlled via
a regulator driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tero Kristo [Thu, 24 Oct 2019 09:30:55 +0000 (15:00 +0530)]
arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl
Enable wkup_i2c0 as this is needed for voltage control.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:54 +0000 (15:00 +0530)]
arm: dts: k3-am654-r5-base-board: Add VTM node
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:53 +0000 (15:00 +0530)]
arm: mach-k3: j721e_init: Initialize avs class 0
Initialize avs class 0
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:52 +0000 (15:00 +0530)]
arm: mach-k3: am6_init: Initialize AVS class 0
Initialize AVS class 0 so that mpu voltage rail is
programmed to the AVS class 0 compensated value.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:51 +0000 (15:00 +0530)]
power: regulator: tps65941: add regulator support
The driver provides regulator set/get voltage
enable/disable functions for tps65941 family of PMICs.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:50 +0000 (15:00 +0530)]
power: pmic: tps65941: Add support for tps65941 family of PMICs
Add support to bind the regulators/child nodes with the pmic.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:49 +0000 (15:00 +0530)]
misc: k3_avs: Add j721e support
j721e SoCs have different OPP tables. Add support for the same.
Note: DM Still has lot of voltages TBD hence the correct
values need to be programmed once they are published.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tero Kristo [Thu, 24 Oct 2019 09:30:48 +0000 (15:00 +0530)]
power: regulator: tps6236x: add support for tps6236x regulators
TPS6236x is a family of step down DC-DC converters optimized for battery
powered portable applications for a small solution size. Add a regulator
driver for supporting these devices.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Keerthy [Thu, 24 Oct 2019 09:30:47 +0000 (15:00 +0530)]
clk: clk-ti-sci: Notify AVS driver upon setting clock rate
Notify AVS driver upon setting clock rate so that voltage
is changed accordingly.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Tero Kristo [Thu, 24 Oct 2019 09:30:46 +0000 (15:00 +0530)]
misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
liu hao [Thu, 31 Oct 2019 07:51:08 +0000 (07:51 +0000)]
arm: add initial support for the Phytium Durian Board
This adds platform code and the device tree for the Phytium Durian Board.
The initial support comprises the UART and the PCIE.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Steven Hao <liuhao@phytium.com.cn>
Alexander Dahl [Wed, 30 Oct 2019 15:53:55 +0000 (16:53 +0100)]
cmd: mtdparts: Fix build with option ..._SHOW_NET_SIZES
That option is currently not used by any defconfig and could not be set
anymore since it became mandatory to used Kconfig when introducing new
options with U-Boot v2016.11 or commit
eed921d92348 ("Kconfig: Add a
whitelist of ad-hoc CONFIG options") and commit
371244cb19f9 ("Makefile:
Give a build error if ad-hoc CONFIG options are added").
It was also not considered when fixing build warnings in
commit
39ac34473f3c ("cmd_mtdparts: use 64 bits for flash size,
partition size & offset") and could probably not be compiled anyway
after commit
dfe64e2c8973 ("mtd: resync with Linux-3.7.1"), which
renamed some members of struct mtd_info … so it was probably broken
since then, which was U-Boot v2013.07-rc1.
However it still seems to work, see example output below:
U-Boot
2019.10-00035-g06a9b259ca-dirty (Oct 30 2019 - 14:03:44 +0100)
CPU: SAMA5D27 1G bits DDR2 SDRAM
Crystal frequency: 24 MHz
CPU clock : 492 MHz
Master clock : 164 MHz
Model: ***
DRAM: 128 MiB
NAND: 256 MiB
Loading Environment from NAND... OK
In: serial@
f8020000
Out: serial@
f8020000
Err: serial@
f8020000
Net: eth0: ethernet@
f8008000
Hit keys 'tt' to stop autoboot (3 seconds).
U-Boot> mtdparts
device nand0 <atmel_nand>, # parts = 8
#: name size net size offset mask_flags
0: bootstrap 0x00040000 0x00040000 0x00000000 1
1: uboot 0x000c0000 0x000c0000 0x00040000 1
2: env1 0x00040000 0x00040000 0x00100000 0
3: env2 0x00040000 0x00040000 0x00140000 0
4: fpga_led 0x00040000 0x00040000 0x00180000 1
5: reserved 0x00040000 0x00040000 0x001c0000 1
6: rootfs_rec 0x03200000 0x03200000 0x00200000 1
7: filesystem 0x0cc00000 0x0cb80000 (!) 0x03400000 0
active partition: nand0,0 - (bootstrap) 0x00040000 @ 0x00000000
defaults:
mtdids : nand0=atmel_nand
mtdparts: mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env1),256k(env2),256k(fpga_led)ro,256k(reserved)ro,50M(rootfs_rec)ro,-(filesystem)
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Alexander Dahl [Wed, 30 Oct 2019 15:53:54 +0000 (16:53 +0100)]
cmd: nand: Remove not used declaration
This declaration is not used anywhere in the whole tree. There is a
function 'mtd_id_parse()' which was renamed from 'id_parse()' in
commit
68d7d65100e8 ("Separate mtdparts command from jffs2"), but that
function is not used (anymore?) in cmd nand and build is fine without
that declaration, so it's probably just safe to remove.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Lokesh Vutla [Wed, 30 Oct 2019 10:25:41 +0000 (15:55 +0530)]
arm: caches: Disable mmu only if mmu is available
As part of disabling caches MMU as well gets disabled. But MMU is not
available on all armv7 cores like R5F. So disable MMU only if it is
available.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Heinrich Schuchardt [Sat, 26 Oct 2019 21:45:08 +0000 (23:45 +0200)]
hush: re-sequence includes
'make tests' on a 32bit ARM system leads to
In file included from ../common/cli_hush.c:79:
../include/malloc.h:364:7: error: conflicting types for ‘memset’
void* memset(void*, int, size_t);
^~~~~~
In file included from ../include/compiler.h:126,
from ../include/env.h:12,
from ../common/cli_hush.c:78:
../include/linux/string.h:103:15:
note: previous declaration of ‘memset’ was here
extern void * memset(void *,int,__kernel_size_t);
^~~~~~
In file included from ../common/cli_hush.c:79:
../include/malloc.h:365:7: error: conflicting types for ‘memcpy’
void* memcpy(void*, const void*, size_t);
^~~~~~
In file included from ../include/compiler.h:126,
from ../include/env.h:12,
from ../common/cli_hush.c:78:
../include/linux/string.h:106:15:
note: previous declaration of ‘memcpy’ was here
extern void * memcpy(void *,const void *,__kernel_size_t);
^~~~~~
According to the U-Boot coding style guide common.h should be the first
include.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Simon Goldschmidt [Fri, 25 Oct 2019 19:23:35 +0000 (21:23 +0200)]
dlmalloc: calloc: fix zeroing early allocations
When full malloc is enabled and SYS_MALLOC_F is also enabled, the simple
pre-reloc heap is used before relocation. In this case, calloc() uses
the MALLOC_ZERO macro to zero out the allocated memory. However, since
this macro is specially crafted for the dlmalloc implementation, it
does not always work for simple malloc.
For example, when allocating 16 bytes via simple malloc, only the first
12 bytes get zeroed out. The last 4 bytes will remain untouched.
This is a problem for DM drivers that are allocated before relocation:
memory allocated via 'platdata_auto_alloc_size' might not be set to
zero, resulting in bogus behaviour.
To fix this, use 'memset' instead of 'MALLOC_ZERO' to zero out memory
that compes from simple malloc.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Goldschmidt [Fri, 25 Oct 2019 14:22:09 +0000 (16:22 +0200)]
spl: fix SPI config dependencies
As SPL_SPI_FLASH_SUPPORT cannot work without SPL_SPI_SUPPORT, fix
dependencies to prevent enabling SPI flash support without basic SPI
support.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Simon Goldschmidt [Tue, 22 Oct 2019 19:29:48 +0000 (21:29 +0200)]
arm: socfpga: gen5: fix ERR_PTR_OFFSET
The default implementation of ERR_PTR/PTR_ERR maps errno values at the
and of the address range (e.g. -EINVAL/-22 gets 0xFFFFFFEA).
For socfpga gen5 SPL, this doesn't really work, as the heap is nearly
at the end of the 32 bit address range.
This patch adjusts the ERR_PTR_OFFSET to map errno values into the range
of the Boot ROM, which should not be used for valid pointers.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Tue, 22 Oct 2019 19:29:47 +0000 (21:29 +0200)]
linux err: make ERR_PTR/PTR_ERR architecture specific
This patch changes ERR_PTR/PTR_ERR to use CONFIG_ERR_PTR_OFFSET to map
errno values into a pointer region that cannot contain valid pointers.
IS_ERR and IS_ERR_OR_NULL have to be converted to use PTR_ERR, too,
for this to work.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Simon Goldschmidt [Tue, 22 Oct 2019 19:29:46 +0000 (21:29 +0200)]
Kconfig add config ERR_PTR_OFFSET
Some U-Boot pointers have redundant information, so we can use a scheme
where we can return either an error code or a pointer with the same
return value. The default implementation just casts the pointer to a
number, however, this may fail on platforms where the end of the address
range is used for valid pointers (e.g. 0xffffff00 is a valid heap pointer
in socfpga SPL). For such platforms, this value provides an upper range
of those error pointer values - up to 'MAX_ERRNO' bytes below this value
must be unused/invalid addresses.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Vignesh Raghavendra [Sat, 12 Oct 2019 10:59:34 +0000 (16:29 +0530)]
arm64: Add memcpy_{from, to}io() and memset_io() helpers
Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.
Code is borrowed from Linux Kernel v5.4.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Cristian Ciocaltea [Sat, 12 Jan 2019 00:03:15 +0000 (02:03 +0200)]
api: storage: Add the missing write operation support
API_dev_write(va_list ap) is currently lacking the write support
to storage devices because, historically, those devices did not
implement block_write()
The solution has been tested by loading and booting a (patched)
GRUB instance in a QEMU vexpress-a9 environment. The disk write
operations were triggered with GRUB's save_env command.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Tom Rini [Thu, 7 Nov 2019 19:25:00 +0000 (14:25 -0500)]
configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 7 Nov 2019 12:25:14 +0000 (07:25 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx
- mpc85xx, socrates: Add dts, enable DM support, fix warnings, disable
video
Tom Rini [Thu, 7 Nov 2019 03:54:47 +0000 (22:54 -0500)]
Merge branch '2019-11-06-reenable-llvm-in-ci'
- Re-enable LLVM tests in Travis and add them to GitLab and Azure
Tom Rini [Thu, 7 Nov 2019 00:30:47 +0000 (19:30 -0500)]
gitlab/azure: Enable LLVM tests
Now that we have again fixed the problems that building with clang
exposes, enable these tests on Azure and GitLab-CI as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Sat, 26 Oct 2019 17:48:41 +0000 (13:48 -0400)]
travis: Fix the clang-7 test
When using the OVERRIDE variable we need to pass -O to buildman as well
to use the "override" option to buildman.
Fixed:
e9500f49ea35 ("travis: Use buildman for building with clang")
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 30 Oct 2019 13:18:43 +0000 (09:18 -0400)]
common/console.c: Fix unused warning with console_doenv()
Newer versions of LLVM-7 will provide an unused function warning over
console_doenv() in the case of SYS_CONSOLE_IS_IN_ENV not being enabled
as can be the case in SPL. Add guards around this function.
Signed-off-by: Tom Rini <trini@konsulko.com>
Heiko Schocher [Fri, 25 Oct 2019 12:46:54 +0000 (14:46 +0200)]
Makefile: fix dependency for imx targets
imx targets are defined in arch/arm/mach-imx/Makefile.
Some of them are dependent on targets defined in main
Makefile. For the Makefile in arch/arm/mach-imx this
targets must be finished before the imx targets are
build, if not you get for example the error:
make -f /home/hs/abb/mainlining/u-boot/scripts/Makefile.build obj=arch/arm/mach-imx u-boot-dtb.imx
make[2]: *** No rule to make target 'u-boot-fit-dtb.bin', needed by 'u-boot-dtb.imx'. Stop.
make[1]: *** [/home/hs/abb/mainlining/u-boot/Makefile:1123: u-boot-dtb.imx] Error 2
make[1]: *** Waiting for unfinished jobs....
make[1]: Leaving directory '/work/hs/compile/u-boot/aristainetos2_defconfig'
make: *** [Makefile:148: sub-make] Error 2
compile failed
In above case of CONFIG_MULTI_DTB_FIT is defined, the
u-boot-dtb.imx is dependent on the u-boot-fit-dtb.bin
which may is not build yet ...
I could reproduce this error on a travis build also if
I build an out-of-tree build on a local machine with a
build directory on a "slow" slow storage device. If
building the same source target with a build dir on a
fast storage device, the build works.
I found no solution to tell the arch/arm/mach-imx/Makefile
to find the targets in main Makefile, if there is a way
this would be the better fix.
I solved it by adding a IMX_DEPS var, which holds a list
of main u-boot targets, which must be finished, before
calling imx targets and fixed the build for imx
targets which enabled CONFIG_MULTI_DTB_FIT.
I think it is just luck, that imx targets with
CONFIG_OF_SEPARATE enabled build, because the
u-boot-dtb.imx target depends on u-boot-dtb.bin
which gets build early enough before starting with
u-boot-dtb.imx. May this targets should be fixed too.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 6 Nov 2019 12:11:02 +0000 (07:11 -0500)]
Merge branch 'master' of git://git.denx.de/u-boot-usb
- DFU updates
- USB Storage updates
Tom Rini [Wed, 6 Nov 2019 12:10:16 +0000 (07:10 -0500)]
Merge tag 'mmc-2019-11-5' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- fsl_esdhc driver cleanup
- fsl_esdhc_imx driver improvement and compatible string update
Heiko Schocher [Wed, 16 Oct 2019 03:55:54 +0000 (05:55 +0200)]
mpc85xx, socrates: add DM PCI support
add DM PCI support on the socrates board.
use PCIE_FSL now.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Wed, 16 Oct 2019 03:55:53 +0000 (05:55 +0200)]
mpc85xx, socrates: enable DM serial
switch to DM_SERIAL support.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Wed, 16 Oct 2019 03:55:52 +0000 (05:55 +0200)]
mpc85xx, socrates: enable DM I2C
enable DM I2C support for the socrates board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Wed, 16 Oct 2019 03:55:51 +0000 (05:55 +0200)]
mpc85xx, socrates: disable VIDEO
disable video, as not really needed longer.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Wed, 16 Oct 2019 03:55:50 +0000 (05:55 +0200)]
mpc85xx, socrates: get rid of DM_USB warning
add some defines and get rid of USB warning.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Wed, 16 Oct 2019 03:55:49 +0000 (05:55 +0200)]
mpc85xx, socrates: add DM support
enable CONFIG_DM for the socrates board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Wed, 16 Oct 2019 03:55:48 +0000 (05:55 +0200)]
mpc85xx, dts, socrates: add u-boot specific dtsi
add u-boot specific dtsi file for socrates board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Wed, 16 Oct 2019 03:55:47 +0000 (05:55 +0200)]
mpc85xx: add socrates dts from linux
add socrates device tree from linux:
commit
71ae5fc87c34 ("Merge tag 'linux-kselftest-5.2-rc1' of
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest")
and added SPDX license identifier.
Did not fix checkpatch warnings:
arch/powerpc/dts/socrates.dts:235: check: Please don't use multiple blank lines
arch/powerpc/dts/socrates.dts:238: error: code indent should use tabs where possible
Also, add me as board maintainer.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Wed, 16 Oct 2019 03:55:46 +0000 (05:55 +0200)]
mpc85xx, socrates: suppress unknown flash warning
suppress warning:
Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Heiko Schocher [Mon, 14 Oct 2019 09:29:39 +0000 (11:29 +0200)]
pci: add DM based mpc85xx driver
add DM based PCI Configuration space access support for
MPC85xx PCI Bridge. This driver is based on
arch/powerpc/cpu/mpc85xx/pci.c
In the old driver there is a fix for a hw issue on the
TARGET_MPC8555CDS and TARGET_MPC8541CDS boards. As I
have no such hardware I did not port this part.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Tom Rini [Tue, 5 Nov 2019 15:44:16 +0000 (10:44 -0500)]
travis: Rework how we write the ~/.buildman file
With python3 we're now tripping over a long-standing problem with how we
add to the buildman file with some toolchains. We cannot have multiple
toolchain-alias sections as that leads to a parse error.
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 5 Nov 2019 12:59:28 +0000 (07:59 -0500)]
Merge tag 'fdt-pull-5nov19' of git://git.denx.de/u-boot-fdt
Update to latest libfdt and pylibfdt, with added size control
Update binman, dtoc, patman, buildman to Python 3
Update move_config, rkmux, microcode_tool to Python 3
Peng Fan [Mon, 4 Nov 2019 09:31:17 +0000 (17:31 +0800)]
mmc: fsl_esdhc_imx: Update compatible string for imx8m
To enable HS400(ES) and UHS for imx8m platforms, update the driver data
to share with imx8qm esdhc_soc_data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Mon, 4 Nov 2019 09:14:15 +0000 (17:14 +0800)]
mmc: fsl_esdhc_imx: drop redundant clock settings
During mmc initialization, there are several calls to mmc_set_clock
and mmc_set_ios. When mmc_power_off, the mmc->clock will be set,
but the imx driver will use 400KHz. So the following calls
to mmc_set_ios will set the clock several times which is redundant
in fsl_esdhc_imx driver. So let's simplify to remove redundant
clock settings.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Yangbo Lu [Thu, 31 Oct 2019 10:54:26 +0000 (18:54 +0800)]
mmc: fsl_esdhc: clean up DM and non-DM code
Make DM and non-DM code clear using below structure.
#if !CONFIG_IS_ENABLED(DM_MMC)
<non-DM_MMC code>
#else
<DM_MMC code>
#endif
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 31 Oct 2019 10:54:25 +0000 (18:54 +0800)]
mmc: fsl_esdhc: always check write protect state
The QorIQ eSDHC on all platforms supports checking write protect
state through register bit. So check it always.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 31 Oct 2019 10:54:24 +0000 (18:54 +0800)]
mmc: fsl_esdhc: drop redundant code for non-removable feature
Drop redundant code for non-removable feature. "non-removable" property
has been read in mmc_of_parse().
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 31 Oct 2019 10:54:23 +0000 (18:54 +0800)]
mmc: fsl_esdhc: convert to use fsl_esdhc_get_cfg_common()
The fsl_esdhc_init() was actually to get configuration of mmc_config.
So rename it to fsl_esdhc_get_cfg_common() and make it common for both
DM_MMC and non-DM_MMC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 31 Oct 2019 10:54:22 +0000 (18:54 +0800)]
mmc: fsl_esdhc: clean up bus width configuration code
This patch is to clean up bus width setting code.
- For DM_MMC, remove getting "bus-width" from device tree.
This has been done in mmc_of_parse().
- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
to fsl_esdhc_initialize() which is non-DM_MMC specific.
And fix up bus width configuration to support only 1-bit, 4-bit,
or 8-bit. Keep using 8-bit if it's not set because many platforms
use driver without providing max bus width.
- Remove bus_width member from fsl_esdhc_priv structure.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 31 Oct 2019 10:54:21 +0000 (18:54 +0800)]
mmc: fsl_esdhc: fix voltage validation
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Yangbo Lu [Thu, 31 Oct 2019 10:54:20 +0000 (18:54 +0800)]
mmc: fsl_esdhc: drop controller initialization in fsl_esdhc_init()
Controller initialization is not needed in fsl_esdhc_init().
It will be done in esdhc_init() for non-DM_MMC, and in
esdhc_init_common() in probe for DM_MMC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Simon Glass [Thu, 31 Oct 2019 13:43:05 +0000 (07:43 -0600)]
binman: Move to use Python 3
Update this tool to use Python 3 to meet the 2020 deadline.
Unfortunately this introduces a test failure due to a problem in pylibfdt
on Python 3. I will investigate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:43:04 +0000 (07:43 -0600)]
dtoc: Convert fdt.py to Python 3
Drop the now-unused Python 2 code to keep code coverage at 100%.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:43:03 +0000 (07:43 -0600)]
binman: Convert a few tests to Python 3
Some tests have crept in with Python 2 strings and constructs. Convert
then.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:43:02 +0000 (07:43 -0600)]
binman: Remember the pre-reset entry size
When preparing to possible expand or contract an entry we reset the size
to the original value from the binman device-tree definition, which is
often None.
This causes binman to forget the original size of the entry. Remember this
so that it can be used when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:43:01 +0000 (07:43 -0600)]
pylibfdt: Correct the type for fdt_property_stub()
This function should use a void * type, not char *. This causes an error:
TypeError: in method 'fdt_property_stub', argument 3 of type 'char const *'
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:43:00 +0000 (07:43 -0600)]
pylibfdt: Sync up with upstream
Sync up the libfdt Python bindings with upstream, commit:
430419c (tests: fix some python warnings)
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:59 +0000 (07:42 -0600)]
pylibfdt: Convert to Python 3
Build this swig module with Python 3.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:58 +0000 (07:42 -0600)]
rkmux: Convert to Python 3
Convert this tool to Python 3 and make it use that, to meet the 2020
deadline.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:57 +0000 (07:42 -0600)]
move_config: Convert to Python 3
Convert this tool to Python 3 and make it use that, to meet the 2020
deadline.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:56 +0000 (07:42 -0600)]
microcode_tool: Convert to Python 3
Convert this tool to Python 3 and make it use that, to meet the 2020
deadline.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:55 +0000 (07:42 -0600)]
test_dtoc: Move to use Python 3
Update this test to use Python 3 to meet the 2020 deadline.
Also make it executable while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:54 +0000 (07:42 -0600)]
test_fdt: Move to use Python 3
Update this test to use Python 3 to meet the 2020 deadline.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:53 +0000 (07:42 -0600)]
buildman: Convert to Python 3
Convert buildman to Python 3 and make it use that, to meet the 2020
deadline.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:52 +0000 (07:42 -0600)]
patman: Move to use Python 3
Update this tool to use Python 3 to meet the 2020 deadline.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:51 +0000 (07:42 -0600)]
patman: Use unicode for file I/O
At present patman test fail in some environments which don't use utf-8
as the default file encoding. Add this explicitly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Thu, 31 Oct 2019 13:42:50 +0000 (07:42 -0600)]
patman: Adjust 'command' to return strings instead of bytes
At present all the 'command' methods return bytes. Most of the time we
actually want strings, so change this. We still need to keep the internal
representation as bytes since otherwise unicode strings might break over
a read() boundary (e.g. 4KB), causing errors. But we can convert the end
result to strings.
Add a 'binary' parameter to cover the few cases where bytes are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 27 Oct 2019 15:47:42 +0000 (09:47 -0600)]
fdt: Sync up to the latest libfdt
Bring over the fdt from this commit:
430419c (origin/master) tests: fix some python warnings
adding in the 'assumptions' series designed to reduce code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 27 Oct 2019 15:47:41 +0000 (09:47 -0600)]
mx6: tbs2910: Minimise libfdt code size
This board appears to be very near its size limit and cannot accept the
new checking code in libfdt. Disable this code so this the board can
continue to build.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 27 Oct 2019 15:47:40 +0000 (09:47 -0600)]
fdt: Add Kconfig options to control code size
For better or worse libfdt recent grew a lot of code that checks the
validity of the device tree in great detail. When using unsigned or
unverified data this makes things safer, but it does add to code size.
Add some controls to select the trade-off between safety and code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Simon Glass [Sun, 27 Oct 2019 15:47:39 +0000 (09:47 -0600)]
fdt: Add INT32_MAX to kernel.h for libfdt
Unfortunately libfdt needs this value now, which is present in the
stdint.h header. That file is just a placeholder in U-Boot and these sorts
of constants appear in the linux/kernel.h header instead.
To keep libfdt happy, add INT32_MAX too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 4 Nov 2019 17:57:41 +0000 (12:57 -0500)]
Merge tag 'u-boot-imx-
20191104' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
u-boot-imx-
20191104
-------------------
- i.MX NAND: nandbcb support for MX6UL / i.MX7
- i.MX8: support for HAB
- Convert to DM (opos6ul, mccmon6)
- Toradex i.MX6ull colibri
- sync DTS with kernel
Travis : https://travis-ci.org/sbabic/u-boot-imx/builds/
606853416
Tom Rini [Mon, 4 Nov 2019 17:57:34 +0000 (12:57 -0500)]
Merge branch '2019-11-04-ti-imports'
- Various CPSW related improvements, DTS resync
Grygorii Strashko [Thu, 19 Sep 2019 08:16:42 +0000 (11:16 +0300)]
net: ti: cpsw: convert to use dev/ofnode api
Conver TI CPSW driver to use dev/ofnode api.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
[trini: Add <dm/ofnode.h> to provide the prototype to ofnode]
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Mon, 4 Nov 2019 00:28:54 +0000 (19:28 -0500)]
Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Add support for Intel FSP-S and FSP-T in binman
- Correct priority selection for image loaders for SPL
- Add a size check for TPL
- Various small SPL/TPL bug fixes and changes
- SPI: Add support for memory-mapped flash
Tom Rini [Sat, 2 Nov 2019 18:43:06 +0000 (14:43 -0400)]
tbs2910: Disable Plan9/RTEMS bootm support
We have once again reached a point where this board does not build in
some cases with supported toolchains due to reaching a size constraint.
To regain some space, disable support for Plan 9 / RTEMS images with the
bootm command.
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:46 +0000 (16:49 +0100)]
imx: nandbcb: add support for writing BCB only
Add subcommand for add writing BCB only, where we provide appropriate
offsets for firmware1 and firmware2 and size.
Example of usage:
> nandbcb bcbonly 0x00180000 0x00080000 0x00200000
Writing 1024 bytes to 0x0: randomizing
OK
Writing 1024 bytes to 0x20000: randomizing
OK
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:45 +0000 (16:49 +0100)]
imx: nandbcb: refactor update function
Move code for writing FCB/DBBT pages to a separate function
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:44 +0000 (16:49 +0100)]
imx: nandbcb: add support for i.MX7
Add support for updating FCB/DBBT on i.MX7:
- additional new fields in FCB structure
- Leverage hardware BCH/randomizer for writing FCB
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:43 +0000 (16:49 +0100)]
nand: mxs_nand: add API for switching different BCH layouts
On i.MX7 in a sake of reducing the disturbances caused by a neighboring
cells in the FCB page in the NAND chip, a randomizer is enabled when
reading the FCB page by ROM bootloader.
Add API for setting BCH to specific layout (and restoring it back) used by
ROM bootloader to be able to burn it in a proper way to NAND using
nandbcb command.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Anti Sullin <anti.sullin@artecdesign.ee>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Igor Opaniuk [Sun, 3 Nov 2019 15:49:42 +0000 (16:49 +0100)]
imx: gpmi: add defines for hw randominizer
Extend GPMI Integrated ECC Control Register Description, include
additional defines for enabling randomizer function and providing
proper randomizer type.
For additional details check i.MX7 APR, section
9.6.6.3 GPMI Integrated ECC Control Register Description
(GPMI_ECCCTRLn)
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>