Michal Simek [Tue, 17 May 2016 11:58:44 +0000 (13:58 +0200)]
mkimage: Report information about fpga
Add FIT_FPGA_PROP that user can identify an optional
entry for fpga.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Tue, 17 May 2016 12:32:00 +0000 (14:32 +0200)]
fpga: Fix typo in function comment
Trivial patch.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 17 May 2016 11:33:11 +0000 (13:33 +0200)]
ARM64: zynqmp: Enable CLK framework
ZynqMP is using fixed clocks now that's why enabling it to be available
for drivers.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 20 Nov 2015 12:17:22 +0000 (13:17 +0100)]
ARM64: zynqmp: Add SPL support support
Support RAM and MMC boot mode in SPL also with SPL_FIT images.
In MMC boot mode two boot options are available:
1) Boot flow with ATF(EL3) and full U-Boot(EL2):
aarch64-linux-gnu-objcopy -O binary bl31.elf bl31.bin
mkimage -A arm64 -O linux -T kernel -C none -a 0xfffe5000 -e 0xfffe5000
-d bl31.bin atf.ub
cp spl/boot.bin <sdcard fat partition>
cp atf.ub <sdcard fat partition>
cp u-boot.bin <sdcard fat partition>
2) Boot flow with full U-Boot(EL3):
cp spl/boot.bin <sdcard>
cp u-boot*.img <sdcard>
3) emmc boot mode
dd if=/dev/zero of=sd.img bs=1024 count=1024
parted sd.img mktable msdos
parted sd.img mkpart p fat32 0% 100%
kpartx -a sd.img
mkfs.vfat /dev/mapper/loop0p1
mount /dev/mapper/loop0p1 /mnt/
cp spl/boot.bin /mnt
cp u-boot.img /mnt
cp u-boot.bin /mnt
cp atf.ub /mnt
umount /dev/mapper/loop0p1
kpartx -d sd.img
cp sd.img /tftpboot/
and program it via u-boot
tftpb 10000 sd.img
mmcinfo
mmc write 10000 0 $filesize
mmc rescan
mmc part
ls mmc 0
psu_init() function contains low level SoC setup generated for every HW
design by Xilinx design tools. xil_io.h is only supporting file to fix
all dependencies from tools. The same solution was used on Xilinx Zynq.
The patch also change CONFIG_SYS_INIT_SP_ADDR to the end of OCM which
stays at the same location all the time.
Bootrom expects starting address to be at 0xfffc0000 that's why this
address is SPL_TEXT_BASE.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 22 Feb 2016 08:57:27 +0000 (09:57 +0100)]
ARM64: zynqmp: Add missing u-boot,dm-pre-reloc to DTSI
Add missing u-boot,dm-pre-reloc to get IPs initialized.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Alexander Graf [Thu, 12 May 2016 11:44:01 +0000 (13:44 +0200)]
ARM64: zynqmp: Align gic ranges for 64k in device tree
The GIC ranges in the zynqmp device tree are only 4kb aligned. Since
commit
12e14066f we automatically deal with aliases GIC regions though,
so we can map them transparently into guests even on 64kb page size
systems.
This patch makes use of that features and sets GICC and GICV to 64kb
aligned and sized regions.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Wed, 27 Apr 2016 12:03:29 +0000 (14:03 +0200)]
tools: zynqmpimage: Add Xilinx ZynqMP boot header generation
Add support for the zynqmpimage to mkimage.
Only basic functionality is supported without encryption and register
initialization with one partition which is filled by U-Boot SPL.
For more detail information look at Xilinx ZynqMP TRM.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Thu, 28 Apr 2016 07:54:16 +0000 (09:54 +0200)]
SPL: FIT: Enable SPL_FIT_LOAD in RAM based boot mode
Support loading FIT in SPL for RAM bootmode.
CONFIG_SPL_LOAD_FIT_ADRESS points to address where FIT image is stored
in memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Michal Simek [Tue, 10 May 2016 05:55:52 +0000 (07:55 +0200)]
ARM: zynq: Call ps7_post_config() for SPL
If ps7_post_config() is defined call it. It is enabling for example
level shifters for PL bitstreams.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 10 May 2016 07:50:35 +0000 (09:50 +0200)]
ARM64: zynqmp: Enable option to overwrite default variables
Enable overwriting variables out of main config file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 10 May 2016 05:54:20 +0000 (07:54 +0200)]
spl: Introduce new function spl_board_prepare_for_boot
Call this function before passing control from SPL.
For fpga case it is necessary to enable for example level shifters
when bitstream is programmed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Michal Simek [Wed, 4 May 2016 10:33:22 +0000 (12:33 +0200)]
ARM64: zynqmp: Add debug uart for zc1751-dc1
It is helpful for debugging.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Thu, 17 Mar 2016 22:02:37 +0000 (23:02 +0100)]
ARM64: zynqmp: Enable SPI_FLASH and FLASH_BAR for ep108
Add missing SPI flash options.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 29 Apr 2016 11:04:02 +0000 (13:04 +0200)]
ARM64: zynqmp: Remove CONFIG_PREBOOT
CONFIG_PREBOOT variable is breaking ./test/py framework.
Remove it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 3 May 2016 12:20:17 +0000 (14:20 +0200)]
ARM: zynq: Add support for SPL_LOAD_FIT
Enable minimal function to be able to compile SPL_LOAD_FIT.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 22 Apr 2016 06:50:45 +0000 (08:50 +0200)]
ARM64: zynqmp: Wire up debug_uart setup
It has to be enabled by debug_uart_init().
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 26 Apr 2016 14:03:42 +0000 (16:03 +0200)]
ARM64: zynqmp: Enable eMMC boot partitions commands
Enable some additional features of the eMMC boot partitions.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 22 Apr 2016 09:48:49 +0000 (11:48 +0200)]
ARM64: zynqmp: Add support for reading MAC from eeprom
Add support for on board eeprom with programmed MAC for using in u-boot
to have uniq address for every board.
Most of the time uniq MAC address is on a label on the board.
If address is not programmed use these command to program it.
On zcu102:
ZynqMP> mm.b 0
00000000: 00 ? 00
00000001: a0 ? 0a
00000002: 35 ? 35
00000003: 02 ? 02
00000004: 00 ? ef
00000005: 00 ? 67
00000006: 00 ? q
i2c dev 5
i2c write 0 54 20 6
i2c md 54 20
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 22 Apr 2016 12:28:17 +0000 (14:28 +0200)]
ARM64: zynqmp: Enable missing distro default options
Enable all options which distros requires.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 22 Apr 2016 11:04:42 +0000 (13:04 +0200)]
ARM64: zynqmp: Enable HUSH parser for all zynqmp targets
Enable HUSH for all zynqmp boards which don't have it.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Mon, 25 Apr 2016 03:14:43 +0000 (12:14 +0900)]
ARM: dts: zynq: describe SLCR as simple-mfd rather than simple-bus
Commit
9f56917ab88a ("dm: core: make simple-bus compatible to
simple-mfd") made possible to import the following commit:
Linux commit:
bc5ba9b98435bf76d92e0954da1784695aa449f1
The SLCR (System-Level Control Registers) block is an MFD (Multi
Function Device) rather than a bus.
"simple-mfd" seems a more suitable compatible string than "simple-bus".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 4 Mar 2016 14:56:50 +0000 (15:56 +0100)]
gpio: zynq: Add support for reading gpio pin state
Add zynq_gpio_get_function() which return status on gpio pin.
This function enables gpio status command.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Masahiro Yamada [Wed, 13 Apr 2016 21:52:26 +0000 (06:52 +0900)]
ARM: zynq: load u-boot.img whether CONFIG_OF_SEPARATE is defined or not
Since commit
ad1ecd2063da ("fdt: Build a U-Boot binary without device
tree"), u-boot-dtb.img is identical to u-boot.img, so SPL can always
load u-boot.img whether CONFIG_OF_SEPARATE is defined or not.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tom Rini [Sat, 21 May 2016 00:43:27 +0000 (20:43 -0400)]
Merge branch 'master' of git://git.denx.de/u-boot-mips
Masahiro Yamada [Fri, 20 May 2016 03:13:10 +0000 (12:13 +0900)]
ARM: fix ifdef in ARMv8 lowlevel_init() again
Commit
116611937faa ("ARM: fix ifdefs in ARMv8 lowlevel_init()")
accidentally inverted the logic of CONFIG_ARMV8_MULTIENTRY.
Fixes:
116611937faa ("ARM: fix ifdefs in ARMv8 lowlevel_init()")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tom Rini [Mon, 23 May 2016 15:51:13 +0000 (11:51 -0400)]
SPL: fat: Fix spl_parse_image_header() return value handling
The spl_parse_image_header() can return 0 and it is not an error.
Only treat non-zero return value as an error.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <van.freenix@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Martin Hejnfelt [Thu, 19 May 2016 07:11:58 +0000 (09:11 +0200)]
omap3: Fix SPI registers on am33xx and am43xx
When the base registers are read from device tree the base is not
0x48030100 as the driver expects, but 0x48030000, resulting in
non functioning SPI. To deal with this, use same idea as how this
is done in the linux kernel (drivers/spi/spi-omap2-mcspi.c) and
add a structure with a field that is used to shift the registers
on these systems.
v2: Fixed commit subject line to correct cpu
Signed-off-by: Martin Hejnfelt <mh@newtec.dk>
Tom Rini [Fri, 13 May 2016 14:54:04 +0000 (10:54 -0400)]
kbuild: fixdep: Check fstat(2) return value
Coverity has recently added a check that will find when we don't check
the return code from fstat(2). Copy/paste the checking logic that
print_deps() has with an appropriate re-wording of the perror() message.
[ Linux commit :
46fe94ad18aa7ce6b3dad8c035fb538942020f2b ]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Marek <mmarek@suse.com>
Michal Simek [Wed, 4 May 2016 13:14:11 +0000 (15:14 +0200)]
spl: Setup default value for OF_LIST
OF_LIST can't remain empty that's why setup it up to default DTB.
If it is empty u-boot.img is created without FDT partition:
For example:
./tools/mkimage -f auto -A arm -T firmware -C none -O u-boot -a
0x8000000 -e 0 -n "U-Boot 2016.05-rc3 ..." -E -b -d u-boot-nodtb.bin u-boot.img
Can't set 'timestamp' property for '' node (FDT_ERR_NOSPACE)
FIT description: Firmware image with one or more FDT blobs
Created: Wed May 4 15:02:52 2016
Image 0 (firmware@1)
Description: U-Boot
2016.05-rc3-00080-gff2e12ae22a8-dirty for zynqmp
board
Created: Wed May 4 15:02:52 2016
Type: Firmware
Compression: uncompressed
Data Size: unavailable
Architecture: ARM
Load Address: 0x08000000
Default Configuration: 'conf@1'
Configuration 0 (conf@1)
Description: unavailable
Kernel: unavailable
And then image like this doesn't contain description and link to FDT and
can't boot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Michal Simek [Wed, 4 May 2016 13:08:00 +0000 (15:08 +0200)]
spl: fit: Print error message when FDT is not present
When FDT is not present in the image user doesn't get any error what's
wrong. Print error message if LIBCOMMON_SUPPORT is enabled.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Seris-cc: uboot
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:55:38 +0000 (13:55 -0600)]
mkimage: Add a quiet mode
Some build systems want to be quiet unless there is a problem. At present
mkimage displays quite a bit of information when generating a FIT file. Add
a '-q' flag to silence this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simon Glass [Sun, 1 May 2016 19:55:37 +0000 (13:55 -0600)]
image-fit: Don't display an error in fit_set_timestamp()
This function returns an error code and its caller may be able to fix the
error. For example fit_handle_file() expands the device tree to fit if there
is a lack of space.
In this case the caller does not want an error displayed. It is confusing,
since it suggests that something is wrong, when it fact everything is fine.
Drop the error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Stephen Warren [Mon, 25 Apr 2016 21:55:42 +0000 (15:55 -0600)]
malloc: improve memalign fragmentation fix
Commit
4f144a416469 "malloc: work around some memalign fragmentation
issues" enhanced memalign() so that it can succeed in more cases where
heap fragmentation is present. However, it did not solve as many cases
as it could. This patch enhances the code to cover more cases.
The alignment code works by allocating more space than the user requests,
then adjusting the returned pointer to achieve alignment. In general, one
must allocate "alignment" bytes more than the user requested in order to
guarantee that alignment is possible. This is what the original code does.
The previous enhancement attempted a second allocation if the padded
allocation failed, and succeeded if that allocation just happened to be
aligned; a fluke that happened often in practice. There are still cases
where this could fail, yet where it is still possible to honor the user's
allocation request. In particular, if the heap contains a free region that
is large enough for the user's request, and for leading padding to ensure
alignment, but has no or little space for any trailing padding. In this
case, we can make a third(!) allocation attempt after calculating exactly
the size of the leading padding required to achieve alignment, which is
the minimal over-allocation needed for the overall memalign() operation to
succeed if the third and second allocations end up at the same location.
This patch isn't checkpatch-clean, since it conforms to the existing
coding style in dlmalloc.c, which is different to the rest of U-Boot.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Fabio Estevam [Tue, 17 May 2016 13:51:44 +0000 (10:51 -0300)]
pico-imx6ul: Select CONFIG_HUSH_PARSER option
Select CONFIG_HUSH_PARSER option in order to fix the following
problem:
Unknown command 'if' - try 'help'
Unknown command 'then' - try 'help'
Unknown command 'else' - try 'help'
Unknown command 'fi' - try 'help'
Reported-by: Daiane Angolini <daiane.angolini@nxp.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Daiane Angolini <daiane.angolini@nxp.com>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:13 +0000 (17:55 +0300)]
eeprom: merge cmdline parsing of eeprom commands
Merge the parsing of layout aware and layout unaware eeprom commands into
one parsing function. With this change, layout aware commands now follow
the eeprom read and eeprom write conventions of making i2c bus and i2c address
parameters optional.
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:12 +0000 (17:55 +0300)]
eeprom: use eeprom_execute_command for all eeprom functions
Update eeprom_execute_command() and related code to accommodate both layout
aware and layout unaware functions.
No functional changes.
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
[trini: Make eeprom_execute_command have ulong for i2c_addr]
Signed-off-by: Tom Rini <trini@konsulko.com>
Paul Burton [Mon, 16 May 2016 09:52:14 +0000 (10:52 +0100)]
malta: Support MIPS32r6 configurations
Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6
CPUs. Allow building U-Boot for such systems by selecting
CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 16 May 2016 09:52:13 +0000 (10:52 +0100)]
malta: Remove ".set mips32" directive
We always build for a mips32 or higher ISA, so this ".set mips32"
directive is redundant. Once MIPSr6 support is added it will become
harmful since some instruction encodings change & this directive will
cause the older encodings to be incorrectly emitted instead of the
appropriate ones for the build.
In preparation for supporting MIPSr6, remove this redundant directive.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 16 May 2016 09:52:12 +0000 (10:52 +0100)]
MIPS: Support for targetting MIPSr6
Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way
that we currently select release 1 or release 2 targets. MIPSr6 is not
entirely backwards compatible with earlier releases of the architecture.
Some instructions are encoded differently, some are removed, some are
reused, so it is not practical to run U-Boot built for earlier revisions
on a MIPSr6 system. Update their Kconfig help text to reflect that.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 16 May 2016 09:52:11 +0000 (10:52 +0100)]
MIPS: Simplify CONFIG_SYS_CPU values
Rather than having the values for CONFIG_SYS_CPU depend upon each
architecture revision, have them depend upon the more general
CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the
architecture revisions.
This is done in preparation for adding MIPSr6 support, which would
otherwise need to introduce new cases here.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Paul Burton [Mon, 16 May 2016 09:52:10 +0000 (10:52 +0100)]
MIPS: Use unchecked immediate addition/subtraction
In MIPS assembly there have historically been 2 variants of immediate
addition - the standard "addi" which traps if an overflow occurs, and
the unchecked "addiu" which does not trap on overflow. In release 6 of
the MIPS architecture the trapping variants of immediate addition &
subtraction have been removed. In preparation for supporting MIPSr6,
stop using the trapping instructions from assembly & switch to their
unchecked variants.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Marek Vasut [Fri, 6 May 2016 18:10:41 +0000 (20:10 +0200)]
mips: ath79: Add support for TPLink WDR4300
Add support for the TPLink WDR4300 router, which is based on the
AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported
on this system as well.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:40 +0000 (20:10 +0200)]
mips: ath79: Add AR934x support
Add support for the Atheros AR934x WiSoCs. This patchs adds complete
system init, including PLL and DRAM init, both of which happen from
full C environment, since the AR934x has proper SRAM.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:39 +0000 (20:10 +0200)]
mips: ath79: Add support for ungating ethernet on ar933x and ar934x
Add code to ungate the ethernet controller on ar933x and ar934x .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:38 +0000 (20:10 +0200)]
mips: ath79: dts: Add ethernet MAC nodes for ar933x
Add node for both ethernet controllers in the ar933x.
The PHY is attached only to the first ethernet controller.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:37 +0000 (20:10 +0200)]
mips: ath79: Add support for ungating USB on ar933x and ar934x
Add code to ungate the USB controller on ar933x and ar934x .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:36 +0000 (20:10 +0200)]
mips: ath79: dts: Add generic-ehci node
Add generic EHCI node for the ChipIdea EHCI controller in the ath79.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:35 +0000 (20:10 +0200)]
mips: ath79: Fix compiler warning on const assignment
The assignment const T var; var = value; is illegal, since var is
constant. Drop the const to fix the compiler warning.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:34 +0000 (20:10 +0200)]
mips: ath79: Fix ar71xx_regs.h indent
The indent in this file triggers my OCD, so fix it. Replace multiple
spaces with tabs and align the values in one column.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
Marek Vasut [Fri, 6 May 2016 18:10:33 +0000 (20:10 +0200)]
mips: Add MIPS 74Kc tune
Add MIPS 74Kc tune Kconfig option.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Wills Wang <wills.wang@live.com>
[added missing tune-y entry in arch/mips/Makefile]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Marek Vasut [Thu, 5 May 2016 18:14:00 +0000 (20:14 +0200)]
mips: Fix compiler warning in cpu.c
There really is zero reason for including netdev.h in generic mips CPU code.
Removing the netdev.h from cpu.c also fixes the following compiler warning:
In file included from arch/mips/cpu/cpu.c:10:0:
include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default]
int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int));
^
include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default]
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wills Wang [Tue, 12 Apr 2016 10:24:10 +0000 (18:24 +0800)]
ath79: add readonly attribute for ath79_soc_desc
use 'const' keywork to qualify readonly attribute for lookup-table member
Signed-off-by: Wills Wang <wills.wang@live.com>
Wills Wang [Tue, 12 Apr 2016 03:09:20 +0000 (11:09 +0800)]
ath79: ar933x: use BIT macro for bit shift operation
used a uniform BIT macro for register bit-field shift
Signed-off-by: Wills Wang <wills.wang@live.com>
Wills Wang [Tue, 12 Apr 2016 03:09:19 +0000 (11:09 +0800)]
ar933x: serial: Remove the explicit pinctrl setting
The correct pinctrl is handled automatically so we don't need to do it in
the driver.
Signed-off-by: Wills Wang <wills.wang@live.com>
Wills Wang [Tue, 12 Apr 2016 03:09:18 +0000 (11:09 +0800)]
ath79: spi: Remove the explicit pinctrl setting
The correct pinctrl is handled automatically so we don't need to do it in
the driver.
Signed-off-by: Wills Wang <wills.wang@live.com>
Tim Chick [Thu, 31 Mar 2016 11:51:20 +0000 (12:51 +0100)]
mips: Report reloc information in bdinfo
Signed-off-by: Tim Chick <tim.chick@mediatek.com>
Purna Chandra Mandal [Fri, 18 Mar 2016 13:06:08 +0000 (18:36 +0530)]
drivers: mtd: add Microchip PIC32 internal non-CFI flash driver.
PIC32 internal flash devices are parallel NOR flash divided into
number of banks to allow erase-programming in one while fetch and
execution continues on other. As the flash banks are memory mapped
stored code can be executed directly from flash (XIP), also there
is additional hardware logic to prefetch and cache contents to
improve execution performance. These flash can also be used to
store user data (like environment).
Flash erase and programming are handled by on-chip NVM controller.
Driver implemented driver model but MTD is not really support.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Purna Chandra Mandal [Fri, 18 Mar 2016 13:06:07 +0000 (18:36 +0530)]
flash: add device ID for Microchip PIC32 internal flash.
Microchip PIC32 has internal parallel flash (non-CFI compliant).
These flash devices do not support any identifier command so no
standard IDs. Added unique IDs to seperate these flash devices
from others supported by U-Boot.
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Wills Wang [Wed, 16 Mar 2016 09:00:00 +0000 (17:00 +0800)]
mips: ath79: add AP143 reference board
This patch add board-level code and base DT for AP143.
Signed-off-by: Wills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wills Wang [Wed, 16 Mar 2016 08:59:59 +0000 (16:59 +0800)]
mips: ath79: add AP121 reference board
This patch add board-level code and base DT for AP121.
Signed-off-by: Wills Wang <wills.wang@live.com>
[updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wills Wang [Wed, 16 Mar 2016 08:59:58 +0000 (16:59 +0800)]
drivers: spi: add spi support for QCA/Atheros ath79 SOCs
This patch add a compatible spi driver for ath79 series SOC.
Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wills Wang [Wed, 16 Mar 2016 08:59:57 +0000 (16:59 +0800)]
drivers: serial: add serial driver for ar933x SOC
This patch add support for ar933x serial.
Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Wills Wang [Wed, 16 Mar 2016 08:59:56 +0000 (16:59 +0800)]
drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros qca953x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wills Wang [Wed, 16 Mar 2016 08:59:55 +0000 (16:59 +0800)]
drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.
This is a simple pinctrl driver, it just support uart and spi pin-mux now.
Signed-off-by: Wills Wang <wills.wang@live.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[fixed typo in commit subject line]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Wills Wang [Wed, 16 Mar 2016 08:59:54 +0000 (16:59 +0800)]
mips: ath79: add support for QCA953x SOCs
This patch enable work for qca953x SOC.
Signed-off-by: Wills Wang <wills.wang@live.com>
Wills Wang [Wed, 16 Mar 2016 08:59:53 +0000 (16:59 +0800)]
mips: ath79: add support for AR933x SOCs
This patch enable work for ar933x SOC.
Signed-off-by: Wills Wang <wills.wang@live.com>
Wills Wang [Wed, 16 Mar 2016 08:59:52 +0000 (16:59 +0800)]
mips: add base support for QCA/Atheros ath79 SOCs
This patch add some common code for QCA/Atheros ath79 SOCs such as
DDR tuning, chip reset and CPU detection.
Signed-off-by: Wills Wang <wills.wang@live.com>
Stanislav Galabov [Wed, 17 Feb 2016 13:23:33 +0000 (15:23 +0200)]
Add support for 64-bit MIPS to examples/standalone
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
Stanislav Galabov [Wed, 17 Feb 2016 13:23:31 +0000 (15:23 +0200)]
Fix FreeBSD loader API so that it works on both 32-bit and 64-bit targets.
Specifically tested on MIPS under QEMU (works with all combination of bit-ness and endian-ness)
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
Stanislav Galabov [Wed, 17 Feb 2016 13:23:30 +0000 (15:23 +0200)]
Use CONFIG_IDE_SWAP_IO when running on big-endian MIPS (32 or 64-bit) in QEMU so that IDE transfers work properly
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
Stanislav Galabov [Wed, 17 Feb 2016 13:23:29 +0000 (15:23 +0200)]
Properly calculate ATA_SECTORWORDS, using a fixed-size integer, so it works for both 32-bit and 64-bit targets
Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:11 +0000 (17:55 +0300)]
eeprom: refactor i2c bus and devaddr parsing
Introduce parse_i2c_bus_addr() to generalize the parsing of i2c bus number and
i2c device address. This is done in preparation for merging layout aware and
layout unaware command parsing into one function.
No functional changes.
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:10 +0000 (17:55 +0300)]
arm: cm-t43: add support for eeprom layout comands
Add support for EEPROM and EEPROM layout commands for CM-T43.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:09 +0000 (17:55 +0300)]
arm: cm-t35: add support for eeprom layout comands
Add support for EEPROM and EEPROM layout commands for CM-T35.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:08 +0000 (17:55 +0300)]
arm: cm-t3517: add support for eeprom layout comands
Add support for EEPROM and EEPROM layout commands for CM-T3517.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:07 +0000 (17:55 +0300)]
arm: cm-t54: add support for eeprom layout comands
Add support for EEPROM and EEPROM layout commands for CM-T54.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:06 +0000 (17:55 +0300)]
arm: cm-t335: add support for eeprom layout comands
Add support for EEPROM and EEPROM layout commands for CM-T335.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:05 +0000 (17:55 +0300)]
arm: cm-fx6: add support for eeprom layout comands
Add support for EEPROM and EEPROM layout commands for CM-FX6.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:04 +0000 (17:55 +0300)]
compulab: add support for layout aware eeprom commands
Add layout definitions and implement functions for field printing/updating,
layout detection, layout assignment, and layout parsing.
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:03 +0000 (17:55 +0300)]
cmd: eeprom: add support for layout aware commands
Introduce the (optional) eeprom print and eeprom update commands.
These commands are eeprom layout aware:
* The eeprom print command prints the contents of the eeprom in a human
readable way (eeprom layout fields, and data formatted to be fit for human
consumption).
* The eeprom update command allows user to update eeprom fields by specifying
the field name, and providing the new data in a human readable format (same
format as displayed by the eeprom print command).
* Both commands can either auto detect the layout, or be told which layout to
use.
New CONFIG options:
CONFIG_CMD_EEPROM_LAYOUT - enables commands.
CONFIG_EEPROM_LAYOUT_HELP_STRING - tells user what layout names are supported
Feature API:
__weak int parse_layout_version(char *str)
- override to provide your own layout name parsing
__weak void __eeprom_layout_assign(struct eeprom_layout *layout, int layout_version);
- override to setup the layout metadata based on the version
__weak int eeprom_layout_detect(unsigned char *data)
- override to provide your own algorithm for detecting layout version
eeprom_field.c
- contains various printing and updating functions for common types of
eeprom fields. Can be used for defining custom layouts.
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Nikita Kiryanov [Sat, 16 Apr 2016 14:55:02 +0000 (17:55 +0300)]
cmd: eeprom: add bus switching support for all i2c drivers
The i2c_init function is always provided when CONFIG_SYS_I2C is
defined. No need to limit ourselves to just one supported I2C driver
(soft_i2c). Update the #ifdef conditions to support bus switching for
all I2C drivers.
Cc: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Stefan Roese [Wed, 13 Apr 2016 09:02:20 +0000 (11:02 +0200)]
arm: mvebu: theadorable: Enable CONFIG_ZERO_BOOTDELAY_CHECK
Enable bootdelay 0 check so that booting can be interrupted even with
bootdelay configured to 0.
Signed-off-by: Stefan Roese <sr@denx.de>
Marek Vasut [Sat, 30 Apr 2016 12:45:42 +0000 (14:45 +0200)]
arm: mvebu: a38x: Weed out floating point use
For reason unknown, recently, the DDR init code writers are really fond
of hiding some small floating point operating deep in their creations.
This patch removes one from the Marvell A38x code.
Instead of returning size of chip as float from ddr3_get_device_size()
in GiB units, return it as int in MiB units. Since this would interfere
with the huge switch code in ddr3_calc_mem_cs_size(), rework the code
to match the change.
Before this patch, the cs_mem_size variable could have these values:
( { 16, 32 } x { 8, 16 } x { 0.01, 0.5, 1, 2, 4, 8 } ) / 8 =
{ 0.000000, 0.001250, 0.002500, 0.005000, 0.062500, 0.125000,
0.250000, 0.500000, 1.000000, 2.000000, 4.000000, }
The switch code checked for a subset of the resulting RAM sizes, which
is in range 128 MiB ... 2048 MiB.
With this patch, the cs_mem_size variable can have these values:
( { 16, 32 } x { 8, 16 } x { 0, 512, 1024, 2048, 4096, 8192 } ) / 8 =
{ 0, 64, 128, 256, 512, 1024, 2048, 4096 }
To retain previous behavior, filter out 0 MiB (invalid size), 64 MiB
and 4096 MiB options.
Removing the floating point stuff also saves 1.5k from text segment:
clearfog : spl/u-boot-spl:all -1592 spl/u-boot-spl:text -1592
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Tom Rini [Tue, 17 May 2016 17:58:27 +0000 (13:58 -0400)]
Merge git://git.denx.de/u-boot-dm
Tom Rini [Tue, 17 May 2016 16:10:35 +0000 (12:10 -0400)]
Merge branch 'master' of git://denx.de/git/u-boot-imx
Simon Glass [Sun, 1 May 2016 19:52:44 +0000 (13:52 -0600)]
dm: mmc: test: Add tests for MMC
Add a simple test which checks that a sandbox-emulated SD card can be used
correctly. This tests plumbing through the MMC stack's block-device
implementaion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:43 +0000 (13:52 -0600)]
dm: sandbox: mmc: Enable building MMC code for sandbox
Enable building the MMC code for sandbox. This increases build
coverage for sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:42 +0000 (13:52 -0600)]
dm: mmc: sandbox: Add an SD-card emulation
Add an emulation of an SD card to sandbox, allowing MMC to be used in tests.
The emulation is very simple, supporting only card detection and reading
test data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:41 +0000 (13:52 -0600)]
dm: mmc: Add support for driver-model block devices
Add support for enabling CONFIG_BLK with MMC. This involves changing a
few functions to use struct udevice and adding a MMC block device driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:40 +0000 (13:52 -0600)]
dm: mmc: Add a way to bind MMC devices with driver model
Binding an MMC device when CONFIG_BLK is enabled requires that a block
device be bound as a child of the MMC device. Add a function to do this.
The mmc_create() method will be used only when DM_BLK is disabled.
Add an unbind method also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:39 +0000 (13:52 -0600)]
dm: mmc: Implement the MMC functions for block devices
Implement the functions in mmc_legacy.c for driver-model block devices, so
that MMC can use driver model for these. This allows CONFIG_BLK to be enabled
with DM_MMC.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:38 +0000 (13:52 -0600)]
dm: sandbox: Only enable the sandbox MMC driver when valid
This driver will require generic MMC and block-device support in a future
commit. To avoid test errors, make this change now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:37 +0000 (13:52 -0600)]
dm: mmc: Adjust mmc_switch_part() to use a struct mmc
Instead of looking up the MMC device by number, just pass it in. This makes
it possible to use this function with driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:36 +0000 (13:52 -0600)]
dm: blk: Use the correct error code for blk_get_device_by_str()
Return -EINVAL instead of -1 in this function, to provide a more meaningful
error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:35 +0000 (13:52 -0600)]
dm: mmc: Move the device list into a separate file
At present the MMC subsystem maintains its own list of MMC devices. This
cannot work with driver model, which needs to maintain this itself. Move the
list code into a separate 'legacy' file. The core MMC code remains, and will
be shared with the driver-model implementation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:34 +0000 (13:52 -0600)]
dm: mmc: Set up the device pointer when using the MMC uclass
Update the existing drivers to set up this new pointer. This will be required
by the MMC uclass.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:33 +0000 (13:52 -0600)]
dm: blk: Add a comment as to why the bdev member is needed
This member should be explained, since it is not obvious why it is needed.
Add a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:32 +0000 (13:52 -0600)]
dm: part: Drop the block_drvr table
This is not needed since we can use the functions provided by the legacy
block device support.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:31 +0000 (13:52 -0600)]
dm: part: Use the legacy block driver for hardware partition support
Drop use of the table in part.c for this feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Simon Glass [Sun, 1 May 2016 19:52:30 +0000 (13:52 -0600)]
dm: blk: Add functions to select a hardware partition
The block device uclass does not currently support selecting a particular
hardware partition but this is needed for MMC. Add it so that the blk API
can support MMC properly.
Signed-off-by: Simon Glass <sjg@chromium.org>